scsi: arcmsr: Adjust whitespace
Adjust tabs and whitespace. Signed-off-by: Ching Huang <ching2048@areca.com.tw> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -70,15 +70,15 @@ struct device_attribute;
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#define ARCMST_NUM_MSIX_VECTORS 4
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#ifndef PCI_DEVICE_ID_ARECA_1880
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#define PCI_DEVICE_ID_ARECA_1880 0x1880
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#endif
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#endif
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#ifndef PCI_DEVICE_ID_ARECA_1214
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#define PCI_DEVICE_ID_ARECA_1214 0x1214
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#define PCI_DEVICE_ID_ARECA_1214 0x1214
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#endif
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#ifndef PCI_DEVICE_ID_ARECA_1203
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#define PCI_DEVICE_ID_ARECA_1203 0x1203
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#define PCI_DEVICE_ID_ARECA_1203 0x1203
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#endif
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#ifndef PCI_DEVICE_ID_ARECA_1884
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#define PCI_DEVICE_ID_ARECA_1884 0x1884
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#define PCI_DEVICE_ID_ARECA_1884 0x1884
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#endif
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#define ARCMSR_HOURS (1000 * 60 * 60 * 4)
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#define ARCMSR_MINUTES (1000 * 60 * 60)
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@ -734,11 +734,11 @@ typedef struct deliver_completeQ {
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struct AdapterControlBlock
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{
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uint32_t adapter_type; /* adapter A,B..... */
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#define ACB_ADAPTER_TYPE_A 0x00000000 /* hba I IOP */
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#define ACB_ADAPTER_TYPE_B 0x00000001 /* hbb M IOP */
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#define ACB_ADAPTER_TYPE_C 0x00000002 /* hbc L IOP */
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#define ACB_ADAPTER_TYPE_D 0x00000003 /* hbd M IOP */
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#define ACB_ADAPTER_TYPE_E 0x00000004 /* hba L IOP */
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#define ACB_ADAPTER_TYPE_A 0x00000000 /* hba I IOP */
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#define ACB_ADAPTER_TYPE_B 0x00000001 /* hbb M IOP */
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#define ACB_ADAPTER_TYPE_C 0x00000002 /* hbc L IOP */
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#define ACB_ADAPTER_TYPE_D 0x00000003 /* hbd M IOP */
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#define ACB_ADAPTER_TYPE_E 0x00000004 /* hba L IOP */
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u32 roundup_ccbsize;
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struct pci_dev * pdev;
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struct Scsi_Host * host;
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@ -766,26 +766,26 @@ struct AdapterControlBlock
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uint32_t acb_flags;
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u16 dev_id;
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uint8_t adapter_index;
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#define ACB_F_SCSISTOPADAPTER 0x0001
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#define ACB_F_MSG_STOP_BGRB 0x0002
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/* stop RAID background rebuild */
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#define ACB_F_MSG_START_BGRB 0x0004
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/* stop RAID background rebuild */
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#define ACB_F_IOPDATA_OVERFLOW 0x0008
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/* iop message data rqbuffer overflow */
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#define ACB_F_MESSAGE_WQBUFFER_CLEARED 0x0010
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/* message clear wqbuffer */
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#define ACB_F_MESSAGE_RQBUFFER_CLEARED 0x0020
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/* message clear rqbuffer */
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#define ACB_F_MESSAGE_WQBUFFER_READED 0x0040
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#define ACB_F_BUS_RESET 0x0080
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#define ACB_F_BUS_HANG_ON 0x0800/* need hardware reset bus */
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#define ACB_F_SCSISTOPADAPTER 0x0001
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#define ACB_F_MSG_STOP_BGRB 0x0002
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/* stop RAID background rebuild */
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#define ACB_F_MSG_START_BGRB 0x0004
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/* stop RAID background rebuild */
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#define ACB_F_IOPDATA_OVERFLOW 0x0008
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/* iop message data rqbuffer overflow */
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#define ACB_F_MESSAGE_WQBUFFER_CLEARED 0x0010
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/* message clear wqbuffer */
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#define ACB_F_MESSAGE_RQBUFFER_CLEARED 0x0020
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/* message clear rqbuffer */
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#define ACB_F_MESSAGE_WQBUFFER_READED 0x0040
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#define ACB_F_BUS_RESET 0x0080
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#define ACB_F_BUS_HANG_ON 0x0800/* need hardware reset bus */
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#define ACB_F_IOP_INITED 0x0100
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/* iop init */
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#define ACB_F_ABORT 0x0200
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#define ACB_F_FIRMWARE_TRAP 0x0400
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#define ACB_F_MSG_GET_CONFIG 0x1000
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#define ACB_F_IOP_INITED 0x0100
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/* iop init */
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#define ACB_F_ABORT 0x0200
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#define ACB_F_FIRMWARE_TRAP 0x0400
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#define ACB_F_MSG_GET_CONFIG 0x1000
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struct CommandControlBlock * pccb_pool[ARCMSR_MAX_FREECCB_NUM];
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/* used for memory free */
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struct list_head ccb_free_list;
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@ -832,9 +832,9 @@ struct AdapterControlBlock
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struct work_struct arcmsr_do_message_isr_bh;
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struct timer_list eternal_timer;
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unsigned short fw_flag;
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#define FW_NORMAL 0x0000
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#define FW_BOG 0x0001
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#define FW_DEADLOCK 0x0010
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#define FW_NORMAL 0x0000
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#define FW_BOG 0x0001
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#define FW_DEADLOCK 0x0010
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atomic_t rq_map_token;
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atomic_t ante_token_value;
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uint32_t maxOutstanding;
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@ -862,24 +862,24 @@ struct CommandControlBlock{
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uint32_t cdb_phyaddr; /*x32: 4byte, x64: 4byte*/
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uint32_t arc_cdb_size; /*x32:4byte,x64:4byte*/
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uint16_t ccb_flags; /*x32: 2byte, x64: 2byte*/
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#define CCB_FLAG_READ 0x0000
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#define CCB_FLAG_WRITE 0x0001
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#define CCB_FLAG_ERROR 0x0002
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#define CCB_FLAG_FLUSHCACHE 0x0004
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#define CCB_FLAG_MASTER_ABORTED 0x0008
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#define CCB_FLAG_READ 0x0000
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#define CCB_FLAG_WRITE 0x0001
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#define CCB_FLAG_ERROR 0x0002
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#define CCB_FLAG_FLUSHCACHE 0x0004
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#define CCB_FLAG_MASTER_ABORTED 0x0008
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uint16_t startdone; /*x32:2byte,x32:2byte*/
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#define ARCMSR_CCB_DONE 0x0000
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#define ARCMSR_CCB_START 0x55AA
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#define ARCMSR_CCB_ABORTED 0xAA55
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#define ARCMSR_CCB_ILLEGAL 0xFFFF
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#define ARCMSR_CCB_DONE 0x0000
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#define ARCMSR_CCB_START 0x55AA
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#define ARCMSR_CCB_ABORTED 0xAA55
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#define ARCMSR_CCB_ILLEGAL 0xFFFF
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uint32_t smid;
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#if BITS_PER_LONG == 64
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#if BITS_PER_LONG == 64
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/* ======================512+64 bytes======================== */
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uint32_t reserved[4]; /*16 byte*/
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#else
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#else
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/* ======================512+32 bytes======================== */
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// uint32_t reserved; /*4 byte*/
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#endif
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#endif
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/* ======================================================= */
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struct ARCMSR_CDB arcmsr_cdb;
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};
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