scsi: arcmsr: Adjust whitespace

Adjust tabs and whitespace.

Signed-off-by: Ching Huang <ching2048@areca.com.tw>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Ching Huang 2017-12-05 10:16:13 +08:00 committed by Martin K. Petersen
parent ea331f30ec
commit a3de4b58bc
2 changed files with 221 additions and 221 deletions

View File

@ -70,15 +70,15 @@ struct device_attribute;
#define ARCMST_NUM_MSIX_VECTORS 4
#ifndef PCI_DEVICE_ID_ARECA_1880
#define PCI_DEVICE_ID_ARECA_1880 0x1880
#endif
#endif
#ifndef PCI_DEVICE_ID_ARECA_1214
#define PCI_DEVICE_ID_ARECA_1214 0x1214
#define PCI_DEVICE_ID_ARECA_1214 0x1214
#endif
#ifndef PCI_DEVICE_ID_ARECA_1203
#define PCI_DEVICE_ID_ARECA_1203 0x1203
#define PCI_DEVICE_ID_ARECA_1203 0x1203
#endif
#ifndef PCI_DEVICE_ID_ARECA_1884
#define PCI_DEVICE_ID_ARECA_1884 0x1884
#define PCI_DEVICE_ID_ARECA_1884 0x1884
#endif
#define ARCMSR_HOURS (1000 * 60 * 60 * 4)
#define ARCMSR_MINUTES (1000 * 60 * 60)
@ -734,11 +734,11 @@ typedef struct deliver_completeQ {
struct AdapterControlBlock
{
uint32_t adapter_type; /* adapter A,B..... */
#define ACB_ADAPTER_TYPE_A 0x00000000 /* hba I IOP */
#define ACB_ADAPTER_TYPE_B 0x00000001 /* hbb M IOP */
#define ACB_ADAPTER_TYPE_C 0x00000002 /* hbc L IOP */
#define ACB_ADAPTER_TYPE_D 0x00000003 /* hbd M IOP */
#define ACB_ADAPTER_TYPE_E 0x00000004 /* hba L IOP */
#define ACB_ADAPTER_TYPE_A 0x00000000 /* hba I IOP */
#define ACB_ADAPTER_TYPE_B 0x00000001 /* hbb M IOP */
#define ACB_ADAPTER_TYPE_C 0x00000002 /* hbc L IOP */
#define ACB_ADAPTER_TYPE_D 0x00000003 /* hbd M IOP */
#define ACB_ADAPTER_TYPE_E 0x00000004 /* hba L IOP */
u32 roundup_ccbsize;
struct pci_dev * pdev;
struct Scsi_Host * host;
@ -766,26 +766,26 @@ struct AdapterControlBlock
uint32_t acb_flags;
u16 dev_id;
uint8_t adapter_index;
#define ACB_F_SCSISTOPADAPTER 0x0001
#define ACB_F_MSG_STOP_BGRB 0x0002
/* stop RAID background rebuild */
#define ACB_F_MSG_START_BGRB 0x0004
/* stop RAID background rebuild */
#define ACB_F_IOPDATA_OVERFLOW 0x0008
/* iop message data rqbuffer overflow */
#define ACB_F_MESSAGE_WQBUFFER_CLEARED 0x0010
/* message clear wqbuffer */
#define ACB_F_MESSAGE_RQBUFFER_CLEARED 0x0020
/* message clear rqbuffer */
#define ACB_F_MESSAGE_WQBUFFER_READED 0x0040
#define ACB_F_BUS_RESET 0x0080
#define ACB_F_BUS_HANG_ON 0x0800/* need hardware reset bus */
#define ACB_F_SCSISTOPADAPTER 0x0001
#define ACB_F_MSG_STOP_BGRB 0x0002
/* stop RAID background rebuild */
#define ACB_F_MSG_START_BGRB 0x0004
/* stop RAID background rebuild */
#define ACB_F_IOPDATA_OVERFLOW 0x0008
/* iop message data rqbuffer overflow */
#define ACB_F_MESSAGE_WQBUFFER_CLEARED 0x0010
/* message clear wqbuffer */
#define ACB_F_MESSAGE_RQBUFFER_CLEARED 0x0020
/* message clear rqbuffer */
#define ACB_F_MESSAGE_WQBUFFER_READED 0x0040
#define ACB_F_BUS_RESET 0x0080
#define ACB_F_BUS_HANG_ON 0x0800/* need hardware reset bus */
#define ACB_F_IOP_INITED 0x0100
/* iop init */
#define ACB_F_ABORT 0x0200
#define ACB_F_FIRMWARE_TRAP 0x0400
#define ACB_F_MSG_GET_CONFIG 0x1000
#define ACB_F_IOP_INITED 0x0100
/* iop init */
#define ACB_F_ABORT 0x0200
#define ACB_F_FIRMWARE_TRAP 0x0400
#define ACB_F_MSG_GET_CONFIG 0x1000
struct CommandControlBlock * pccb_pool[ARCMSR_MAX_FREECCB_NUM];
/* used for memory free */
struct list_head ccb_free_list;
@ -832,9 +832,9 @@ struct AdapterControlBlock
struct work_struct arcmsr_do_message_isr_bh;
struct timer_list eternal_timer;
unsigned short fw_flag;
#define FW_NORMAL 0x0000
#define FW_BOG 0x0001
#define FW_DEADLOCK 0x0010
#define FW_NORMAL 0x0000
#define FW_BOG 0x0001
#define FW_DEADLOCK 0x0010
atomic_t rq_map_token;
atomic_t ante_token_value;
uint32_t maxOutstanding;
@ -862,24 +862,24 @@ struct CommandControlBlock{
uint32_t cdb_phyaddr; /*x32: 4byte, x64: 4byte*/
uint32_t arc_cdb_size; /*x32:4byte,x64:4byte*/
uint16_t ccb_flags; /*x32: 2byte, x64: 2byte*/
#define CCB_FLAG_READ 0x0000
#define CCB_FLAG_WRITE 0x0001
#define CCB_FLAG_ERROR 0x0002
#define CCB_FLAG_FLUSHCACHE 0x0004
#define CCB_FLAG_MASTER_ABORTED 0x0008
#define CCB_FLAG_READ 0x0000
#define CCB_FLAG_WRITE 0x0001
#define CCB_FLAG_ERROR 0x0002
#define CCB_FLAG_FLUSHCACHE 0x0004
#define CCB_FLAG_MASTER_ABORTED 0x0008
uint16_t startdone; /*x32:2byte,x32:2byte*/
#define ARCMSR_CCB_DONE 0x0000
#define ARCMSR_CCB_START 0x55AA
#define ARCMSR_CCB_ABORTED 0xAA55
#define ARCMSR_CCB_ILLEGAL 0xFFFF
#define ARCMSR_CCB_DONE 0x0000
#define ARCMSR_CCB_START 0x55AA
#define ARCMSR_CCB_ABORTED 0xAA55
#define ARCMSR_CCB_ILLEGAL 0xFFFF
uint32_t smid;
#if BITS_PER_LONG == 64
#if BITS_PER_LONG == 64
/* ======================512+64 bytes======================== */
uint32_t reserved[4]; /*16 byte*/
#else
#else
/* ======================512+32 bytes======================== */
// uint32_t reserved; /*4 byte*/
#endif
#endif
/* ======================================================= */
struct ARCMSR_CDB arcmsr_cdb;
};