drm/amdgpu: add mes block to sienna_cichlid
Add mes block support to sienna_cichlid. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -497,6 +497,8 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
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amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
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amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
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amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
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amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
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amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block);
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amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block);
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if (adev->enable_mes)
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amdgpu_device_ip_block_add(adev, &mes_v10_1_ip_block);
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break;
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break;
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default:
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default:
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return -EINVAL;
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return -EINVAL;
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