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KVM: vmx: fix ept reserved bits for 1-GByte page 

EPT misconfig handler in kvm will check which reason lead to EPT
misconfiguration after vmexit. One of the reasons is that an EPT
paging-structure entry is configured with settings reserved for
future functionality. However, the handler can't identify if
paging-structure entry of reserved bits for 1-GByte page are
configured, since PDPTE which point to 1-GByte page will reserve
bits 29:12 instead of bits 7:3 which are reserved for PDPTE that
references an EPT Page Directory. This patch fix it by reserve
bits 29:12 for 1-GByte page.

Signed-off-by: Wanpeng Li <wanpeng.li@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Wanpeng Li 2014-08-20 15:31:53 +08:00 committed by Paolo Bonzini
parent 1e1b6c2644
commit a32e84594d
1 changed files with 12 additions and 10 deletions
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22
arch/x86/kvm/vmx.c
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@ -5521,17 +5521,18 @@ static u64 ept_rsvd_mask(u64 spte, int level)
for (i = 51; i > boot_cpu_data.x86_phys_bits; i--)
mask |= (1ULL << i);
if (level > 2)
if (level == 4)
/* bits 7:3 reserved */
mask |= 0xf8;
else if (level == 2) {
if (spte & (1ULL << 7))
/* 2MB ref, bits 20:12 reserved */
mask |= 0x1ff000;
else
/* bits 6:3 reserved */
mask |= 0x78;
}
else if (spte & (1ULL << 7))
/*
* 1GB/2MB page, bits 29:12 or 20:12 reserved respectively,
* level == 1 if the hypervisor is using the ignored bit 7.
*/
mask |= (PAGE_SIZE << ((level - 1) * 9)) - PAGE_SIZE;
else if (level > 1)
/* bits 6:3 reserved */
mask |= 0x78;
return mask;
}
@ -5561,7 +5562,8 @@ static void ept_misconfig_inspect_spte(struct kvm_vcpu *vcpu, u64 spte,
WARN_ON(1);
}
if (level == 1 || (level == 2 && (spte & (1ULL << 7)))) {
/* bits 5:3 are _not_ reserved for large page or leaf page */
if ((rsvd_bits & 0x38) == 0) {
u64 ept_mem_type = (spte & 0x38) >> 3;
if (ept_mem_type == 2 || ept_mem_type == 3 ||