spi: spi_bfin uses platform device resources
Update spi driver to support multi-ports by using platform resources; tested on STAMP537+SPI_MMC, other boards need more testing. Plus other minor updates. Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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2ed355165f
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a32c691d7c
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@ -13,6 +13,8 @@
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* March 10, 2006 bfin5xx_spi.c Created. (Luke Yang)
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* August 7, 2006 added full duplex mode (Axel Weiss & Luke Yang)
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* July 17, 2007 add support for BF54x SPI0 controller (Bryan Wu)
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* July 30, 2007 add platfrom_resource interface to support multi-port
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* SPI controller (Bryan Wu)
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*
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* Copyright 2004-2007 Analog Devices Inc.
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*
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@ -50,18 +52,25 @@
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#include <asm/portmux.h>
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#include <asm/bfin5xx_spi.h>
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MODULE_AUTHOR("Bryan Wu, Luke Yang");
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MODULE_DESCRIPTION("Blackfin BF5xx SPI Contoller Driver");
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#define DRV_NAME "bfin-spi"
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#define DRV_AUTHOR "Bryan Wu, Luke Yang"
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#define DRV_DESC "Blackfin BF5xx on-chip SPI Contoller Driver"
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#define DRV_VERSION "1.0"
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MODULE_AUTHOR(DRV_AUTHOR);
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MODULE_DESCRIPTION(DRV_DESC);
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MODULE_LICENSE("GPL");
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#define DRV_NAME "bfin-spi-master"
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#define IS_DMA_ALIGNED(x) (((u32)(x)&0x07)==0)
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static u32 spi_dma_ch;
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static u32 spi_regs_base;
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#define DEFINE_SPI_REG(reg, off) \
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static inline u16 read_##reg(void) \
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{ return bfin_read16(SPI0_REGBASE + off); } \
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{ return bfin_read16(spi_regs_base + off); } \
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static inline void write_##reg(u16 v) \
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{bfin_write16(SPI0_REGBASE + off, v); }
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{bfin_write16(spi_regs_base + off, v); }
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DEFINE_SPI_REG(CTRL, 0x00)
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DEFINE_SPI_REG(FLAG, 0x04)
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@ -573,10 +582,10 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
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struct chip_data *chip = drv_data->cur_chip;
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dev_dbg(&drv_data->pdev->dev, "in dma_irq_handler\n");
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clear_dma_irqstat(CH_SPI);
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clear_dma_irqstat(spi_dma_ch);
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/* Wait for DMA to complete */
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while (get_dma_curr_irqstat(CH_SPI) & DMA_RUN)
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while (get_dma_curr_irqstat(spi_dma_ch) & DMA_RUN)
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continue;
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/*
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@ -586,12 +595,12 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
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* register until it goes low for 2 successive reads
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*/
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if (drv_data->tx != NULL) {
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while ((bfin_read_SPI_STAT() & TXS) ||
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(bfin_read_SPI_STAT() & TXS))
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while ((read_STAT() & TXS) ||
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(read_STAT() & TXS))
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continue;
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}
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while (!(bfin_read_SPI_STAT() & SPIF))
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while (!(read_STAT() & SPIF))
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continue;
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bfin_spi_disable(drv_data);
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@ -610,8 +619,8 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
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/* free the irq handler before next transfer */
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dev_dbg(&drv_data->pdev->dev,
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"disable dma channel irq%d\n",
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CH_SPI);
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dma_disable_irq(CH_SPI);
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spi_dma_ch);
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dma_disable_irq(spi_dma_ch);
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return IRQ_HANDLED;
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}
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@ -726,19 +735,19 @@ static void pump_transfers(unsigned long data)
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if (drv_data->cur_chip->enable_dma && drv_data->len > 6) {
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write_STAT(BIT_STAT_CLR);
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disable_dma(CH_SPI);
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clear_dma_irqstat(CH_SPI);
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disable_dma(spi_dma_ch);
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clear_dma_irqstat(spi_dma_ch);
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bfin_spi_disable(drv_data);
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/* config dma channel */
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dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n");
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if (width == CFG_SPI_WORDSIZE16) {
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set_dma_x_count(CH_SPI, drv_data->len);
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set_dma_x_modify(CH_SPI, 2);
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set_dma_x_count(spi_dma_ch, drv_data->len);
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set_dma_x_modify(spi_dma_ch, 2);
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dma_width = WDSIZE_16;
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} else {
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set_dma_x_count(CH_SPI, drv_data->len);
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set_dma_x_modify(CH_SPI, 1);
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set_dma_x_count(spi_dma_ch, drv_data->len);
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set_dma_x_modify(spi_dma_ch, 1);
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dma_width = WDSIZE_8;
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}
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@ -753,9 +762,10 @@ static void pump_transfers(unsigned long data)
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/* no irq in autobuffer mode */
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dma_config =
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(DMAFLOW_AUTO | RESTART | dma_width | DI_EN);
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set_dma_config(CH_SPI, dma_config);
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set_dma_start_addr(CH_SPI, (unsigned long)drv_data->tx);
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enable_dma(CH_SPI);
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set_dma_config(spi_dma_ch, dma_config);
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set_dma_start_addr(spi_dma_ch,
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(unsigned long)drv_data->tx);
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enable_dma(spi_dma_ch);
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write_CTRL(cr | CFG_SPI_DMAWRITE | (width << 8) |
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(CFG_SPI_ENABLE << 14));
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@ -776,14 +786,15 @@ static void pump_transfers(unsigned long data)
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/* clear tx reg soformer data is not shifted out */
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write_TDBR(0xFF);
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set_dma_x_count(CH_SPI, drv_data->len);
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set_dma_x_count(spi_dma_ch, drv_data->len);
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/* start dma */
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dma_enable_irq(CH_SPI);
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dma_enable_irq(spi_dma_ch);
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dma_config = (WNR | RESTART | dma_width | DI_EN);
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set_dma_config(CH_SPI, dma_config);
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set_dma_start_addr(CH_SPI, (unsigned long)drv_data->rx);
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enable_dma(CH_SPI);
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set_dma_config(spi_dma_ch, dma_config);
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set_dma_start_addr(spi_dma_ch,
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(unsigned long)drv_data->rx);
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enable_dma(spi_dma_ch);
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cr |=
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CFG_SPI_DMAREAD | (width << 8) | (CFG_SPI_ENABLE <<
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@ -794,11 +805,12 @@ static void pump_transfers(unsigned long data)
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dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n");
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/* start dma */
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dma_enable_irq(CH_SPI);
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dma_enable_irq(spi_dma_ch);
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dma_config = (RESTART | dma_width | DI_EN);
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set_dma_config(CH_SPI, dma_config);
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set_dma_start_addr(CH_SPI, (unsigned long)drv_data->tx);
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enable_dma(CH_SPI);
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set_dma_config(spi_dma_ch, dma_config);
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set_dma_start_addr(spi_dma_ch,
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(unsigned long)drv_data->tx);
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enable_dma(spi_dma_ch);
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write_CTRL(cr | CFG_SPI_DMAWRITE | (width << 8) |
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(CFG_SPI_ENABLE << 14));
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@ -1034,17 +1046,17 @@ static int setup(struct spi_device *spi)
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*/
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if (chip->enable_dma && !dma_requested) {
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/* register dma irq handler */
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if (request_dma(CH_SPI, "BF53x_SPI_DMA") < 0) {
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if (request_dma(spi_dma_ch, "BF53x_SPI_DMA") < 0) {
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dev_dbg(&spi->dev,
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"Unable to request BlackFin SPI DMA channel\n");
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return -ENODEV;
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}
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if (set_dma_callback(CH_SPI, (void *)dma_irq_handler, drv_data)
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< 0) {
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if (set_dma_callback(spi_dma_ch, (void *)dma_irq_handler,
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drv_data) < 0) {
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dev_dbg(&spi->dev, "Unable to set dma callback\n");
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return -EPERM;
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}
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dma_disable_irq(CH_SPI);
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dma_disable_irq(spi_dma_ch);
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dma_requested = 1;
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}
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@ -1215,6 +1227,7 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev)
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struct bfin5xx_spi_master *platform_info;
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struct spi_master *master;
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struct driver_data *drv_data = 0;
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struct resource *res;
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int status = 0;
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platform_info = dev->platform_data;
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@ -1242,15 +1255,38 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev)
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master->setup = setup;
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master->transfer = transfer;
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/* Find and map our resources */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res == NULL) {
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dev_err(dev, "Cannot get IORESOURCE_MEM\n");
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status = -ENOENT;
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goto out_error_get_res;
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}
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spi_regs_base = (u32) ioremap(res->start, (res->end - res->start)+1);
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if (!spi_regs_base) {
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dev_err(dev, "Cannot map IO\n");
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status = -ENXIO;
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goto out_error_ioremap;
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}
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spi_dma_ch = platform_get_irq(pdev, 0);
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if (spi_dma_ch < 0) {
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dev_err(dev, "No DMA channel specified\n");
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status = -ENOENT;
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goto out_error_no_dma_ch;
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}
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/* Initial and start queue */
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status = init_queue(drv_data);
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if (status != 0) {
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dev_err(&pdev->dev, "problem initializing queue\n");
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dev_err(dev, "problem initializing queue\n");
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goto out_error_queue_alloc;
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}
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status = start_queue(drv_data);
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if (status != 0) {
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dev_err(&pdev->dev, "problem starting queue\n");
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dev_err(dev, "problem starting queue\n");
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goto out_error_queue_alloc;
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}
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@ -1258,14 +1294,20 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev)
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platform_set_drvdata(pdev, drv_data);
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status = spi_register_master(master);
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if (status != 0) {
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dev_err(&pdev->dev, "problem registering spi master\n");
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dev_err(dev, "problem registering spi master\n");
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goto out_error_queue_alloc;
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}
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dev_dbg(&pdev->dev, "controller probe successfully\n");
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dev_info(dev, "%s, Version %s, regs_base @ 0x%08x\n",
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DRV_DESC, DRV_VERSION, spi_regs_base);
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return status;
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out_error_queue_alloc:
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destroy_queue(drv_data);
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out_error_no_dma_ch:
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iounmap((void *) spi_regs_base);
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out_error_ioremap:
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out_error_get_res:
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out_error:
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spi_master_put(master);
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@ -1291,8 +1333,8 @@ static int __devexit bfin5xx_spi_remove(struct platform_device *pdev)
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/* Release DMA */
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if (drv_data->master_info->enable_dma) {
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if (dma_channel_active(CH_SPI))
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free_dma(CH_SPI);
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if (dma_channel_active(spi_dma_ch))
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free_dma(spi_dma_ch);
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}
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/* Disconnect from the SPI framework */
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@ -1347,7 +1389,7 @@ static int bfin5xx_spi_resume(struct platform_device *pdev)
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MODULE_ALIAS("bfin-spi-master"); /* for platform bus hotplug */
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static struct platform_driver bfin5xx_spi_driver = {
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.driver = {
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.name = "bfin-spi-master",
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.name = DRV_NAME,
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.owner = THIS_MODULE,
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},
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.suspend = bfin5xx_spi_suspend,
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