pinctrl: pistachio: fix mfio pll_lock pinmux
A previous patch attempted to fix the pinmuxes for mfio 84 - 89, but it omitted a change to pistachio_pin_group pistachio_groups, which results in incorrect pll_lock signals being routed. Apply the correct mux settings throughout the driver. fixes:cefc03e599
("pinctrl: Add Pistachio SoC pin control driver") fixes:e9adb336d0
("pinctrl: pistachio: fix mfio84-89 function description and pinmux.") Cc: <stable@vger.kernel.org> # 4.4.x- Signed-off-by: James Hartley <james.hartley@imgtec.com> Reviewed-by: Sifan Naeem <Sifan.Naeem@imgtec.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -809,17 +809,17 @@ static const struct pistachio_pin_group pistachio_groups[] = {
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PADS_FUNCTION_SELECT2, 12, 0x3),
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MFIO_MUX_PIN_GROUP(83, MIPS_PLL_LOCK, MIPS_TRACE_DATA, USB_DEBUG,
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PADS_FUNCTION_SELECT2, 14, 0x3),
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MFIO_MUX_PIN_GROUP(84, SYS_PLL_LOCK, MIPS_TRACE_DATA, USB_DEBUG,
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MFIO_MUX_PIN_GROUP(84, AUDIO_PLL_LOCK, MIPS_TRACE_DATA, USB_DEBUG,
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PADS_FUNCTION_SELECT2, 16, 0x3),
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MFIO_MUX_PIN_GROUP(85, WIFI_PLL_LOCK, MIPS_TRACE_DATA, SDHOST_DEBUG,
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MFIO_MUX_PIN_GROUP(85, RPU_V_PLL_LOCK, MIPS_TRACE_DATA, SDHOST_DEBUG,
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PADS_FUNCTION_SELECT2, 18, 0x3),
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MFIO_MUX_PIN_GROUP(86, BT_PLL_LOCK, MIPS_TRACE_DATA, SDHOST_DEBUG,
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MFIO_MUX_PIN_GROUP(86, RPU_L_PLL_LOCK, MIPS_TRACE_DATA, SDHOST_DEBUG,
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PADS_FUNCTION_SELECT2, 20, 0x3),
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MFIO_MUX_PIN_GROUP(87, RPU_V_PLL_LOCK, DREQ2, SOCIF_DEBUG,
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MFIO_MUX_PIN_GROUP(87, SYS_PLL_LOCK, DREQ2, SOCIF_DEBUG,
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PADS_FUNCTION_SELECT2, 22, 0x3),
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MFIO_MUX_PIN_GROUP(88, RPU_L_PLL_LOCK, DREQ3, SOCIF_DEBUG,
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MFIO_MUX_PIN_GROUP(88, WIFI_PLL_LOCK, DREQ3, SOCIF_DEBUG,
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PADS_FUNCTION_SELECT2, 24, 0x3),
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MFIO_MUX_PIN_GROUP(89, AUDIO_PLL_LOCK, DREQ4, DREQ5,
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MFIO_MUX_PIN_GROUP(89, BT_PLL_LOCK, DREQ4, DREQ5,
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PADS_FUNCTION_SELECT2, 26, 0x3),
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PIN_GROUP(TCK, "tck"),
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PIN_GROUP(TRSTN, "trstn"),
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