ASoC: ti: davinci-i2s: Move the XSYNCERR workaround to .prepare callback
Currently the driver uses snd_soc_rtdcom_lookup() in it's mcbsp_start function to try to stop/restart the DMA as the initial XSYNCERR workaround need to be done before the DMA is armed. There are couple of things wrong with this: - the driver crashes with NULL pointer dereference as the component->driver->ops is actually NULL - the driver should not use snd_soc_rtdcom_lookup() in the first place - Fiddling with DMA is never a good thing Move the workaround handling to .prepare which is called before the DMA is armed, so it complies with the requirements. Reported-by (usage of snd_soc_rtdcom_lookup): Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20190830103841.25128-3-peter.ujfalusi@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -187,57 +187,9 @@ static void toggle_clock(struct davinci_mcbsp_dev *dev, int playback)
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static void davinci_mcbsp_start(struct davinci_mcbsp_dev *dev,
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struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
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int playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
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u32 spcr;
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u32 mask = playback ? DAVINCI_MCBSP_SPCR_XRST : DAVINCI_MCBSP_SPCR_RRST;
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spcr = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
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if (spcr & mask) {
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/* start off disabled */
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davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG,
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spcr & ~mask);
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toggle_clock(dev, playback);
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}
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if (dev->pcr & (DAVINCI_MCBSP_PCR_FSXM | DAVINCI_MCBSP_PCR_FSRM |
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DAVINCI_MCBSP_PCR_CLKXM | DAVINCI_MCBSP_PCR_CLKRM)) {
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/* Start the sample generator */
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spcr |= DAVINCI_MCBSP_SPCR_GRST;
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davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, spcr);
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}
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if (playback) {
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/* Stop the DMA to avoid data loss */
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/* while the transmitter is out of reset to handle XSYNCERR */
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if (component->driver->ops->trigger) {
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int ret = component->driver->ops->trigger(substream,
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SNDRV_PCM_TRIGGER_STOP);
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if (ret < 0)
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printk(KERN_DEBUG "Playback DMA stop failed\n");
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}
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/* Enable the transmitter */
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spcr = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
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spcr |= DAVINCI_MCBSP_SPCR_XRST;
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davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, spcr);
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/* wait for any unexpected frame sync error to occur */
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udelay(100);
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/* Disable the transmitter to clear any outstanding XSYNCERR */
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spcr = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
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spcr &= ~DAVINCI_MCBSP_SPCR_XRST;
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davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, spcr);
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toggle_clock(dev, playback);
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/* Restart the DMA */
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if (component->driver->ops->trigger) {
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int ret = component->driver->ops->trigger(substream,
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SNDRV_PCM_TRIGGER_START);
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if (ret < 0)
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printk(KERN_DEBUG "Playback DMA start failed\n");
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}
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}
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/* Enable transmitter or receiver */
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spcr = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
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@ -575,7 +527,41 @@ static int davinci_i2s_prepare(struct snd_pcm_substream *substream,
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{
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struct davinci_mcbsp_dev *dev = snd_soc_dai_get_drvdata(dai);
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int playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
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u32 spcr;
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u32 mask = playback ? DAVINCI_MCBSP_SPCR_XRST : DAVINCI_MCBSP_SPCR_RRST;
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davinci_mcbsp_stop(dev, playback);
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spcr = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
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if (spcr & mask) {
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/* start off disabled */
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davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG,
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spcr & ~mask);
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toggle_clock(dev, playback);
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}
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if (dev->pcr & (DAVINCI_MCBSP_PCR_FSXM | DAVINCI_MCBSP_PCR_FSRM |
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DAVINCI_MCBSP_PCR_CLKXM | DAVINCI_MCBSP_PCR_CLKRM)) {
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/* Start the sample generator */
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spcr |= DAVINCI_MCBSP_SPCR_GRST;
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davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, spcr);
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}
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if (playback) {
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/* Enable the transmitter */
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spcr = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
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spcr |= DAVINCI_MCBSP_SPCR_XRST;
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davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, spcr);
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/* wait for any unexpected frame sync error to occur */
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udelay(100);
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/* Disable the transmitter to clear any outstanding XSYNCERR */
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spcr = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
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spcr &= ~DAVINCI_MCBSP_SPCR_XRST;
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davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, spcr);
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toggle_clock(dev, playback);
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}
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return 0;
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}
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