liquidio: Remove redundant code
This patch removes redundant file includes and conditions. Provides some meaningful comments and code alignment. Signed-off-by: Derek Chickles <derek.chickles@caviumnetworks.com> Signed-off-by: Satanand Burla <satananda.burla@caviumnetworks.com> Signed-off-by: Felix Manlunas <felix.manlunas@caviumnetworks.com> Signed-off-by: Raghu Vatsavayi <raghu.vatsavayi@caviumnetworks.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
a22b15ce27
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a2c64b67c6
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@ -219,7 +219,7 @@ void lio_cn6xxx_setup_global_output_regs(struct octeon_device *oct)
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/* / Select Packet count instead of bytes for SLI_PKTi_CNTS[CNT] */
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octeon_write_csr(oct, CN6XXX_SLI_PKT_OUT_BMODE, 0);
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/* / Select ES,RO,NS setting from register for Output Queue Packet
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/* Select ES, RO, NS setting from register for Output Queue Packet
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* Address
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*/
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octeon_write_csr(oct, CN6XXX_SLI_PKT_DPADDR, 0xFFFFFFFF);
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@ -29,7 +29,6 @@
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#ifndef __CN68XX_REGS_H__
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#define __CN68XX_REGS_H__
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#include "cn66xx_regs.h"
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/*###################### REQUEST QUEUE #########################*/
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@ -464,18 +464,16 @@ static int lio_set_phys_id(struct net_device *netdev,
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/* Configure Beacon values */
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value = LIO68XX_LED_BEACON_CFGON;
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ret =
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octnet_mdio45_access(lio, 1,
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LIO68XX_LED_BEACON_ADDR,
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&value);
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ret = octnet_mdio45_access(lio, 1,
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LIO68XX_LED_BEACON_ADDR,
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&value);
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if (ret)
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return ret;
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value = LIO68XX_LED_CTRL_CFGON;
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ret =
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octnet_mdio45_access(lio, 1,
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LIO68XX_LED_CTRL_ADDR,
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&value);
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ret = octnet_mdio45_access(lio, 1,
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LIO68XX_LED_CTRL_ADDR,
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&value);
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if (ret)
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return ret;
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} else {
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@ -961,7 +959,6 @@ static int lio_get_intr_coalesce(struct net_device *netdev,
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intr_coal->rx_max_coalesced_frames =
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CFG_GET_OQ_INTR_PKT(cn6xxx->conf);
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}
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iq = oct->instr_queue[lio->linfo.txpciq[0].s.q_no];
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intr_coal->tx_max_coalesced_frames = iq->fill_threshold;
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break;
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@ -1688,13 +1685,12 @@ static void lio_get_regs(struct net_device *dev,
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int len = 0;
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struct octeon_device *oct = lio->oct_dev;
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memset(regbuf, 0, OCT_ETHTOOL_REGDUMP_LEN);
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regs->version = OCT_ETHTOOL_REGSVER;
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switch (oct->chip_id) {
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/* case OCTEON_CN73XX: Todo */
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case OCTEON_CN68XX:
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case OCTEON_CN66XX:
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memset(regbuf, 0, OCT_ETHTOOL_REGDUMP_LEN);
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len += cn6xxx_read_csr_reg(regbuf + len, oct);
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len += cn6xxx_read_config_reg(regbuf + len, oct);
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break;
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@ -1258,7 +1258,7 @@ static void octeon_destroy_resources(struct octeon_device *oct)
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/* Nothing to be done here either */
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break;
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} /* end switch(oct->status) */
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} /* end switch (oct->status) */
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tasklet_kill(&oct_priv->droq_tasklet);
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}
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@ -2125,7 +2125,7 @@ static int liquidio_napi_poll(struct napi_struct *napi, int budget)
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/**
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* \brief Setup input and output queues
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* @param octeon_dev octeon device
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* @param net_device Net device
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* @param ifidx Interface Index
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*
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* Note: Queues are with respect to the octeon device. Thus
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* an input queue is for egress packets, and output queues
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@ -2336,7 +2336,6 @@ static int liquidio_stop(struct net_device *netdev)
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}
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dev_info(&oct->pci_dev->dev, "%s interface is stopped\n", netdev->name);
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module_put(THIS_MODULE);
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return 0;
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}
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@ -2347,6 +2346,7 @@ void liquidio_link_ctrl_cmd_completion(void *nctrl_ptr)
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struct net_device *netdev = (struct net_device *)nctrl->netpndev;
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struct lio *lio = GET_LIO(netdev);
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struct octeon_device *oct = lio->oct_dev;
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u8 *mac;
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switch (nctrl->ncmd.s.cmd) {
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case OCTNET_CMD_CHANGE_DEVFLAGS:
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@ -2354,12 +2354,11 @@ void liquidio_link_ctrl_cmd_completion(void *nctrl_ptr)
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break;
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case OCTNET_CMD_CHANGE_MACADDR:
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/* If command is successful, change the MACADDR. */
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netif_info(lio, probe, lio->netdev, " MACAddr changed to 0x%llx\n",
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CVM_CAST64(nctrl->udd[0]));
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dev_info(&oct->pci_dev->dev, "%s MACAddr changed to 0x%llx\n",
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netdev->name, CVM_CAST64(nctrl->udd[0]));
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memcpy(netdev->dev_addr, ((u8 *)&nctrl->udd[0]) + 2, ETH_ALEN);
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mac = ((u8 *)&nctrl->udd[0]) + 2;
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netif_info(lio, probe, lio->netdev,
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"%s %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
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"MACAddr changed to", mac[0], mac[1],
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mac[2], mac[3], mac[4], mac[5]);
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break;
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case OCTNET_CMD_CHANGE_MTU:
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@ -2940,12 +2939,12 @@ static int liquidio_xmit(struct sk_buff *skb, struct net_device *netdev)
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/* defer sending if queue is full */
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stats->tx_iq_busy++;
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netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n",
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ndata.q_no);
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lio->txq);
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return NETDEV_TX_BUSY;
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}
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}
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/* pr_info(" XMIT - valid Qs: %d, 1st Q no: %d, cpu: %d, q_no:%d\n",
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* lio->linfo.num_txpciq, lio->txq, cpu, ndata.q_no );
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* lio->linfo.num_txpciq, lio->txq, cpu, ndata.q_no);
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*/
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ndata.datasize = skb->len;
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@ -2969,6 +2968,7 @@ static int liquidio_xmit(struct sk_buff *skb, struct net_device *netdev)
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if (skb_shinfo(skb)->nr_frags == 0) {
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cmdsetup.s.u.datasize = skb->len;
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octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag);
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/* Offload checksum calculation for TCP/UDP packets */
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dptr = dma_map_single(&oct->pci_dev->dev,
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skb->data,
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@ -3716,8 +3716,8 @@ static int setup_nic_devices(struct octeon_device *octeon_dev)
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octeon_dev->priv_flags = 0x0;
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if (netdev->features & NETIF_F_LRO)
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liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE,
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OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
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liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE,
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OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
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liquidio_set_feature(netdev, OCTNET_CMD_ENABLE_VLAN_FILTER, 0);
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@ -34,6 +34,7 @@
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#define LIQUIDIO_MICRO_VERSION ".1"
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#define LIQUIDIO_PACKAGE ""
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#define LIQUIDIO_VERSION "1.4.1"
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#define CONTROL_IQ 0
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/** Tag types used by Octeon cores in its work. */
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enum octeon_tag_type {
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@ -295,7 +296,7 @@ union octnet_cmd {
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#define OCTNET_CMD_SIZE (sizeof(union octnet_cmd))
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/* Instruction Header (DPI - CN23xx) - for OCTEON-III models */
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/* Instruction Header(DPI) - for OCTEON-III models */
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struct octeon_instr_ih3 {
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#ifdef __BIG_ENDIAN_BITFIELD
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@ -345,7 +346,7 @@ struct octeon_instr_ih3 {
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#endif
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};
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/* Optional PKI Instruction Header(PKI IH) - for OCTEON CN23XX models */
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/* Optional PKI Instruction Header(PKI IH) - for OCTEON-III models */
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/** BIG ENDIAN format. */
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struct octeon_instr_pki_ih3 {
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#ifdef __BIG_ENDIAN_BITFIELD
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@ -226,7 +226,7 @@ struct octeon_oq_config {
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*/
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u64 refill_threshold:16;
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/** If set, the Output queue uses info-pointer mode. (Default: 1 ) */
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/** If set, the Output queue uses info-pointer mode. (Default: 1) */
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u64 info_ptr:32;
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/* Max number of OQs available */
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@ -236,7 +236,7 @@ struct octeon_oq_config {
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/* Max number of OQs available */
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u64 max_oqs:8;
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/** If set, the Output queue uses info-pointer mode. (Default: 1 ) */
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/** If set, the Output queue uses info-pointer mode. (Default: 1) */
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u64 info_ptr:32;
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/** The number of buffers that were consumed during packet processing by
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@ -223,7 +223,7 @@ static void CVMX_BOOTMEM_NAMED_GET_NAME(struct octeon_device *oct,
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u32 len)
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{
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addr += offsetof(struct cvmx_bootmem_named_block_desc, name);
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octeon_pci_read_core_mem(oct, addr, str, len);
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octeon_pci_read_core_mem(oct, addr, (u8 *)str, len);
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str[len] = 0;
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}
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@ -375,7 +375,7 @@ static void octeon_remote_unlock(void)
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int octeon_console_send_cmd(struct octeon_device *oct, char *cmd_str,
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u32 wait_hundredths)
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{
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u32 len = strlen(cmd_str);
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u32 len = (u32)strlen(cmd_str);
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dev_dbg(&oct->pci_dev->dev, "sending \"%s\" to bootloader\n", cmd_str);
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@ -483,7 +483,7 @@ static void check_console(struct work_struct *work)
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struct octeon_console *console;
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struct cavium_wk *wk = (struct cavium_wk *)work;
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struct octeon_device *oct = (struct octeon_device *)wk->ctxptr;
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size_t console_num = wk->ctxul;
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u32 console_num = (u32)wk->ctxul;
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u32 delay;
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console = &oct->console[console_num];
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@ -506,7 +506,7 @@ static void check_console(struct work_struct *work)
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console_buffer, bytes_read);
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}
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} else if (bytes_read < 0) {
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dev_err(&oct->pci_dev->dev, "Error reading console %lu, ret=%d\n",
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dev_err(&oct->pci_dev->dev, "Error reading console %u, ret=%d\n",
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console_num, bytes_read);
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}
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@ -518,7 +518,7 @@ static void check_console(struct work_struct *work)
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*/
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if (octeon_console_debug_enabled(console_num) &&
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(total_read == 0) && (console->leftover[0])) {
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dev_info(&oct->pci_dev->dev, "%lu: %s\n",
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dev_info(&oct->pci_dev->dev, "%u: %s\n",
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console_num, console->leftover);
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console->leftover[0] = '\0';
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}
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@ -700,7 +700,7 @@ static int octeon_console_read(struct octeon_device *oct, u32 console_num,
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bytes_to_read = console->buffer_size - rd_idx;
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octeon_pci_read_core_mem(oct, console->output_base_addr + rd_idx,
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buffer, bytes_to_read);
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(u8 *)buffer, bytes_to_read);
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octeon_write_device_mem32(oct, console->addr +
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offsetof(struct octeon_pci_console,
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output_read_index),
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@ -440,10 +440,10 @@ static struct octeon_config_ptr {
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};
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static char oct_dev_state_str[OCT_DEV_STATES + 1][32] = {
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"BEGIN", "PCI-MAP-DONE", "DISPATCH-INIT-DONE",
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"BEGIN", "PCI-MAP-DONE", "DISPATCH-INIT-DONE",
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"IQ-INIT-DONE", "SCBUFF-POOL-INIT-DONE", "RESPLIST-INIT-DONE",
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"DROQ-INIT-DONE", "IO-QUEUES-INIT-DONE", "CONSOLE-INIT-DONE",
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"HOST-READY", "CORE-READY", "RUNNING", "IN-RESET",
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"HOST-READY", "CORE-READY", "RUNNING", "IN-RESET",
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"INVALID"
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};
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@ -221,7 +221,7 @@ struct octeon_fn_list {
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/* Structure for named memory blocks
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* Number of descriptors
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* available can be changed without affecting compatiblity,
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* available can be changed without affecting compatibility,
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* but name length changes require a bump in the bootmem
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* descriptor version
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* Note: This structure must be naturally 64 bit aligned, as a single
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@ -254,7 +254,7 @@ struct oct_fw_info {
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struct cavium_wk {
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struct delayed_work work;
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void *ctxptr;
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size_t ctxul;
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u64 ctxul;
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};
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struct cavium_wq {
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@ -92,6 +92,11 @@ static inline void *octeon_get_dispatch_arg(struct octeon_device *octeon_dev,
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return fn_arg;
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}
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/** Check for packets on Droq. This function should be called with
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* lock held.
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* @param droq - Droq on which count is checked.
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* @return Returns packet count.
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*/
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u32 octeon_droq_check_hw_for_pkts(struct octeon_droq *droq)
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{
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u32 pkt_count = 0;
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@ -183,7 +188,6 @@ octeon_droq_setup_ring_buffers(struct octeon_device *oct,
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droq->recv_buf_list[i].buffer = buf;
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droq->recv_buf_list[i].data = get_rbd(buf);
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droq->info_list[i].length = 0;
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/* map ring buffers into memory */
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@ -556,7 +560,9 @@ octeon_droq_dispatch_pkt(struct octeon_device *oct,
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droq->stats.dropped_nomem++;
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}
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} else {
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dev_err(&oct->pci_dev->dev, "DROQ: No dispatch function\n");
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dev_err(&oct->pci_dev->dev, "DROQ: No dispatch function (opcode %u/%u)\n",
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(unsigned int)rh->r.opcode,
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(unsigned int)rh->r.subcode);
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droq->stats.dropped_nodispatch++;
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} /* else (dispatch_fn ... */
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@ -641,6 +647,7 @@ octeon_droq_fast_process_packets(struct octeon_device *oct,
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pg_info->page = NULL;
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droq->recv_buf_list[droq->read_idx].buffer =
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NULL;
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INCR_INDEX_BY1(droq->read_idx, droq->max_count);
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droq->refill_count++;
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} else {
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@ -735,7 +742,7 @@ octeon_droq_process_packets(struct octeon_device *oct,
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if (pkt_count > budget)
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pkt_count = budget;
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/* Grab the lock */
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/* Grab the droq lock */
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spin_lock(&droq->lock);
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pkts_processed = octeon_droq_fast_process_packets(oct, droq, pkt_count);
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@ -99,7 +99,7 @@ struct octeon_instr_queue {
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u32 rsvd:17;
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/* Controls the periodic flushing of iq */
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/* Controls whether extra flushing of IQ is done on Tx */
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u32 do_auto_flush:1;
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u32 status:8;
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@ -124,7 +124,6 @@ struct lio {
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/* work queue for txq status */
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struct cavium_wq txq_status_wq;
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};
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#define LIO_SIZE (sizeof(struct lio))
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@ -349,6 +349,7 @@ __add_to_request_list(struct octeon_instr_queue *iq,
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iq->request_list[idx].reqtype = reqtype;
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}
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/* Can only run in process context */
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int
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lio_process_iq_request_list(struct octeon_device *oct,
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struct octeon_instr_queue *iq, u32 napi_budget)
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@ -405,6 +406,7 @@ lio_process_iq_request_list(struct octeon_device *oct,
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flags);
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} else {
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if (sc->callback) {
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/* This callback must not sleep */
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sc->callback(oct, OCTEON_REQUEST_DONE,
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sc->callback_arg);
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}
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@ -521,7 +523,7 @@ static void check_db_timeout(struct work_struct *work)
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{
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struct cavium_wk *wk = (struct cavium_wk *)work;
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struct octeon_device *oct = (struct octeon_device *)wk->ctxptr;
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unsigned long iq_no = wk->ctxul;
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u64 iq_no = wk->ctxul;
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struct cavium_wq *db_wq = &oct->check_db_wq[iq_no];
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u32 delay = 10;
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@ -550,7 +552,7 @@ octeon_send_command(struct octeon_device *oct, u32 iq_no,
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INCR_INSTRQUEUE_PKT_COUNT(oct, iq_no, bytes_sent, datasize);
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INCR_INSTRQUEUE_PKT_COUNT(oct, iq_no, instr_posted, 1);
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if (iq->fill_cnt >= iq->fill_threshold || force_db)
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if (force_db)
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ring_doorbell(oct, iq);
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} else {
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INCR_INSTRQUEUE_PKT_COUNT(oct, iq_no, instr_dropped, 1);
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