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ARM: dts: rockchip: Fix gic/efuse sort ordering for rk3288 

It can be seen that 0xffb40000 < 0xffc01000, thus efuse comes first.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Douglas Anderson 2019-03-20 13:13:59 -07:00 committed by Heiko Stuebner
parent a008eae695
commit a2b2012eab
1 changed files with 13 additions and 13 deletions
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26
arch/arm/boot/dts/rk3288.dtsi
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@ -1379,19 +1379,6 @@
reg = <0x0 0xffaf0080 0x0 0x20>;
};
gic: interrupt-controller@ffc01000 {
compatible = "arm,gic-400";
interrupt-controller;
#interrupt-cells = <3>;
#address-cells = <0>;
reg = <0x0 0xffc01000 0x0 0x1000>,
<0x0 0xffc02000 0x0 0x2000>,
<0x0 0xffc04000 0x0 0x2000>,
<0x0 0xffc06000 0x0 0x2000>;
interrupts = <GIC_PPI 9 0xf04>;
};
efuse: efuse@ffb40000 {
compatible = "rockchip,rk3288-efuse";
reg = <0x0 0xffb40000 0x0 0x20>;
@ -1405,6 +1392,19 @@
};
};
gic: interrupt-controller@ffc01000 {
compatible = "arm,gic-400";
interrupt-controller;
#interrupt-cells = <3>;
#address-cells = <0>;
reg = <0x0 0xffc01000 0x0 0x1000>,
<0x0 0xffc02000 0x0 0x2000>,
<0x0 0xffc04000 0x0 0x2000>,
<0x0 0xffc06000 0x0 0x2000>;
interrupts = <GIC_PPI 9 0xf04>;
};
pinctrl: pinctrl {
compatible = "rockchip,rk3288-pinctrl";
rockchip,grf = <&grf>;