add support secure firmware for exynos
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJRYvieAAoJEA0Cl+kVi2xq75IP/0yWplek6QrI6Xf1pWu2QJbb VLHzk1d/dQ7ufebVLyWwtSKmoC9NiBOknr2xFXv9acpY0L/LkorQixTwGxaej65V xf1ye6Ph8HOVPPOtMGBXkP8wURfVNwlcsGAVp9T8TagIPQvbunLr9y7jD052tgVL 6+GkV8Zk0wNzrKHa2yoCoXFN80UHlbOEEfIMWWPUEnA8a/KpK5qX7t6dVXJARJPG mWJF27RR0q47+ZqwtENOrwylIAvrlZ5/ZsrWeWE0dg6luZtGYLfbbFLjFz+yT+Zm 4n75EAXOtLtzCydGKIZUonr0HpKYc2Ihv5IngkxKY94uT+djO6vZMLgjf7auAIZR GKieMfYrsRae1EZTsbxe+Ps5Btlby6nrL4xfNrqV2WYgR70D7+0qih90QfzdEoN5 oCRU4jkoX1Rszb4Eh277Ke8UMaZYCW9MvaYeVXSIiXQIyo745UjXcuFYL+PwnKH0 SDih2sE35JpAwKvQt/dMdUNdsOXJKQDGtqg+4FSgLDzaPcsEsS5p3f0TXMfrfygR xYbTttmwQXasatWAo7jgT0dqhm8d7JFiBmVWNIvJ01MMzmmAlTHwFzaqJddwsji4 iTemAEDvQdfJ7UNvJZ7Fd5k55XEBWVBMAECMyfM1MEpbyyKavr7nUGsPpEITsLnM g7ALbXtbnpPtxRjKRFfL =OIUa -----END PGP SIGNATURE----- Merge tag 'secure-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/firmware From Kukjin Kim <kgene.kim@samsung.com>: add support secure firmware for exynos * tag 'secure-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Add secure firmware support to secondary CPU bring-up ARM: EXYNOS: Add IO mapping for non-secure SYSRAM. ARM: EXYNOS: Add support for Exynos secure firmware ARM: EXYNOS: Add support for secure monitor calls ARM: Add interface for registering and calling firmware-specific operations Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
a1faef961b
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@ -0,0 +1,88 @@
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Interface for registering and calling firmware-specific operations for ARM.
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----
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Written by Tomasz Figa <t.figa@samsung.com>
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Some boards are running with secure firmware running in TrustZone secure
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world, which changes the way some things have to be initialized. This makes
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a need to provide an interface for such platforms to specify available firmware
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operations and call them when needed.
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Firmware operations can be specified using struct firmware_ops
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struct firmware_ops {
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/*
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* Enters CPU idle mode
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*/
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int (*do_idle)(void);
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/*
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* Sets boot address of specified physical CPU
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*/
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int (*set_cpu_boot_addr)(int cpu, unsigned long boot_addr);
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/*
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* Boots specified physical CPU
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*/
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int (*cpu_boot)(int cpu);
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/*
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* Initializes L2 cache
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*/
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int (*l2x0_init)(void);
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};
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and then registered with register_firmware_ops function
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void register_firmware_ops(const struct firmware_ops *ops)
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the ops pointer must be non-NULL.
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There is a default, empty set of operations provided, so there is no need to
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set anything if platform does not require firmware operations.
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To call a firmware operation, a helper macro is provided
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#define call_firmware_op(op, ...) \
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((firmware_ops->op) ? firmware_ops->op(__VA_ARGS__) : (-ENOSYS))
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the macro checks if the operation is provided and calls it or otherwise returns
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-ENOSYS to signal that given operation is not available (for example, to allow
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fallback to legacy operation).
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Example of registering firmware operations:
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/* board file */
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static int platformX_do_idle(void)
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{
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/* tell platformX firmware to enter idle */
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return 0;
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}
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static int platformX_cpu_boot(int i)
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{
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/* tell platformX firmware to boot CPU i */
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return 0;
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}
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static const struct firmware_ops platformX_firmware_ops = {
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.do_idle = exynos_do_idle,
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.cpu_boot = exynos_cpu_boot,
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/* other operations not available on platformX */
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};
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/* init_early callback of machine descriptor */
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static void __init board_init_early(void)
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{
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register_firmware_ops(&platformX_firmware_ops);
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}
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Example of using a firmware operation:
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/* some platform code, e.g. SMP initialization */
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__raw_writel(virt_to_phys(exynos4_secondary_startup),
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CPU1_BOOT_REG);
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/* Call Exynos specific smc call */
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if (call_firmware_op(cpu_boot, cpu) == -ENOSYS)
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cpu_boot_legacy(...); /* Try legacy way */
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gic_raise_softirq(cpumask_of(cpu), 1);
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@ -6,3 +6,13 @@ Required root node properties:
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- compatible = should be one or more of the following.
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(a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board.
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(b) "samsung,exynos4210" - for boards based on Exynos4210 SoC.
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Optional:
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- firmware node, specifying presence and type of secure firmware:
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- compatible: only "samsung,secure-firmware" is currently supported
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- reg: address of non-secure SYSRAM used for communication with firmware
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firmware@0203F000 {
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compatible = "samsung,secure-firmware";
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reg = <0x0203F000 0x1000>;
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};
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@ -2,6 +2,8 @@
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# Makefile for the linux kernel.
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#
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obj-y += firmware.o
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obj-$(CONFIG_ICST) += icst.o
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obj-$(CONFIG_SA1111) += sa1111.o
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obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
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@ -0,0 +1,18 @@
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/*
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* Copyright (C) 2012 Samsung Electronics.
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* Kyungmin Park <kyungmin.park@samsung.com>
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* Tomasz Figa <t.figa@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/suspend.h>
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#include <asm/firmware.h>
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static const struct firmware_ops default_firmware_ops;
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const struct firmware_ops *firmware_ops = &default_firmware_ops;
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@ -0,0 +1,66 @@
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/*
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* Copyright (C) 2012 Samsung Electronics.
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* Kyungmin Park <kyungmin.park@samsung.com>
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* Tomasz Figa <t.figa@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARM_FIRMWARE_H
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#define __ASM_ARM_FIRMWARE_H
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#include <linux/bug.h>
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/*
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* struct firmware_ops
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*
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* A structure to specify available firmware operations.
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*
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* A filled up structure can be registered with register_firmware_ops().
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*/
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struct firmware_ops {
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/*
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* Enters CPU idle mode
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*/
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int (*do_idle)(void);
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/*
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* Sets boot address of specified physical CPU
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*/
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int (*set_cpu_boot_addr)(int cpu, unsigned long boot_addr);
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/*
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* Boots specified physical CPU
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*/
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int (*cpu_boot)(int cpu);
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/*
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* Initializes L2 cache
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*/
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int (*l2x0_init)(void);
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};
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/* Global pointer for current firmware_ops structure, can't be NULL. */
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extern const struct firmware_ops *firmware_ops;
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/*
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* call_firmware_op(op, ...)
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*
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* Checks if firmware operation is present and calls it,
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* otherwise returns -ENOSYS
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*/
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#define call_firmware_op(op, ...) \
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((firmware_ops->op) ? firmware_ops->op(__VA_ARGS__) : (-ENOSYS))
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/*
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* register_firmware_ops(ops)
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*
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* A function to register platform firmware_ops struct.
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*/
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static inline void register_firmware_ops(const struct firmware_ops *ops)
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{
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BUG_ON(!ops);
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firmware_ops = ops;
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}
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#endif
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@ -24,6 +24,12 @@ obj-$(CONFIG_SMP) += platsmp.o headsmp.o
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obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
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obj-$(CONFIG_ARCH_EXYNOS) += exynos-smc.o
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obj-$(CONFIG_ARCH_EXYNOS) += firmware.o
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plus_sec := $(call as-instr,.arch_extension sec,+sec)
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AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec)
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# machine support
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obj-$(CONFIG_MACH_SMDKC210) += mach-smdkv310.o
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@ -232,6 +232,33 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
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},
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};
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static struct map_desc exynos4210_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_SYSRAM_NS,
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.pfn = __phys_to_pfn(EXYNOS4210_PA_SYSRAM_NS),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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};
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static struct map_desc exynos4x12_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_SYSRAM_NS,
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.pfn = __phys_to_pfn(EXYNOS4x12_PA_SYSRAM_NS),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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};
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static struct map_desc exynos5250_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_SYSRAM_NS,
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.pfn = __phys_to_pfn(EXYNOS5250_PA_SYSRAM_NS),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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};
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static struct map_desc exynos5_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S3C_VA_SYS,
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@ -360,6 +387,11 @@ static void __init exynos4_map_io(void)
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else
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iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
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if (soc_is_exynos4210())
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iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc));
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if (soc_is_exynos4212() || soc_is_exynos4412())
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iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc));
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/* initialize device information early */
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exynos4_default_sdhci0();
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exynos4_default_sdhci1();
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@ -392,6 +424,9 @@ static void __init exynos4_map_io(void)
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static void __init exynos5_map_io(void)
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{
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iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
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if (soc_is_exynos5250())
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iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
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}
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static void __init exynos5440_map_io(void)
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@ -30,6 +30,8 @@ void exynos_init_late(void);
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void exynos4_clk_init(struct device_node *np);
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void exynos4_clk_register_fixed_ext(unsigned long, unsigned long);
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void exynos_firmware_init(void);
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#ifdef CONFIG_PM_GENERIC_DOMAINS
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int exynos_pm_late_initcall(void);
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#else
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@ -0,0 +1,22 @@
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/*
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* Copyright (C) 2012 Samsung Electronics.
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*
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* Copied from omap-smc.S Copyright (C) 2010 Texas Instruments, Inc.
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*
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* This program is free software,you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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/*
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* Function signature: void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3)
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*/
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ENTRY(exynos_smc)
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stmfd sp!, {r4-r11, lr}
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dsb
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smc #0
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ldmfd sp!, {r4-r11, pc}
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ENDPROC(exynos_smc)
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@ -0,0 +1,70 @@
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/*
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* Copyright (C) 2012 Samsung Electronics.
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* Kyungmin Park <kyungmin.park@samsung.com>
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* Tomasz Figa <t.figa@samsung.com>
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*
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* This program is free software,you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/init.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <asm/firmware.h>
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#include <mach/map.h>
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#include "smc.h"
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static int exynos_do_idle(void)
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{
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exynos_smc(SMC_CMD_SLEEP, 0, 0, 0);
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return 0;
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}
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static int exynos_cpu_boot(int cpu)
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{
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exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
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return 0;
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}
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static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
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{
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void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu;
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__raw_writel(boot_addr, boot_reg);
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return 0;
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}
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static const struct firmware_ops exynos_firmware_ops = {
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.do_idle = exynos_do_idle,
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.set_cpu_boot_addr = exynos_set_cpu_boot_addr,
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.cpu_boot = exynos_cpu_boot,
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};
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void __init exynos_firmware_init(void)
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{
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if (of_have_populated_dt()) {
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struct device_node *nd;
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const __be32 *addr;
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nd = of_find_compatible_node(NULL, NULL,
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"samsung,secure-firmware");
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if (!nd)
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return;
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addr = of_get_address(nd, 0, NULL, NULL);
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if (!addr) {
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pr_err("%s: No address specified.\n", __func__);
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return;
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}
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}
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pr_info("Running under secure firmware.\n");
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register_firmware_ops(&exynos_firmware_ops);
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}
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@ -26,6 +26,9 @@
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#define EXYNOS4_PA_SYSRAM0 0x02025000
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#define EXYNOS4_PA_SYSRAM1 0x02020000
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#define EXYNOS5_PA_SYSRAM 0x02020000
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#define EXYNOS4210_PA_SYSRAM_NS 0x0203F000
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#define EXYNOS4x12_PA_SYSRAM_NS 0x0204F000
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#define EXYNOS5250_PA_SYSRAM_NS 0x0204F000
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#define EXYNOS4_PA_FIMC0 0x11800000
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#define EXYNOS4_PA_FIMC1 0x11810000
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@ -57,6 +57,7 @@ DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
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.smp = smp_ops(exynos_smp_ops),
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.init_irq = exynos4_init_irq,
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.map_io = exynos4_dt_map_io,
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.init_early = exynos_firmware_init,
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.init_machine = exynos4_dt_machine_init,
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.init_late = exynos_init_late,
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.init_time = exynos_init_time,
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@ -25,6 +25,7 @@
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_scu.h>
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#include <asm/firmware.h>
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#include <mach/hardware.h>
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#include <mach/regs-clock.h>
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@ -145,10 +146,21 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
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timeout = jiffies + (1 * HZ);
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while (time_before(jiffies, timeout)) {
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unsigned long boot_addr;
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smp_rmb();
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__raw_writel(virt_to_phys(exynos4_secondary_startup),
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cpu_boot_reg(phys_cpu));
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boot_addr = virt_to_phys(exynos4_secondary_startup);
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/*
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* Try to set boot address using firmware first
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* and fall back to boot register if it fails.
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*/
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if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr))
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__raw_writel(boot_addr, cpu_boot_reg(phys_cpu));
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call_firmware_op(cpu_boot, phys_cpu);
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arch_send_wakeup_ipi_mask(cpumask_of(cpu));
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if (pen_release == -1)
|
||||
|
|
@ -204,10 +216,20 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
|
|||
* system-wide flags register. The boot monitor waits
|
||||
* until it receives a soft interrupt, and then the
|
||||
* secondary CPU branches to this address.
|
||||
*
|
||||
* Try using firmware operation first and fall back to
|
||||
* boot register if it fails.
|
||||
*/
|
||||
for (i = 1; i < max_cpus; ++i)
|
||||
__raw_writel(virt_to_phys(exynos4_secondary_startup),
|
||||
cpu_boot_reg(cpu_logical_map(i)));
|
||||
for (i = 1; i < max_cpus; ++i) {
|
||||
unsigned long phys_cpu;
|
||||
unsigned long boot_addr;
|
||||
|
||||
phys_cpu = cpu_logical_map(i);
|
||||
boot_addr = virt_to_phys(exynos4_secondary_startup);
|
||||
|
||||
if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr))
|
||||
__raw_writel(boot_addr, cpu_boot_reg(phys_cpu));
|
||||
}
|
||||
}
|
||||
|
||||
struct smp_operations exynos_smp_ops __initdata = {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,31 @@
|
|||
/*
|
||||
* Copyright (c) 2012 Samsung Electronics.
|
||||
*
|
||||
* EXYNOS - SMC Call
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_EXYNOS_SMC_H
|
||||
#define __ASM_ARCH_EXYNOS_SMC_H
|
||||
|
||||
#define SMC_CMD_INIT (-1)
|
||||
#define SMC_CMD_INFO (-2)
|
||||
/* For Power Management */
|
||||
#define SMC_CMD_SLEEP (-3)
|
||||
#define SMC_CMD_CPU1BOOT (-4)
|
||||
#define SMC_CMD_CPU0AFTR (-5)
|
||||
/* For CP15 Access */
|
||||
#define SMC_CMD_C15RESUME (-11)
|
||||
/* For L2 Cache Access */
|
||||
#define SMC_CMD_L2X0CTRL (-21)
|
||||
#define SMC_CMD_L2X0SETUP1 (-22)
|
||||
#define SMC_CMD_L2X0SETUP2 (-23)
|
||||
#define SMC_CMD_L2X0INVALL (-24)
|
||||
#define SMC_CMD_L2X0DEBUG (-25)
|
||||
|
||||
extern void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3);
|
||||
|
||||
#endif
|
||||
|
|
@ -22,6 +22,7 @@
|
|||
#define S5P_VA_GPIO3 S3C_ADDR(0x02280000)
|
||||
|
||||
#define S5P_VA_SYSRAM S3C_ADDR(0x02400000)
|
||||
#define S5P_VA_SYSRAM_NS S3C_ADDR(0x02410000)
|
||||
#define S5P_VA_DMC0 S3C_ADDR(0x02440000)
|
||||
#define S5P_VA_DMC1 S3C_ADDR(0x02480000)
|
||||
#define S5P_VA_SROMC S3C_ADDR(0x024C0000)
|
||||
|
|
|
|||
Loading…
Reference in New Issue