UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

Changes for GPMC (General Purpose Memory Controller) that take it 

closer for being just a regular device driver.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJQUQu9AAoJEBvUPslcq6Vz8AQQALVhM5PoomGlr4OkTFEc7+xy
 9r1W9NMbD0EX91o5SrdOCSvEaGSV3eKpe2nNGWXNhDwrpDz/Zeci2Ga/ADJdIx+h
 OxbMtx4o9hakSKJAgQAtnc8Ay9Ao5zYcDfMv2kVi8/iQ+CpVnzhZT9HN4rFv0eQF
 +7xhWlni10iqGyAEKVO1FajNZMO7qYdwXNq1XeuDNV3dFV/vOoaCVQbcH/+dyaRQ
 Wqq8BtYuZ3ELu2GiM7rJJMVu/c7AimHjmsXvO4nJ3fkD+izPaqHroNZFyNtHIv0k
 Hc6iWuxN9KnbKXv0Yioc78jDUxumUBToMfniBB9f7S69uKFBFB7FZQjxxje2KTZ8
 HWgUOHWPW3jKM24xfaZhtWtn+swSkSJcZB2DC4shK/nHF2WHH1zaWNVF6NOE/uk0
 nC3cGNOnsSw+jTbl0/CtxBOnpA8RCV3yeW+Fg+iH8v310yrZChtBh6e3ptlHoYl9
 2vZ4xEO2LRBa9MIq5RyLoei+omJFkiugkp75Ln3UrwjbfQyiH0HTWoI9nzkI8HF3
 CiyA7k6aDQ+Qp82L5WEvAh04Z8af2BZSDp6TlC4yEgBXV9Y4ssF8rhHvqBIzv1hC
 d6ohUGdwYQcVfL8xbVUwcbUaTvJcqmxNy20vkhEdqdYMrLWnjy09Nxbl8EJxe6Hh
 zvILFXH7sTIjXBGN3RlN
 =A43b
 -----END PGP SIGNATURE-----
mergetag object cf3a6ec2c0
 type commit
 tag cleanup-omap-tags-for-v3.7
 tagger Tony Lindgren <tony@atomide.com> 1347323254 -0700
 
 Remove the ancient omap specific atags that are no longer needed.
 
 At some point we were planning to pass the bootloader information
 with custom atags that did not work out too well.
 
 There's no need for these any longer as the kernel has been booting
 fine without them for quite some time. And Now we have device tree
 support that can be used instead.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJQToX6AAoJEBvUPslcq6VznGYP/141pkbT7BL112e8zMQrAWRb
 eKCJKw58J+XJZ4BTOCCqDwcGvKn0ZjRaCx7rtBmQVi1Pc7r4hmbPUwn6GSIMUTKY
 BKaCsfQFs1mS/uXXJcWV2JkXuKxooEsEP8KD7ctO5GgjBgTjPIIa45OG7qZMBqKL
 CYrjGRuaXJqtP9OR7Ad3gcbAkfCaYAIxvi+bb7jHHfYYQKJCLPPWno0aSEMRqvAm
 qZmRzc4CIzfBTxTixOvBsxa2MluViUTwtu+p6hpvhKvVO80QjJCL4kgdWk4hiSSe
 hWxHRsnA+aLX9vyuBwEWzDJ3ty0C3gur+F1bJpwtkQR/YUEmgak+pOQbe5WlA6rr
 9oonRue886c3QjyubY5k9uLWWC/wTnnPmztoGdDiWyDA89dJFjHGvK7tngKL/xz+
 cLhT5pHJnWSPiFlEWQbwU3znaA+rzbVbxwyDdIzl6KWyvq+m4rlCLHfv+StoC/4V
 JakoQTANNv3CIXwDpZiO0Ci4UwPzbr6SnUHCpuBauF4LpTIKUWp3wS/Vbl1rk2nr
 5huY48Dq5+itzFT8AoWMe+efjOI+pkKVOiuvdfMcd7qYKaFjqOCeEDOcFSKm7cq8
 gDDFG4BleDSVE69N+VR83+wZqCNtVEEeJiRWdNXmOE3laYbxfy3lJceZ0nejakLI
 hz+gFKrWiULXmQXkZh/J
 =utuw
 -----END PGP SIGNATURE-----

Merge tags 'omap-devel-gpmc-fixed-for-v3.7' and 'cleanup-omap-tags-for-v3.7' into cleanup-sparseirq

Changes for GPMC (General Purpose Memory Controller) that take it
closer for being just a regular device driver.

Remove the ancient omap specific atags that are no longer needed.

At some point we were planning to pass the bootloader information
with custom atags that did not work out too well.

There's no need for these any longer as the kernel has been booting
fine without them for quite some time. And Now we have device tree
support that can be used instead.
This commit is contained in:
Tony Lindgren 2012-09-12 18:05:19 -07:00
parent cdd86b277d 5c4684557b cf3a6ec2c0
commit a1e01703ba
434 changed files with 3306 additions and 2196 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
Documentation/ABI/testing/sysfs-bus-pci
View File

@ -210,3 +210,15 @@ Users:
firmware assigned instance number of the PCI
device that can help in understanding the firmware
intended order of the PCI device.
What: /sys/bus/pci/devices/.../d3cold_allowed
Date: July 2012
Contact: Huang Ying <ying.huang@intel.com>
Description:
d3cold_allowed is bit to control whether the corresponding PCI
device can be put into D3Cold state. If it is cleared, the
device will never be put into D3Cold state. If it is set, the
device may be put into D3Cold state if other requirements are
satisfied too. Reading this attribute will show the current
value of d3cold_allowed bit. Writing this attribute will set
the value of d3cold_allowed bit.

10
Documentation/block/00-INDEX
View File

@ -3,15 +3,21 @@
biodoc.txt
- Notes on the Generic Block Layer Rewrite in Linux 2.5
capability.txt
- Generic Block Device Capability (/sys/block/<disk>/capability)
- Generic Block Device Capability (/sys/block/<device>/capability)
cfq-iosched.txt
- CFQ IO scheduler tunables
data-integrity.txt
- Block data integrity
deadline-iosched.txt
- Deadline IO scheduler tunables
ioprio.txt
- Block io priorities (in CFQ scheduler)
queue-sysfs.txt
- Queue's sysfs entries
request.txt
- The members of struct request (in include/linux/blkdev.h)
stat.txt
- Block layer statistics in /sys/block/<dev>/stat
- Block layer statistics in /sys/block/<device>/stat
switching-sched.txt
- Switching I/O schedulers at runtime
writeback_cache_control.txt

77
Documentation/block/cfq-iosched.txt
View File

@ -1,3 +1,14 @@
CFQ (Complete Fairness Queueing)
===============================
The main aim of CFQ scheduler is to provide a fair allocation of the disk
I/O bandwidth for all the processes which requests an I/O operation.
CFQ maintains the per process queue for the processes which request I/O
operation(syncronous requests). In case of asynchronous requests, all the
requests from all the processes are batched together according to their
process's I/O priority.
CFQ ioscheduler tunables
========================
@ -25,6 +36,72 @@ there are multiple spindles behind single LUN (Host based hardware RAID
controller or for storage arrays), setting slice_idle=0 might end up in better
throughput and acceptable latencies.
back_seek_max
-------------
This specifies, given in Kbytes, the maximum "distance" for backward seeking.
The distance is the amount of space from the current head location to the
sectors that are backward in terms of distance.
This parameter allows the scheduler to anticipate requests in the "backward"
direction and consider them as being the "next" if they are within this
distance from the current head location.
back_seek_penalty
-----------------
This parameter is used to compute the cost of backward seeking. If the
backward distance of request is just 1/back_seek_penalty from a "front"
request, then the seeking cost of two requests is considered equivalent.
So scheduler will not bias toward one or the other request (otherwise scheduler
will bias toward front request). Default value of back_seek_penalty is 2.
fifo_expire_async
-----------------
This parameter is used to set the timeout of asynchronous requests. Default
value of this is 248ms.
fifo_expire_sync
----------------
This parameter is used to set the timeout of synchronous requests. Default
value of this is 124ms. In case to favor synchronous requests over asynchronous
one, this value should be decreased relative to fifo_expire_async.
slice_async
-----------
This parameter is same as of slice_sync but for asynchronous queue. The
default value is 40ms.
slice_async_rq
--------------
This parameter is used to limit the dispatching of asynchronous request to
device request queue in queue's slice time. The maximum number of request that
are allowed to be dispatched also depends upon the io priority. Default value
for this is 2.
slice_sync
----------
When a queue is selected for execution, the queues IO requests are only
executed for a certain amount of time(time_slice) before switching to another
queue. This parameter is used to calculate the time slice of synchronous
queue.
time_slice is computed using the below equation:-
time_slice = slice_sync + (slice_sync/5 * (4 - prio)). To increase the
time_slice of synchronous queue, increase the value of slice_sync. Default
value is 100ms.
quantum
-------
This specifies the number of request dispatched to the device queue. In a
queue's time slice, a request will not be dispatched if the number of request
in the device exceeds this parameter. This parameter is used for synchronous
request.
In case of storage with several disk, this setting can limit the parallel
processing of request. Therefore, increasing the value can imporve the
performace although this can cause the latency of some I/O to increase due
to more number of requests.
CFQ IOPS Mode for group scheduling
===================================
Basic CFQ design is to provide priority based time slices. Higher priority

64
Documentation/block/queue-sysfs.txt
View File

@ -9,20 +9,71 @@ These files are the ones found in the /sys/block/xxx/queue/ directory.
Files denoted with a RO postfix are readonly and the RW postfix means
read-write.
add_random (RW)
----------------
This file allows to trun off the disk entropy contribution. Default
value of this file is '1'(on).
discard_granularity (RO)
-----------------------
This shows the size of internal allocation of the device in bytes, if
reported by the device. A value of '0' means device does not support
the discard functionality.
discard_max_bytes (RO)
----------------------
Devices that support discard functionality may have internal limits on
the number of bytes that can be trimmed or unmapped in a single operation.
The discard_max_bytes parameter is set by the device driver to the maximum
number of bytes that can be discarded in a single operation. Discard
requests issued to the device must not exceed this limit. A discard_max_bytes
value of 0 means that the device does not support discard functionality.
discard_zeroes_data (RO)
------------------------
When read, this file will show if the discarded block are zeroed by the
device or not. If its value is '1' the blocks are zeroed otherwise not.
hw_sector_size (RO)
-------------------
This is the hardware sector size of the device, in bytes.
iostats (RW)
-------------
This file is used to control (on/off) the iostats accounting of the
disk.
logical_block_size (RO)
-----------------------
This is the logcal block size of the device, in bytes.
max_hw_sectors_kb (RO)
----------------------
This is the maximum number of kilobytes supported in a single data transfer.
max_integrity_segments (RO)
---------------------------
When read, this file shows the max limit of integrity segments as
set by block layer which a hardware controller can handle.
max_sectors_kb (RW)
-------------------
This is the maximum number of kilobytes that the block layer will allow
for a filesystem request. Must be smaller than or equal to the maximum
size allowed by the hardware.
max_segments (RO)
-----------------
Maximum number of segments of the device.
max_segment_size (RO)
---------------------
Maximum segment size of the device.
minimum_io_size (RO)
--------------------
This is the smallest preferred io size reported by the device.
nomerges (RW)
-------------
This enables the user to disable the lookup logic involved with IO
@ -45,11 +96,24 @@ per-block-cgroup request pool. IOW, if there are N block cgroups,
each request queue may have upto N request pools, each independently
regulated by nr_requests.
optimal_io_size (RO)
--------------------
This is the optimal io size reported by the device.
physical_block_size (RO)
------------------------
This is the physical block size of device, in bytes.
read_ahead_kb (RW)
------------------
Maximum number of kilobytes to read-ahead for filesystems on this block
device.
rotational (RW)
---------------
This file is used to stat if the device is of rotational type or
non-rotational type.
rq_affinity (RW)
----------------
If this option is '1', the block layer will migrate request completions to the

8
Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt
View File

@ -10,8 +10,8 @@ Required properties:
- compatible : Should be "fsl,<chip>-esdhc"
Optional properties:
- fsl,cd-internal : Indicate to use controller internal card detection
- fsl,wp-internal : Indicate to use controller internal write protection
- fsl,cd-controller : Indicate to use controller internal card detection
- fsl,wp-controller : Indicate to use controller internal write protection
Examples:
@ -19,8 +19,8 @@ esdhc@70004000 {
compatible = "fsl,imx51-esdhc";
reg = <0x70004000 0x4000>;
interrupts = <1>;
fsl,cd-internal;
fsl,wp-internal;
fsl,cd-controller;
fsl,wp-controller;
};
esdhc@70008000 {

2
Documentation/feature-removal-schedule.txt
View File

@ -579,7 +579,7 @@ Why: KVM tracepoints provide mostly equivalent information in a much more
----------------------------
What: at91-mci driver ("CONFIG_MMC_AT91")
When: 3.7
When: 3.8
Why: There are two mci drivers: at91-mci and atmel-mci. The PDC support
was added to atmel-mci as a first step to support more chips.
Then at91-mci was kept only for old IP versions (on at91rm9200 and

2
Documentation/watchdog/src/watchdog-test.c
View File

@ -31,7 +31,7 @@ static void keep_alive(void)
* or "-e" to enable the card.
*/
void term(int sig)
static void term(int sig)
{
close(fd);
fprintf(stderr, "Stopping watchdog ticks...\n");

2
Makefile
View File

@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 6
SUBLEVEL = 0
EXTRAVERSION = -rc3
EXTRAVERSION = -rc5
NAME = Saber-toothed Squirrel
# *DOCUMENTATION*

3
arch/arm/Kconfig
View File

@ -6,7 +6,7 @@ config ARM
select HAVE_DMA_API_DEBUG
select HAVE_IDE if PCI || ISA || PCMCIA
select HAVE_DMA_ATTRS
select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)
select HAVE_DMA_CONTIGUOUS if MMU
select HAVE_MEMBLOCK
select RTC_LIB
select SYS_SUPPORTS_APM_EMULATION
@ -2144,6 +2144,7 @@ source "drivers/cpufreq/Kconfig"
config CPU_FREQ_IMX
tristate "CPUfreq driver for i.MX CPUs"
depends on ARCH_MXC && CPU_FREQ
select CPU_FREQ_TABLE
help
This enables the CPUfreq driver for i.MX CPUs.

5
arch/arm/boot/dts/am33xx.dtsi
View File

@ -154,5 +154,10 @@
#size-cells = <0>;
ti,hwmods = "i2c3";
};
wdt2: wdt@44e35000 {
compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
};
};
};

2
arch/arm/boot/dts/at91sam9g25ek.dts
View File

@ -15,7 +15,7 @@
compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
chosen {
bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
};
ahb {

4
arch/arm/boot/dts/imx51-babbage.dts
View File

@ -25,8 +25,8 @@
aips@70000000 { /* aips-1 */
spba@70000000 {
esdhc@70004000 { /* ESDHC1 */
fsl,cd-internal;
fsl,wp-internal;
fsl,cd-controller;
fsl,wp-controller;
status = "okay";
};

6
arch/arm/boot/dts/kirkwood-iconnect.dts
View File

@ -41,9 +41,13 @@
};
power-blue {
label = "power:blue";
gpios = <&gpio1 11 0>;
gpios = <&gpio1 10 0>;
linux,default-trigger = "timer";
};
power-red {
label = "power:red";
gpios = <&gpio1 11 0>;
};
usb1 {
label = "usb1:blue";
gpios = <&gpio1 12 0>;

3
arch/arm/boot/dts/twl6030.dtsi
View File

@ -66,6 +66,7 @@
vcxio: regulator@8 {
compatible = "ti,twl6030-vcxio";
regulator-always-on;
};
vusb: regulator@9 {
@ -74,10 +75,12 @@
v1v8: regulator@10 {
compatible = "ti,twl6030-v1v8";
regulator-always-on;
};
v2v1: regulator@11 {
compatible = "ti,twl6030-v2v1";
regulator-always-on;
};
clk32kg: regulator@12 {

2
arch/arm/configs/armadillo800eva_defconfig
View File

@ -33,7 +33,7 @@ CONFIG_AEABI=y
CONFIG_FORCE_MAX_ZONEORDER=13
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096"
CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw"
CONFIG_CMDLINE_FORCE=y
CONFIG_KEXEC=y
CONFIG_VFP=y

1
arch/arm/configs/u8500_defconfig
View File

@ -86,6 +86,7 @@ CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_LM3530=y
CONFIG_LEDS_LP5521=y
CONFIG_LEDS_GPIO=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AB8500=y
CONFIG_RTC_DRV_PL031=y

7
arch/arm/include/asm/dma-mapping.h
View File

@ -202,6 +202,13 @@ static inline void dma_free_writecombine(struct device *dev, size_t size,
return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
}
/*
* This can be called during early boot to increase the size of the atomic
* coherent DMA pool above the default value of 256KiB. It must be called
* before postcore_initcall.
*/
extern void __init init_dma_coherent_pool_size(unsigned long size);
/*
* This can be called during boot to increase the size of the consistent
* DMA region above it's default value of 2MB. It must be called before the

2
arch/arm/mach-at91/at91rm9200_time.c
View File

@ -197,7 +197,7 @@ void __init at91rm9200_timer_init(void)
at91_st_read(AT91_ST_SR);
/* Make IRQs happen for the system timer */
setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
setup_irq(NR_IRQS_LEGACY + AT91_ID_SYS, &at91rm9200_timer_irq);
/* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used
* directly for the clocksource and all clockevents, after adjusting

6
arch/arm/mach-at91/at91sam9260_devices.c
View File

@ -726,6 +726,8 @@ static struct resource rtt_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_IRQ,
},
};
@ -744,10 +746,12 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed:
* GPBR will serve as the storage for RTC time offset
*/
at91sam9260_rtt_device.num_resources = 2;
at91sam9260_rtt_device.num_resources = 3;
rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)

6
arch/arm/mach-at91/at91sam9261_devices.c
View File

@ -609,6 +609,8 @@ static struct resource rtt_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_IRQ,
}
};
@ -626,10 +628,12 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed:
* GPBR will serve as the storage for RTC time offset
*/
at91sam9261_rtt_device.num_resources = 2;
at91sam9261_rtt_device.num_resources = 3;
rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)

10
arch/arm/mach-at91/at91sam9263_devices.c
View File

@ -990,6 +990,8 @@ static struct resource rtt0_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_IRQ,
}
};
@ -1006,6 +1008,8 @@ static struct resource rtt1_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_IRQ,
}
};
@ -1027,14 +1031,14 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed only for the chosen RTT:
* GPBR will serve as the storage for RTC time offset
*/
at91sam9263_rtt0_device.num_resources = 2;
at91sam9263_rtt0_device.num_resources = 3;
at91sam9263_rtt1_device.num_resources = 1;
pdev = &at91sam9263_rtt0_device;
r = rtt0_resources;
break;
case 1:
at91sam9263_rtt0_device.num_resources = 1;
at91sam9263_rtt1_device.num_resources = 2;
at91sam9263_rtt1_device.num_resources = 3;
pdev = &at91sam9263_rtt1_device;
r = rtt1_resources;
break;
@ -1047,6 +1051,8 @@ static void __init at91_add_device_rtt_rtc(void)
pdev->name = "rtc-at91sam9";
r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
r[1].end = r[1].start + 3;
r[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
r[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)

6
arch/arm/mach-at91/at91sam9g45_devices.c
View File

@ -1293,6 +1293,8 @@ static struct resource rtt_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_IRQ,
}
};
@ -1310,10 +1312,12 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed:
* GPBR will serve as the storage for RTC time offset
*/
at91sam9g45_rtt_device.num_resources = 2;
at91sam9g45_rtt_device.num_resources = 3;
rtt_resources[1].start = AT91SAM9G45_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)

6
arch/arm/mach-at91/at91sam9rl_devices.c
View File

@ -688,6 +688,8 @@ static struct resource rtt_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_IRQ,
}
};
@ -705,10 +707,12 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed:
* GPBR will serve as the storage for RTC time offset
*/
at91sam9rl_rtt_device.num_resources = 2;
at91sam9rl_rtt_device.num_resources = 3;
rtt_resources[1].start = AT91SAM9RL_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)

12
arch/arm/mach-at91/clock.c
View File

@ -63,6 +63,12 @@ EXPORT_SYMBOL_GPL(at91_pmc_base);
#define cpu_has_300M_plla() (cpu_is_at91sam9g10())
#define cpu_has_240M_plla() (cpu_is_at91sam9261() \
|| cpu_is_at91sam9263() \
|| cpu_is_at91sam9rl())
#define cpu_has_210M_plla() (cpu_is_at91sam9260())
#define cpu_has_pllb() (!(cpu_is_at91sam9rl() \
|| cpu_is_at91sam9g45() \
|| cpu_is_at91sam9x5() \
@ -706,6 +712,12 @@ static int __init at91_pmc_init(unsigned long main_clock)
} else if (cpu_has_800M_plla()) {
if (plla.rate_hz > 800000000)
pll_overclock = true;
} else if (cpu_has_240M_plla()) {
if (plla.rate_hz > 240000000)
pll_overclock = true;
} else if (cpu_has_210M_plla()) {
if (plla.rate_hz > 210000000)
pll_overclock = true;
} else {
if (plla.rate_hz > 209000000)
pll_overclock = true;

3
arch/arm/mach-dove/common.c
View File

@ -102,7 +102,8 @@ void __init dove_ehci1_init(void)
void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{
orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR);
IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR,
1600);
}
/*****************************************************************************

7
arch/arm/mach-exynos/mach-origen.c
View File

@ -42,6 +42,7 @@
#include <plat/backlight.h>
#include <plat/fb.h>
#include <plat/mfc.h>
#include <plat/hdmi.h>
#include <mach/ohci.h>
#include <mach/map.h>
@ -734,6 +735,11 @@ static void __init origen_bt_setup(void)
s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
}
/* I2C module and id for HDMIPHY */
static struct i2c_board_info hdmiphy_info = {
I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
};
static void s5p_tv_setup(void)
{
/* Direct HPD to HDMI chip */
@ -781,6 +787,7 @@ static void __init origen_machine_init(void)
s5p_tv_setup();
s5p_i2c_hdmiphy_set_platdata(NULL);
s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
#ifdef CONFIG_DRM_EXYNOS
s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;

7
arch/arm/mach-exynos/mach-smdkv310.c
View File

@ -40,6 +40,7 @@
#include <plat/mfc.h>
#include <plat/ehci.h>
#include <plat/clock.h>
#include <plat/hdmi.h>
#include <mach/map.h>
#include <mach/ohci.h>
@ -354,6 +355,11 @@ static struct platform_pwm_backlight_data smdkv310_bl_data = {
.pwm_period_ns = 1000,
};
/* I2C module and id for HDMIPHY */
static struct i2c_board_info hdmiphy_info = {
I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
};
static void s5p_tv_setup(void)
{
/* direct HPD to HDMI chip */
@ -388,6 +394,7 @@ static void __init smdkv310_machine_init(void)
s5p_tv_setup();
s5p_i2c_hdmiphy_set_platdata(NULL);
s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
samsung_keypad_set_platdata(&smdkv310_keypad_data);

1
arch/arm/mach-gemini/irq.c
View File

@ -17,6 +17,7 @@
#include <linux/sched.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <asm/system_misc.h>
#include <mach/hardware.h>
#define IRQ_SOURCE(base_addr) (base_addr + 0x00)

10
arch/arm/mach-imx/Makefile
View File

@ -9,7 +9,8 @@ obj-$(CONFIG_SOC_IMX27) += clk-imx27.o mm-imx27.o ehci-imx27.o
obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o
obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o
obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o
imx5-pm-$(CONFIG_PM) += pm-imx5.o
obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(imx5-pm-y) cpu_op-mx51.o
obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
clk-pfd.o clk-busy.o
@ -70,14 +71,13 @@ obj-$(CONFIG_DEBUG_LL) += lluart.o
obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
obj-$(CONFIG_HAVE_IMX_SRC) += src.o
obj-$(CONFIG_CPU_V7) += head-v7.o
AFLAGS_head-v7.o :=-Wa,-march=armv7-a
obj-$(CONFIG_SMP) += platsmp.o
AFLAGS_headsmp.o :=-Wa,-march=armv7-a
obj-$(CONFIG_SMP) += headsmp.o platsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
ifeq ($(CONFIG_PM),y)
obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o
obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o headsmp.o
endif
# i.MX5 based machines

8
arch/arm/mach-imx/clk-imx6q.c
View File

@ -152,7 +152,7 @@ enum mx6q_clks {
ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2,
ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ldb_di0_div_3_5, ldb_di1_div_3_5,
clk_max
};
@ -288,8 +288,10 @@ int __init mx6q_clocks_init(void)
clk[gpu3d_shader] = imx_clk_divider("gpu3d_shader", "gpu3d_shader_sel", base + 0x18, 29, 3);
clk[ipu1_podf] = imx_clk_divider("ipu1_podf", "ipu1_sel", base + 0x3c, 11, 3);
clk[ipu2_podf] = imx_clk_divider("ipu2_podf", "ipu2_sel", base + 0x3c, 16, 3);
clk[ldb_di0_podf] = imx_clk_divider("ldb_di0_podf", "ldb_di0_sel", base + 0x20, 10, 1);
clk[ldb_di1_podf] = imx_clk_divider("ldb_di1_podf", "ldb_di1_sel", base + 0x20, 11, 1);
clk[ldb_di0_div_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);
clk[ldb_di0_podf] = imx_clk_divider("ldb_di0_podf", "ldb_di0_div_3_5", base + 0x20, 10, 1);
clk[ldb_di1_div_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7);
clk[ldb_di1_podf] = imx_clk_divider("ldb_di1_podf", "ldb_di1_div_3_5", base + 0x20, 11, 1);
clk[ipu1_di0_pre] = imx_clk_divider("ipu1_di0_pre", "ipu1_di0_pre_sel", base + 0x34, 3, 3);
clk[ipu1_di1_pre] = imx_clk_divider("ipu1_di1_pre", "ipu1_di1_pre_sel", base + 0x34, 12, 3);
clk[ipu2_di0_pre] = imx_clk_divider("ipu2_di0_pre", "ipu2_di0_pre_sel", base + 0x38, 3, 3);

0
arch/arm/mach-imx/head-v7.S → arch/arm/mach-imx/headsmp.S
View File

23
arch/arm/mach-imx/hotplug.c
View File

@ -42,22 +42,6 @@ static inline void cpu_enter_lowpower(void)
: "cc");
}
static inline void cpu_leave_lowpower(void)
{
unsigned int v;
asm volatile(
"mrc p15, 0, %0, c1, c0, 0\n"
" orr %0, %0, %1\n"
" mcr p15, 0, %0, c1, c0, 0\n"
" mrc p15, 0, %0, c1, c0, 1\n"
" orr %0, %0, %2\n"
" mcr p15, 0, %0, c1, c0, 1\n"
: "=&r" (v)
: "Ir" (CR_C), "Ir" (0x40)
: "cc");
}
/*
* platform-specific code to shutdown a CPU
*
@ -67,11 +51,10 @@ void platform_cpu_die(unsigned int cpu)
{
cpu_enter_lowpower();
imx_enable_cpu(cpu, false);
cpu_do_idle();
cpu_leave_lowpower();
/* We should never return from idle */
panic("cpu %d unexpectedly exit from shutdown\n", cpu);
/* spin here until hardware takes it down */
while (1)
;
}
int platform_cpu_disable(unsigned int cpu)

4
arch/arm/mach-imx/mach-imx6q.c
View File

@ -71,7 +71,7 @@ soft:
/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
static int ksz9021rn_phy_fixup(struct phy_device *phydev)
{
if (IS_ENABLED(CONFIG_PHYLIB)) {
if (IS_BUILTIN(CONFIG_PHYLIB)) {
/* min rx data delay */
phy_write(phydev, 0x0b, 0x8105);
phy_write(phydev, 0x0c, 0x0000);
@ -112,7 +112,7 @@ put_clk:
static void __init imx6q_sabrelite_init(void)
{
if (IS_ENABLED(CONFIG_PHYLIB))
if (IS_BUILTIN(CONFIG_PHYLIB))
phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
ksz9021rn_phy_fixup);
imx6q_sabrelite_cko1_setup();

3
arch/arm/mach-kirkwood/Makefile.boot
View File

@ -7,7 +7,8 @@ dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns320.dtb
dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb
dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb
dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb
dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-qnap-ts219.dtb
dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6281.dtb
dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6282.dtb
dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb
dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb
dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb

11
arch/arm/mach-kirkwood/common.c
View File

@ -301,7 +301,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{
orion_ge00_init(eth_data,
GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
IRQ_KIRKWOOD_GE00_ERR);
IRQ_KIRKWOOD_GE00_ERR, 1600);
/* The interface forgets the MAC address assigned by u-boot if
the clock is turned off, so claim the clk now. */
clk_prepare_enable(ge0);
@ -315,7 +315,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
{
orion_ge01_init(eth_data,
GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
IRQ_KIRKWOOD_GE01_ERR);
IRQ_KIRKWOOD_GE01_ERR, 1600);
clk_prepare_enable(ge1);
}
@ -517,6 +517,13 @@ void __init kirkwood_wdt_init(void)
void __init kirkwood_init_early(void)
{
orion_time_set_base(TIMER_VIRT_BASE);
/*
* Some Kirkwood devices allocate their coherent buffers from atomic
* context. Increase size of atomic coherent pool to make sure such
* the allocations won't fail.
*/
init_dma_coherent_pool_size(SZ_1M);
}
int kirkwood_tclk;

1
arch/arm/mach-kirkwood/db88f6281-bp-setup.c
View File

@ -10,6 +10,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sizes.h>
#include <linux/platform_device.h>
#include <linux/mtd/partitions.h>
#include <linux/ata_platform.h>

2
arch/arm/mach-mmp/sram.c
View File

@ -68,7 +68,7 @@ static int __devinit sram_probe(struct platform_device *pdev)
struct resource *res;
int ret = 0;
if (!pdata && !pdata->pool_name)
if (!pdata || !pdata->pool_name)
return -ENODEV;
info = kzalloc(sizeof(*info), GFP_KERNEL);

2
arch/arm/mach-mv78xx0/addr-map.c
View File

@ -37,7 +37,7 @@
#define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
#define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4))
static void __init __iomem *win_cfg_base(int win)
static void __init __iomem *win_cfg_base(const struct orion_addr_map_cfg *cfg, int win)
{
/*
* Find the control register base address for this window.

6
arch/arm/mach-mv78xx0/common.c
View File

@ -213,7 +213,8 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{
orion_ge00_init(eth_data,
GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
IRQ_MV78XX0_GE_ERR);
IRQ_MV78XX0_GE_ERR,
MV643XX_TX_CSUM_DEFAULT_LIMIT);
}
@ -224,7 +225,8 @@ void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
{
orion_ge01_init(eth_data,
GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
NO_IRQ);
NO_IRQ,
MV643XX_TX_CSUM_DEFAULT_LIMIT);
}

1
arch/arm/mach-omap1/board-ams-delta.c
View File

@ -37,7 +37,6 @@
#include <plat/board-ams-delta.h>
#include <plat/keypad.h>
#include <plat/mux.h>
#include <plat/board.h>
#include <mach/hardware.h>
#include <mach/ams-delta-fiq.h>

1
arch/arm/mach-omap1/board-fsample.c
View File

@ -32,7 +32,6 @@
#include <plat/flash.h>
#include <plat/fpga.h>
#include <plat/keypad.h>
#include <plat/board.h>
#include <mach/hardware.h>

6
arch/arm/mach-omap1/board-generic.c
View File

@ -23,7 +23,6 @@
#include <asm/mach/map.h>
#include <plat/mux.h>
#include <plat/board.h>
#include <mach/usb.h>
@ -52,9 +51,6 @@ static struct omap_usb_config generic1610_usb_config __initdata = {
};
#endif
static struct omap_board_config_kernel generic_config[] __initdata = {
};
static void __init omap_generic_init(void)
{
#ifdef CONFIG_ARCH_OMAP15XX
@ -76,8 +72,6 @@ static void __init omap_generic_init(void)
}
#endif
omap_board_config = generic_config;
omap_board_config_size = ARRAY_SIZE(generic_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
}

1
arch/arm/mach-omap1/board-htcherald.c
View File

@ -42,7 +42,6 @@
#include <asm/mach/arch.h>
#include <plat/omap7xx.h>
#include <plat/board.h>
#include <plat/keypad.h>
#include <plat/mmc.h>

1
arch/arm/mach-omap1/board-nokia770.c
View File

@ -26,7 +26,6 @@
#include <asm/mach/map.h>
#include <plat/mux.h>
#include <plat/board.h>
#include <plat/keypad.h>
#include <plat/lcd_mipid.h>
#include <plat/mmc.h>

1
arch/arm/mach-omap1/board-osk.c
View File

@ -39,6 +39,7 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c/tps65010.h>
#include <linux/platform_data/omap1_bl.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

2
arch/arm/mach-omap1/board-palmte.c
View File

@ -28,6 +28,7 @@
#include <linux/interrupt.h>
#include <linux/apm-emulation.h>
#include <linux/omapfb.h>
#include <linux/platform_data/omap1_bl.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -37,7 +38,6 @@
#include <plat/mux.h>
#include <plat/tc.h>
#include <plat/dma.h>
#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>

2
arch/arm/mach-omap1/board-palmtt.c
View File

@ -27,6 +27,7 @@
#include <linux/omapfb.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/platform_data/omap1_bl.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -37,7 +38,6 @@
#include <plat/mux.h>
#include <plat/dma.h>
#include <plat/tc.h>
#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>

2
arch/arm/mach-omap1/board-palmz71.c
View File

@ -30,6 +30,7 @@
#include <linux/omapfb.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/platform_data/omap1_bl.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -39,7 +40,6 @@
#include <plat/mux.h>
#include <plat/dma.h>
#include <plat/tc.h>
#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>

1
arch/arm/mach-omap1/board-perseus2.c
View File

@ -32,7 +32,6 @@
#include <plat/fpga.h>
#include <plat/flash.h>
#include <plat/keypad.h>
#include <plat/board.h>
#include <mach/hardware.h>

1
arch/arm/mach-omap1/board-sx1.c
View File

@ -38,7 +38,6 @@
#include <plat/dma.h>
#include <plat/irda.h>
#include <plat/tc.h>
#include <plat/board.h>
#include <plat/keypad.h>
#include <plat/board-sx1.h>

6
arch/arm/mach-omap1/board-voiceblue.c
View File

@ -35,7 +35,6 @@
#include <plat/flash.h>
#include <plat/mux.h>
#include <plat/tc.h>
#include <plat/board.h>
#include <mach/hardware.h>
#include <mach/usb.h>
@ -155,9 +154,6 @@ static struct omap_usb_config voiceblue_usb_config __initdata = {
.pins[2] = 6,
};
static struct omap_board_config_kernel voiceblue_config[] = {
};
#define MACHINE_PANICED 1
#define MACHINE_REBOOTING 2
#define MACHINE_REBOOT 4
@ -275,8 +271,6 @@ static void __init voiceblue_init(void)
voiceblue_smc91x_resources[1].start = gpio_to_irq(8);
voiceblue_smc91x_resources[1].end = gpio_to_irq(8);
platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
omap_board_config = voiceblue_config;
omap_board_config_size = ARRAY_SIZE(voiceblue_config);
omap_serial_init();
omap1_usb_init(&voiceblue_usb_config);
omap_register_i2c_bus(1, 100, NULL, 0);

8
arch/arm/mach-omap1/clock_data.c
View File

@ -25,7 +25,6 @@
#include <plat/clock.h>
#include <plat/cpu.h>
#include <plat/clkdev_omap.h>
#include <plat/board.h>
#include <plat/sram.h> /* for omap_sram_reprogram_clock() */
#include <mach/hardware.h>
@ -788,7 +787,6 @@ u32 cpu_mask;
int __init omap1_clk_init(void)
{
struct omap_clk *c;
const struct omap_clock_config *info;
int crystal_type = 0; /* Default 12 MHz */
u32 reg;
@ -837,12 +835,6 @@ int __init omap1_clk_init(void)
ck_dpll1_p = clk_get(NULL, "ck_dpll1");
ck_ref_p = clk_get(NULL, "ck_ref");
info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
if (info != NULL) {
if (!cpu_is_omap15xx())
crystal_type = info->system_clock_type;
}
if (cpu_is_omap7xx())
ck_ref.rate = 13000000;
if (cpu_is_omap16xx() && crystal_type == 2)

1
arch/arm/mach-omap1/devices.c
View File

@ -20,7 +20,6 @@
#include <asm/mach/map.h>
#include <plat/tc.h>
#include <plat/board.h>
#include <plat/mux.h>
#include <plat/dma.h>
#include <plat/mmc.h>

1
arch/arm/mach-omap1/serial.c
View File

@ -22,7 +22,6 @@
#include <asm/mach-types.h>
#include <plat/board.h>
#include <plat/mux.h>
#include <plat/fpga.h>

3
arch/arm/mach-omap2/Kconfig
View File

@ -62,13 +62,14 @@ config ARCH_OMAP4
select PM_OPP if PM
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select ARM_CPU_SUSPEND if PM
select ARCH_NEEDS_CPU_IDLE_COUPLED
select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
config SOC_OMAP5
bool "TI OMAP5"
select CPU_V7
select ARM_GIC
select HAVE_SMP
select ARM_CPU_SUSPEND if PM
comment "OMAP Core Type"
depends on ARCH_OMAP2

1
arch/arm/mach-omap2/board-2430sdp.c
View File

@ -33,7 +33,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/usb.h>

6
arch/arm/mach-omap2/board-3430sdp.c
View File

@ -31,7 +31,6 @@
#include <asm/mach/map.h>
#include <plat/mcspi.h>
#include <plat/board.h>
#include <plat/usb.h>
#include "common.h"
#include <plat/dma.h>
@ -191,9 +190,6 @@ static struct omap_dss_board_info sdp3430_dss_data = {
.default_device = &sdp3430_lcd_device,
};
static struct omap_board_config_kernel sdp3430_config[] __initdata = {
};
static struct omap2_hsmmc_info mmc[] = {
{
.mmc = 1,
@ -576,8 +572,6 @@ static void __init omap_3430sdp_init(void)
int gpio_pendown;
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_board_config = sdp3430_config;
omap_board_config_size = ARRAY_SIZE(sdp3430_config);
omap_hsmmc_init(mmc);
omap3430_i2c_init();
omap_display_init(&sdp3430_dss_data);

6
arch/arm/mach-omap2/board-3630sdp.c
View File

@ -17,7 +17,6 @@
#include <asm/mach/arch.h>
#include "common.h"
#include <plat/board.h>
#include <plat/gpmc-smc91x.h>
#include <plat/usb.h>
@ -67,9 +66,6 @@ static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
.reset_gpio_port[2] = -EINVAL
};
static struct omap_board_config_kernel sdp_config[] __initdata = {
};
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
{ .reg_offset = OMAP_MUX_TERMINATOR },
@ -197,8 +193,6 @@ static struct flash_partitions sdp_flash_partitions[] = {
static void __init omap_sdp_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
omap_board_config = sdp_config;
omap_board_config_size = ARRAY_SIZE(sdp_config);
zoom_peripherals_init();
omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
h8mbx00u0mer0em_sdrc_params);

1
arch/arm/mach-omap2/board-4430sdp.c
View File

@ -34,7 +34,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
#include <plat/mmc.h>

9
arch/arm/mach-omap2/board-am3517crane.c
View File

@ -26,7 +26,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
@ -37,11 +36,6 @@
#define GPIO_USB_POWER 35
#define GPIO_USB_NRESET 38
/* Board initialization */
static struct omap_board_config_kernel am3517_crane_config[] __initdata = {
};
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
{ .reg_offset = OMAP_MUX_TERMINATOR },
@ -67,9 +61,6 @@ static void __init am3517_crane_init(void)
omap_serial_init();
omap_sdrc_init(NULL, NULL);
omap_board_config = am3517_crane_config;
omap_board_config_size = ARRAY_SIZE(am3517_crane_config);
/* Configure GPIO for EHCI port */
if (omap_mux_init_gpio(GPIO_USB_NRESET, OMAP_PIN_OUTPUT)) {
pr_err("Can not configure mux for GPIO_USB_NRESET %d\n",

6
arch/arm/mach-omap2/board-am3517evm.c
View File

@ -32,7 +32,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
#include <video/omapdss.h>
@ -324,9 +323,6 @@ static void am3517_evm_hecc_init(struct ti_hecc_platform_data *pdata)
platform_device_register(&am3517_hecc_device);
}
static struct omap_board_config_kernel am3517_evm_config[] __initdata = {
};
static struct omap2_hsmmc_info mmc[] = {
{
.mmc = 1,
@ -346,8 +342,6 @@ static struct omap2_hsmmc_info mmc[] = {
static void __init am3517_evm_init(void)
{
omap_board_config = am3517_evm_config;
omap_board_config_size = ARRAY_SIZE(am3517_evm_config);
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
am3517_evm_i2c_init();

1
arch/arm/mach-omap2/board-apollon.c
View File

@ -35,7 +35,6 @@
#include <asm/mach/flash.h>
#include <plat/led.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>

6
arch/arm/mach-omap2/board-cm-t35.c
View File

@ -37,7 +37,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <plat/nand.h>
#include <plat/gpmc.h>
@ -714,13 +713,8 @@ static inline void cm_t35_init_mux(void) {}
static inline void cm_t3730_init_mux(void) {}
#endif
static struct omap_board_config_kernel cm_t35_config[] __initdata = {
};
static void __init cm_t3x_common_init(void)
{
omap_board_config = cm_t35_config;
omap_board_config_size = ARRAY_SIZE(cm_t35_config);
omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
omap_serial_init();
omap_sdrc_init(mt46h32m32lf6_sdrc_params,

6
arch/arm/mach-omap2/board-cm-t3517.c
View File

@ -38,7 +38,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
#include <plat/nand.h>
@ -249,9 +248,6 @@ static void __init cm_t3517_init_nand(void)
static inline void cm_t3517_init_nand(void) {}
#endif
static struct omap_board_config_kernel cm_t3517_config[] __initdata = {
};
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
/* GPIO186 - Green LED */
@ -285,8 +281,6 @@ static void __init cm_t3517_init(void)
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_serial_init();
omap_sdrc_init(NULL, NULL);
omap_board_config = cm_t3517_config;
omap_board_config_size = ARRAY_SIZE(cm_t3517_config);
cm_t3517_init_leds();
cm_t3517_init_nand();
cm_t3517_init_rtc();

1
arch/arm/mach-omap2/board-devkit8000.c
View File

@ -40,7 +40,6 @@
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/nand.h>

1
arch/arm/mach-omap2/board-generic.c
View File

@ -20,7 +20,6 @@
#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
#include <plat/board.h>
#include "common.h"
#include "common-board-devices.h"

2
arch/arm/mach-omap2/board-h4.c
View File

@ -32,11 +32,11 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <plat/menelaus.h>
#include <plat/dma.h>
#include <plat/gpmc.h>
#include <plat/debug-devices.h>
#include <video/omapdss.h>
#include <video/omap-panel-generic-dpi.h>

3
arch/arm/mach-omap2/board-igep0020.c
View File

@ -29,7 +29,6 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/usb.h>
@ -554,6 +553,8 @@ static const struct usbhs_omap_board_data igep3_usbhs_bdata __initconst = {
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
/* SMSC9221 LAN Controller ETH IRQ (GPIO_176) */
OMAP3_MUX(MCSPI1_CS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#endif

1
arch/arm/mach-omap2/board-ldp.c
View File

@ -35,7 +35,6 @@
#include <asm/mach/map.h>
#include <plat/mcspi.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <mach/board-zoom.h>

1
arch/arm/mach-omap2/board-n8x0.c
View File

@ -25,7 +25,6 @@
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <plat/board.h>
#include "common.h"
#include <plat/menelaus.h>
#include <mach/irqs.h>

1
arch/arm/mach-omap2/board-omap3beagle.c
View File

@ -39,7 +39,6 @@
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <plat/board.h>
#include "common.h"
#include <video/omapdss.h>
#include <video/omap-panel-tfp410.h>

20
arch/arm/mach-omap2/board-omap3evm.c
View File

@ -45,7 +45,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include <plat/usb.h>
#include <plat/nand.h>
#include "common.h"
@ -58,6 +57,7 @@
#include "hsmmc.h"
#include "common-board-devices.h"
#define OMAP3_EVM_TS_GPIO 175
#define OMAP3_EVM_EHCI_VBUS 22
#define OMAP3_EVM_EHCI_SELECT 61
@ -74,6 +74,18 @@
#define OMAP3EVM_GEN1_ETHR_GPIO_RST 64
#define OMAP3EVM_GEN2_ETHR_GPIO_RST 7
/*
* OMAP35x EVM revision
* Run time detection of EVM revision is done by reading Ethernet
* PHY ID -
* GEN_1 = 0x01150000
* GEN_2 = 0x92200000
*/
enum {
OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
};
static u8 omap3_evm_version;
u8 get_omap3_evm_rev(void)
@ -525,9 +537,6 @@ static int __init omap3_evm_i2c_init(void)
return 0;
}
static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
};
static struct usbhs_omap_board_data usbhs_bdata __initdata = {
.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
@ -687,9 +696,6 @@ static void __init omap3_evm_init(void)
obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;
omap3_mux_init(obm, OMAP_PACKAGE_CBB);
omap_board_config = omap3_evm_config;
omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
omap_mux_init_gpio(63, OMAP_PIN_INPUT);
omap_hsmmc_init(mmc);

1
arch/arm/mach-omap2/board-omap3logic.c
View File

@ -41,7 +41,6 @@
#include "common-board-devices.h"
#include <plat/mux.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc-smsc911x.h>
#include <plat/gpmc.h>

1
arch/arm/mach-omap2/board-omap3pandora.c
View File

@ -40,7 +40,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <mach/hardware.h>
#include <plat/mcspi.h>

6
arch/arm/mach-omap2/board-omap3stalker.c
View File

@ -35,7 +35,6 @@
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/nand.h>
@ -362,9 +361,6 @@ static int __init omap3_stalker_i2c_init(void)
#define OMAP3_STALKER_TS_GPIO 175
static struct omap_board_config_kernel omap3_stalker_config[] __initdata = {
};
static struct platform_device *omap3_stalker_devices[] __initdata = {
&keys_gpio,
};
@ -399,8 +395,6 @@ static void __init omap3_stalker_init(void)
{
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
omap_board_config = omap3_stalker_config;
omap_board_config_size = ARRAY_SIZE(omap3_stalker_config);
omap_mux_init_gpio(23, OMAP_PIN_INPUT);
omap_hsmmc_init(mmc);

1
arch/arm/mach-omap2/board-omap3touchbook.c
View File

@ -44,7 +44,6 @@
#include <asm/mach/flash.h>
#include <asm/system_info.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/nand.h>

1
arch/arm/mach-omap2/board-omap4panda.c
View File

@ -39,7 +39,6 @@
#include <asm/mach/map.h>
#include <video/omapdss.h>
#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
#include <plat/mmc.h>

1
arch/arm/mach-omap2/board-overo.c
View File

@ -42,7 +42,6 @@
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <video/omapdss.h>
#include <video/omap-panel-generic-dpi.h>

1
arch/arm/mach-omap2/board-rx51-peripherals.c
View File

@ -28,7 +28,6 @@
#include <asm/system_info.h>
#include <plat/mcspi.h>
#include <plat/board.h>
#include "common.h"
#include <plat/dma.h>
#include <plat/gpmc.h>

1
arch/arm/mach-omap2/board-rx51.c
View File

@ -24,7 +24,6 @@
#include <asm/mach/map.h>
#include <plat/mcspi.h>
#include <plat/board.h>
#include "common.h"
#include <plat/dma.h>
#include <plat/gpmc.h>

6
arch/arm/mach-omap2/board-ti8168evm.c
View File

@ -21,7 +21,6 @@
#include <asm/mach/map.h>
#include <plat/irqs.h>
#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
@ -32,15 +31,10 @@ static struct omap_musb_board_data musb_board_data = {
.power = 500,
};
static struct omap_board_config_kernel ti81xx_evm_config[] __initdata = {
};
static void __init ti81xx_evm_init(void)
{
omap_serial_init();
omap_sdrc_init(NULL, NULL);
omap_board_config = ti81xx_evm_config;
omap_board_config_size = ARRAY_SIZE(ti81xx_evm_config);
usb_musb_init(&musb_board_data);
}

1
arch/arm/mach-omap2/board-zoom.c
View File

@ -22,7 +22,6 @@
#include <asm/mach/arch.h>
#include "common.h"
#include <plat/board.h>
#include <plat/usb.h>
#include <mach/board-zoom.h>

11
arch/arm/mach-omap2/common-board-devices.c
View File

@ -35,16 +35,6 @@ static struct omap2_mcspi_device_config ads7846_mcspi_config = {
.turbo_mode = 0,
};
/*
* ADS7846 driver maybe request a gpio according to the value
* of pdata->get_pendown_state, but we have done this. So set
* get_pendown_state to avoid twice gpio requesting.
*/
static int omap3_get_pendown_state(void)
{
return !gpio_get_value(OMAP3_EVM_TS_GPIO);
}
static struct ads7846_platform_data ads7846_config = {
.x_max = 0x0fff,
.y_max = 0x0fff,
@ -55,7 +45,6 @@ static struct ads7846_platform_data ads7846_config = {
.debounce_rep = 1,
.gpio_pendown = -EINVAL,
.keep_vref_on = 1,
.get_pendown_state = &omap3_get_pendown_state,
};
static struct spi_board_info ads7846_spi_board_info __initdata = {

1
arch/arm/mach-omap2/common-board-devices.h
View File

@ -4,7 +4,6 @@
#include "twl-common.h"
#define NAND_BLOCK_SIZE SZ_128K
#define OMAP3_EVM_TS_GPIO 175
struct mtd_partition;
struct ads7846_platform_data;

1
arch/arm/mach-omap2/common.c
View File

@ -18,7 +18,6 @@
#include <linux/io.h>
#include <plat/hardware.h>
#include <plat/board.h>
#include <plat/mux.h>
#include <plat/clock.h>

3
arch/arm/mach-omap2/cpuidle44xx.c
View File

@ -238,8 +238,9 @@ int __init omap4_idle_init(void)
for_each_cpu(cpu_id, cpu_online_mask) {
dev = &per_cpu(omap4_idle_dev, cpu_id);
dev->cpu = cpu_id;
#ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
dev->coupled_cpus = *cpu_online_mask;
#endif
cpuidle_register_driver(&omap4_idle_driver);
if (cpuidle_register_device(dev)) {

1
arch/arm/mach-omap2/devices.c
View File

@ -26,7 +26,6 @@
#include <asm/pmu.h>
#include "iomap.h"
#include <plat/board.h>
#include <plat/dma.h>
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>

29
arch/arm/mach-omap2/gpmc-nand.c
View File

@ -18,18 +18,25 @@
#include <plat/cpu.h>
#include <plat/nand.h>
#include <plat/board.h>
#include <plat/gpmc.h>
static struct resource gpmc_nand_resource = {
.flags = IORESOURCE_MEM,
static struct resource gpmc_nand_resource[] = {
{
.flags = IORESOURCE_MEM,
},
{
.flags = IORESOURCE_IRQ,
},
{
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device gpmc_nand_device = {
.name = "omap2-nand",
.id = 0,
.num_resources = 1,
.resource = &gpmc_nand_resource,
.num_resources = ARRAY_SIZE(gpmc_nand_resource),
.resource = gpmc_nand_resource,
};
static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data)
@ -75,6 +82,7 @@ static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data
gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 0);
gpmc_cs_configure(gpmc_nand_data->cs,
GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND);
gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_WP, 0);
err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t);
if (err)
return err;
@ -90,12 +98,19 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
gpmc_nand_device.dev.platform_data = gpmc_nand_data;
err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
&gpmc_nand_data->phys_base);
(unsigned long *)&gpmc_nand_resource[0].start);
if (err < 0) {
dev_err(dev, "Cannot request GPMC CS\n");
return err;
}
gpmc_nand_resource[0].end = gpmc_nand_resource[0].start +
NAND_IO_SIZE - 1;
gpmc_nand_resource[1].start =
gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
gpmc_nand_resource[2].start =
gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
/* Set timings in GPMC */
err = omap2_nand_gpmc_retime(gpmc_nand_data);
if (err < 0) {
@ -108,6 +123,8 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1);
}
gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
err = platform_device_register(&gpmc_nand_device);
if (err < 0) {
dev_err(dev, "Unable to register NAND device\n");

24
arch/arm/mach-omap2/gpmc-onenand.c
View File

@ -20,14 +20,21 @@
#include <plat/cpu.h>
#include <plat/onenand.h>
#include <plat/board.h>
#include <plat/gpmc.h>
#define ONENAND_IO_SIZE SZ_128K
static struct omap_onenand_platform_data *gpmc_onenand_data;
static struct resource gpmc_onenand_resource = {
.flags = IORESOURCE_MEM,
};
static struct platform_device gpmc_onenand_device = {
.name = "omap2-onenand",
.id = -1,
.num_resources = 1,
.resource = &gpmc_onenand_resource,
};
static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
@ -390,6 +397,8 @@ static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr)
void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
{
int err;
gpmc_onenand_data = _onenand_data;
gpmc_onenand_data->onenand_setup = gpmc_onenand_setup;
gpmc_onenand_device.dev.platform_data = gpmc_onenand_data;
@ -401,8 +410,19 @@ void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
gpmc_onenand_data->flags |= ONENAND_SYNC_READ;
}
err = gpmc_cs_request(gpmc_onenand_data->cs, ONENAND_IO_SIZE,
(unsigned long *)&gpmc_onenand_resource.start);
if (err < 0) {
pr_err("%s: Cannot request GPMC CS\n", __func__);
return;
}
gpmc_onenand_resource.end = gpmc_onenand_resource.start +
ONENAND_IO_SIZE - 1;
if (platform_device_register(&gpmc_onenand_device) < 0) {
printk(KERN_ERR "Unable to register OneNAND device\n");
pr_err("%s: Unable to register OneNAND device\n", __func__);
gpmc_cs_free(gpmc_onenand_data->cs);
return;
}
}

1
arch/arm/mach-omap2/gpmc-smc91x.c
View File

@ -17,7 +17,6 @@
#include <linux/io.h>
#include <linux/smc91x.h>
#include <plat/board.h>
#include <plat/gpmc.h>
#include <plat/gpmc-smc91x.h>

1
arch/arm/mach-omap2/gpmc-smsc911x.c
View File

@ -20,7 +20,6 @@
#include <linux/io.h>
#include <linux/smsc911x.h>
#include <plat/board.h>
#include <plat/gpmc.h>
#include <plat/gpmc-smsc911x.h>

156
arch/arm/mach-omap2/gpmc.c
View File

@ -78,6 +78,15 @@
#define ENABLE_PREFETCH (0x1 << 7)
#define DMA_MPU_MODE 2
/* XXX: Only NAND irq has been considered,currently these are the only ones used
*/
#define GPMC_NR_IRQ 2
struct gpmc_client_irq {
unsigned irq;
u32 bitmask;
};
/* Structure to save gpmc cs context */
struct gpmc_cs_config {
u32 config1;
@ -105,6 +114,10 @@ struct omap3_gpmc_regs {
struct gpmc_cs_config cs_context[GPMC_CS_NUM];
};
static struct gpmc_client_irq gpmc_client_irq[GPMC_NR_IRQ];
static struct irq_chip gpmc_irq_chip;
static unsigned gpmc_irq_start;
static struct resource gpmc_mem_root;
static struct resource gpmc_cs_mem[GPMC_CS_NUM];
static DEFINE_SPINLOCK(gpmc_mem_lock);
@ -682,6 +695,117 @@ int gpmc_prefetch_reset(int cs)
}
EXPORT_SYMBOL(gpmc_prefetch_reset);
void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
{
reg->gpmc_status = gpmc_base + GPMC_STATUS;
reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET +
GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs;
reg->gpmc_nand_address = gpmc_base + GPMC_CS0_OFFSET +
GPMC_CS_NAND_ADDRESS + GPMC_CS_SIZE * cs;
reg->gpmc_nand_data = gpmc_base + GPMC_CS0_OFFSET +
GPMC_CS_NAND_DATA + GPMC_CS_SIZE * cs;
reg->gpmc_prefetch_config1 = gpmc_base + GPMC_PREFETCH_CONFIG1;
reg->gpmc_prefetch_config2 = gpmc_base + GPMC_PREFETCH_CONFIG2;
reg->gpmc_prefetch_control = gpmc_base + GPMC_PREFETCH_CONTROL;
reg->gpmc_prefetch_status = gpmc_base + GPMC_PREFETCH_STATUS;
reg->gpmc_ecc_config = gpmc_base + GPMC_ECC_CONFIG;
reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL;
reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG;
reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT;
reg->gpmc_bch_result0 = gpmc_base + GPMC_ECC_BCH_RESULT_0;
}
int gpmc_get_client_irq(unsigned irq_config)
{
int i;
if (hweight32(irq_config) > 1)
return 0;
for (i = 0; i < GPMC_NR_IRQ; i++)
if (gpmc_client_irq[i].bitmask & irq_config)
return gpmc_client_irq[i].irq;
return 0;
}
static int gpmc_irq_endis(unsigned irq, bool endis)
{
int i;
u32 regval;
for (i = 0; i < GPMC_NR_IRQ; i++)
if (irq == gpmc_client_irq[i].irq) {
regval = gpmc_read_reg(GPMC_IRQENABLE);
if (endis)
regval |= gpmc_client_irq[i].bitmask;
else
regval &= ~gpmc_client_irq[i].bitmask;
gpmc_write_reg(GPMC_IRQENABLE, regval);
break;
}
return 0;
}
static void gpmc_irq_disable(struct irq_data *p)
{
gpmc_irq_endis(p->irq, false);
}
static void gpmc_irq_enable(struct irq_data *p)
{
gpmc_irq_endis(p->irq, true);
}
static void gpmc_irq_noop(struct irq_data *data) { }
static unsigned int gpmc_irq_noop_ret(struct irq_data *data) { return 0; }
static int gpmc_setup_irq(int gpmc_irq)
{
int i;
u32 regval;
if (!gpmc_irq)
return -EINVAL;
gpmc_irq_start = irq_alloc_descs(-1, 0, GPMC_NR_IRQ, 0);
if (IS_ERR_VALUE(gpmc_irq_start)) {
pr_err("irq_alloc_descs failed\n");
return gpmc_irq_start;
}
gpmc_irq_chip.name = "gpmc";
gpmc_irq_chip.irq_startup = gpmc_irq_noop_ret;
gpmc_irq_chip.irq_enable = gpmc_irq_enable;
gpmc_irq_chip.irq_disable = gpmc_irq_disable;
gpmc_irq_chip.irq_shutdown = gpmc_irq_noop;
gpmc_irq_chip.irq_ack = gpmc_irq_noop;
gpmc_irq_chip.irq_mask = gpmc_irq_noop;
gpmc_irq_chip.irq_unmask = gpmc_irq_noop;
gpmc_client_irq[0].bitmask = GPMC_IRQ_FIFOEVENTENABLE;
gpmc_client_irq[1].bitmask = GPMC_IRQ_COUNT_EVENT;
for (i = 0; i < GPMC_NR_IRQ; i++) {
gpmc_client_irq[i].irq = gpmc_irq_start + i;
irq_set_chip_and_handler(gpmc_client_irq[i].irq,
&gpmc_irq_chip, handle_simple_irq);
set_irq_flags(gpmc_client_irq[i].irq,
IRQF_VALID | IRQF_NOAUTOEN);
}
/* Disable interrupts */
gpmc_write_reg(GPMC_IRQENABLE, 0);
/* clear interrupts */
regval = gpmc_read_reg(GPMC_IRQSTATUS);
gpmc_write_reg(GPMC_IRQSTATUS, regval);
return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL);
}
static void __init gpmc_mem_init(void)
{
int cs;
@ -711,8 +835,8 @@ static void __init gpmc_mem_init(void)
static int __init gpmc_init(void)
{
u32 l, irq;
int cs, ret = -EINVAL;
u32 l;
int ret = -EINVAL;
int gpmc_irq;
char *ck = NULL;
@ -761,16 +885,7 @@ static int __init gpmc_init(void)
gpmc_write_reg(GPMC_SYSCONFIG, l);
gpmc_mem_init();
/* initalize the irq_chained */
irq = OMAP_GPMC_IRQ_BASE;
for (cs = 0; cs < GPMC_CS_NUM; cs++) {
irq_set_chip_and_handler(irq, &dummy_irq_chip,
handle_simple_irq);
set_irq_flags(irq, IRQF_VALID);
irq++;
}
ret = request_irq(gpmc_irq, gpmc_handle_irq, IRQF_SHARED, "gpmc", NULL);
ret = gpmc_setup_irq(gpmc_irq);
if (ret)
pr_err("gpmc: irq-%d could not claim: err %d\n",
gpmc_irq, ret);
@ -780,12 +895,19 @@ postcore_initcall(gpmc_init);
static irqreturn_t gpmc_handle_irq(int irq, void *dev)
{
u8 cs;
int i;
u32 regval;
/* check cs to invoke the irq */
cs = ((gpmc_read_reg(GPMC_PREFETCH_CONFIG1)) >> CS_NUM_SHIFT) & 0x7;
if (OMAP_GPMC_IRQ_BASE+cs <= OMAP_GPMC_IRQ_END)
generic_handle_irq(OMAP_GPMC_IRQ_BASE+cs);
regval = gpmc_read_reg(GPMC_IRQSTATUS);
if (!regval)
return IRQ_NONE;
for (i = 0; i < GPMC_NR_IRQ; i++)
if (regval & gpmc_client_irq[i].bitmask)
generic_handle_irq(gpmc_client_irq[i].irq);
gpmc_write_reg(GPMC_IRQSTATUS, regval);
return IRQ_HANDLED;
}

1
arch/arm/mach-omap2/mux.h
View File

@ -127,7 +127,6 @@ struct omap_mux_partition {
* @gpio: GPIO number
* @muxnames: available signal modes for a ball
* @balls: available balls on the package
* @partition: mux partition
*/
struct omap_mux {
u16 reg_offset;

2
arch/arm/mach-omap2/opp4xxx_data.c
View File

@ -94,7 +94,7 @@ int __init omap4_opp_init(void)
{
int r = -ENODEV;
if (!cpu_is_omap44xx())
if (!cpu_is_omap443x())
return r;
r = omap_init_opp_table(omap44xx_opp_def_list,

1
arch/arm/mach-omap2/pm-debug.c
View File

@ -28,7 +28,6 @@
#include <linux/slab.h>
#include <plat/clock.h>
#include <plat/board.h>
#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/dmtimer.h>

11
arch/arm/mach-omap2/pm24xx.c
View File

@ -38,7 +38,6 @@
#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/dma.h>
#include <plat/board.h>
#include <mach/irqs.h>
@ -352,16 +351,6 @@ int __init omap2_pm_init(void)
prcm_setup_regs();
/* Hack to prevent MPU retention when STI console is enabled. */
{
const struct omap_sti_console_config *sti;
sti = omap_get_config(OMAP_TAG_STI_CONSOLE,
struct omap_sti_console_config);
if (sti != NULL && sti->enable)
sti_console_enabled = 1;
}
/*
* We copy the assembler sleep/wakeup routines to SRAM.
* These routines need to be in SRAM as that's the only

21
arch/arm/mach-omap2/pm34xx.c
View File

@ -272,21 +272,16 @@ void omap_sram_idle(void)
per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
if (mpu_next_state < PWRDM_POWER_ON) {
pwrdm_pre_transition(mpu_pwrdm);
pwrdm_pre_transition(neon_pwrdm);
}
pwrdm_pre_transition(NULL);
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
pwrdm_pre_transition(per_pwrdm);
per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
omap2_gpio_prepare_for_idle(per_going_off);
}
/* CORE */
if (core_next_state < PWRDM_POWER_ON) {
pwrdm_pre_transition(core_pwrdm);
if (core_next_state == PWRDM_POWER_OFF) {
omap3_core_save_context();
omap3_cm_save_context();
@ -339,20 +334,14 @@ void omap_sram_idle(void)
omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
OMAP3430_GR_MOD,
OMAP3_PRM_VOLTCTRL_OFFSET);
pwrdm_post_transition(core_pwrdm);
}
omap3_intc_resume_idle();
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
omap2_gpio_resume_after_idle();
pwrdm_post_transition(per_pwrdm);
}
pwrdm_post_transition(NULL);
if (mpu_next_state < PWRDM_POWER_ON) {
pwrdm_post_transition(mpu_pwrdm);
pwrdm_post_transition(neon_pwrdm);
}
/* PER */
if (per_next_state < PWRDM_POWER_ON)
omap2_gpio_resume_after_idle();
}
static void omap3_pm_idle(void)

1
arch/arm/mach-omap2/serial.c
View File

@ -29,7 +29,6 @@
#include <plat/omap-serial.h>
#include "common.h"
#include <plat/board.h>
#include <plat/dma.h>
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>

8
arch/arm/mach-omap2/sleep44xx.S
View File

@ -56,9 +56,13 @@ ppa_por_params:
* The restore function pointer is stored at CPUx_WAKEUP_NS_PA_ADDR_OFFSET.
* It returns to the caller for CPU INACTIVE and ON power states or in case
* CPU failed to transition to targeted OFF/DORMANT state.
*
* omap4_finish_suspend() calls v7_flush_dcache_all() which doesn't save
* stack frame and it expects the caller to take care of it. Hence the entire
* stack frame is saved to avoid possible stack corruption.
*/
ENTRY(omap4_finish_suspend)
stmfd sp!, {lr}
stmfd sp!, {r4-r12, lr}
cmp r0, #0x0
beq do_WFI @ No lowpower state, jump to WFI
@ -226,7 +230,7 @@ scu_gp_clear:
skip_scu_gp_clear:
isb
dsb
ldmfd sp!, {pc}
ldmfd sp!, {r4-r12, pc}
ENDPROC(omap4_finish_suspend)
/*

1
arch/arm/mach-omap2/twl-common.c
View File

@ -67,6 +67,7 @@ void __init omap_pmic_init(int bus, u32 clkrate,
const char *pmic_type, int pmic_irq,
struct twl4030_platform_data *pmic_data)
{
omap_mux_init_signal("sys_nirq", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
strncpy(pmic_i2c_board_info.type, pmic_type,
sizeof(pmic_i2c_board_info.type));
pmic_i2c_board_info.irq = pmic_irq;

Some files were not shown because too many files have changed in this diff Show More