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media: dt-bindings: mediatek: convert mtk jpeg decoder/encoder to yaml 

Convert mediatek jpeg decoder and encoder bindings to yaml.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
This commit is contained in:
Hsin-Yi Wang 2021-12-06 14:04:23 +01:00 committed by Mauro Carvalho Chehab
parent 70b0911ad8
commit a16ce2f337
4 changed files with 169 additions and 73 deletions
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38
Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
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* Mediatek JPEG Decoder
Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
Required properties:
- compatible : must be one of the following string:
"mediatek,mt8173-jpgdec"
"mediatek,mt7623-jpgdec", "mediatek,mt2701-jpgdec"
"mediatek,mt2701-jpgdec"
- reg : physical base address of the jpeg decoder registers and length of
memory mapped region.
- interrupts : interrupt number to the interrupt controller.
- clocks: device clocks, see
Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
- clock-names: must contain "jpgdec-smi" and "jpgdec".
- power-domains: a phandle to the power domain, see
Documentation/devicetree/bindings/power/power_domain.txt for details.
- mediatek,larb: must contain the local arbiters in the current Socs, see
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
for details.
- iommus: should point to the respective IOMMU block with master port as
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
for details.
Example:
jpegdec: jpegdec@15004000 {
compatible = "mediatek,mt2701-jpgdec";
reg = <0 0x15004000 0 0x1000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
clocks = <&imgsys CLK_IMG_JPGDEC_SMI>,
<&imgsys CLK_IMG_JPGDEC>;
clock-names = "jpgdec-smi",
"jpgdec";
power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
mediatek,larb = <&larb2>;
iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
<&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
};

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Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/mediatek-jpeg-decoder.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek JPEG Decoder Device Tree Bindings
maintainers:
- Xia Jiang <xia.jiang@mediatek.com>
description: |-
Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
properties:
compatible:
oneOf:
- items:
- enum:
- mediatek,mt8173-jpgdec
- mediatek,mt2701-jpgdec
- items:
- enum:
- mediatek,mt7623-jpgdec
- const: mediatek,mt2701-jpgdec
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 2
minItems: 2
clock-names:
items:
- const: jpgdec-smi
- const: jpgdec
power-domains:
maxItems: 1
mediatek,larb:
$ref: '/schemas/types.yaml#/definitions/phandle'
description: |
Must contain the local arbiters in the current Socs, see
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
for details.
iommus:
maxItems: 2
description: |
Points to the respective IOMMU block with master port as argument, see
Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
Ports are according to the HW.
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- power-domains
- mediatek,larb
- iommus
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/mt2701-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/memory/mt2701-larb-port.h>
#include <dt-bindings/power/mt2701-power.h>
jpegdec: jpegdec@15004000 {
compatible = "mediatek,mt2701-jpgdec";
reg = <0x15004000 0x1000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
clocks = <&imgsys CLK_IMG_JPGDEC_SMI>,
<&imgsys CLK_IMG_JPGDEC>;
clock-names = "jpgdec-smi",
"jpgdec";
power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
mediatek,larb = <&larb2>;
iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
<&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
};

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Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
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* MediaTek JPEG Encoder
MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
Required properties:
- compatible : "mediatek,mt2701-jpgenc"
followed by "mediatek,mtk-jpgenc"
- reg : physical base address of the JPEG encoder registers and length of
memory mapped region.
- interrupts : interrupt number to the interrupt controller.
- clocks: device clocks, see
Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
- clock-names: must contain "jpgenc". It is the clock of JPEG encoder.
- power-domains: a phandle to the power domain, see
Documentation/devicetree/bindings/power/power_domain.txt for details.
- mediatek,larb: must contain the local arbiters in the current SoCs, see
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
for details.
- iommus: should point to the respective IOMMU block with master port as
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
for details.
Example:
jpegenc: jpegenc@1500a000 {
compatible = "mediatek,mt2701-jpgenc",
"mediatek,mtk-jpgenc";
reg = <0 0x1500a000 0 0x1000>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
clocks = <&imgsys CLK_IMG_VENC>;
clock-names = "jpgenc";
power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
mediatek,larb = <&larb2>;
iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
<&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;
};

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/mediatek-jpeg-encoder.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek JPEG Encoder Device Tree Bindings
maintainers:
- Xia Jiang <xia.jiang@mediatek.com>
description: |-
MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
properties:
compatible:
items:
- enum:
- mediatek,mt2701-jpgenc
- const: mediatek,mtk-jpgenc
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: jpgenc
power-domains:
maxItems: 1
mediatek,larb:
$ref: '/schemas/types.yaml#/definitions/phandle'
description: |
Must contain the local arbiters in the current Socs, see
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
for details.
iommus:
maxItems: 2
description: |
Points to the respective IOMMU block with master port as argument, see
Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
Ports are according to the HW.
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- power-domains
- mediatek,larb
- iommus
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/mt2701-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/memory/mt2701-larb-port.h>
#include <dt-bindings/power/mt2701-power.h>
jpegenc: jpegenc@1500a000 {
compatible = "mediatek,mt2701-jpgenc",
"mediatek,mtk-jpgenc";
reg = <0x1500a000 0x1000>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
clocks = <&imgsys CLK_IMG_VENC>;
clock-names = "jpgenc";
power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
mediatek,larb = <&larb2>;
iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
<&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;
};