Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: Revert "x86: default to reboot via ACPI" x86: align DirectMap in /proc/meminfo AMD IOMMU: fix lazy IO/TLB flushing in unmap path x86: add smp_mb() before sending INVALIDATE_TLB_VECTOR x86: remove VISWS and PARAVIRT around NR_IRQS puzzle x86: mention ACPI in top-level Kconfig menu x86: size NR_IRQS on 32-bit systems the same way as 64-bit x86: don't allow nr_irqs > NR_IRQS x86/docs: remove noirqbalance param docs x86: don't use tsc_khz to calculate lpj if notsc is passed x86, voyager: fix smp_intr_init() compile breakage AMD IOMMU: fix detection of NP capable IOMMUs
This commit is contained in:
commit
a15a82f42c
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@ -1472,8 +1472,6 @@ and is between 256 and 4096 characters. It is defined in the file
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Valid arguments: on, off
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Valid arguments: on, off
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Default: on
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Default: on
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noirqbalance [X86-32,SMP,KNL] Disable kernel irq balancing
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noirqdebug [X86-32] Disables the code which attempts to detect and
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noirqdebug [X86-32] Disables the code which attempts to detect and
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disable unhandled interrupt sources.
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disable unhandled interrupt sources.
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@ -1494,7 +1494,7 @@ config HAVE_ARCH_EARLY_PFN_TO_NID
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def_bool X86_64
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def_bool X86_64
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depends on NUMA
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depends on NUMA
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menu "Power management options"
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menu "Power management and ACPI options"
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depends on !X86_VOYAGER
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depends on !X86_VOYAGER
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config ARCH_HIBERNATION_HEADER
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config ARCH_HIBERNATION_HEADER
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@ -101,30 +101,22 @@
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#define LAST_VM86_IRQ 15
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#define LAST_VM86_IRQ 15
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#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
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#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
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#ifdef CONFIG_X86_64
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#if defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_VOYAGER)
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# if NR_CPUS < MAX_IO_APICS
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# if NR_CPUS < MAX_IO_APICS
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# define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
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# define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
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# else
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# else
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# define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
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# define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
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# endif
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# endif
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#elif !defined(CONFIG_X86_VOYAGER)
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#elif defined(CONFIG_X86_VOYAGER)
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# if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT) || defined(CONFIG_X86_VISWS)
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# define NR_IRQS 224
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# else /* IO_APIC || PARAVIRT */
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# define NR_IRQS 16
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# endif
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#else /* !VISWS && !VOYAGER */
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# define NR_IRQS 224
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# define NR_IRQS 224
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#endif /* VISWS */
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#else /* IO_APIC || VOYAGER */
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# define NR_IRQS 16
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#endif
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/* Voyager specific defines */
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/* Voyager specific defines */
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/* These define the CPIs we use in linux */
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/* These define the CPIs we use in linux */
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@ -520,6 +520,7 @@ extern void voyager_restart(void);
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extern void voyager_cat_power_off(void);
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extern void voyager_cat_power_off(void);
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extern void voyager_cat_do_common_interrupt(void);
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extern void voyager_cat_do_common_interrupt(void);
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extern void voyager_handle_nmi(void);
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extern void voyager_handle_nmi(void);
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extern void voyager_smp_intr_init(void);
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/* Commands for the following are */
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/* Commands for the following are */
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#define VOYAGER_PSI_READ 0
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#define VOYAGER_PSI_READ 0
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#define VOYAGER_PSI_WRITE 1
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#define VOYAGER_PSI_WRITE 1
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@ -50,7 +50,7 @@ static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
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/* returns !0 if the IOMMU is caching non-present entries in its TLB */
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/* returns !0 if the IOMMU is caching non-present entries in its TLB */
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static int iommu_has_npcache(struct amd_iommu *iommu)
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static int iommu_has_npcache(struct amd_iommu *iommu)
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{
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{
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return iommu->cap & IOMMU_CAP_NPCACHE;
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return iommu->cap & (1UL << IOMMU_CAP_NPCACHE);
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}
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}
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/****************************************************************************
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/****************************************************************************
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@ -536,6 +536,9 @@ static void dma_ops_free_addresses(struct dma_ops_domain *dom,
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{
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{
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address >>= PAGE_SHIFT;
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address >>= PAGE_SHIFT;
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iommu_area_free(dom->bitmap, address, pages);
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iommu_area_free(dom->bitmap, address, pages);
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if (address + pages >= dom->next_bit)
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dom->need_flush = true;
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}
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}
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/****************************************************************************
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/****************************************************************************
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@ -992,8 +995,10 @@ static void __unmap_single(struct amd_iommu *iommu,
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dma_ops_free_addresses(dma_dom, dma_addr, pages);
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dma_ops_free_addresses(dma_dom, dma_addr, pages);
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if (amd_iommu_unmap_flush)
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if (amd_iommu_unmap_flush || dma_dom->need_flush) {
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iommu_flush_pages(iommu, dma_dom->domain.id, dma_addr, size);
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iommu_flush_pages(iommu, dma_dom->domain.id, dma_addr, size);
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dma_dom->need_flush = false;
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}
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}
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}
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/*
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/*
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@ -3611,6 +3611,8 @@ int __init probe_nr_irqs(void)
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/* something wrong ? */
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/* something wrong ? */
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if (nr < nr_min)
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if (nr < nr_min)
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nr = nr_min;
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nr = nr_min;
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if (WARN_ON(nr > NR_IRQS))
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nr = NR_IRQS;
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return nr;
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return nr;
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}
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}
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@ -29,11 +29,7 @@ EXPORT_SYMBOL(pm_power_off);
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static const struct desc_ptr no_idt = {};
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static const struct desc_ptr no_idt = {};
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static int reboot_mode;
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static int reboot_mode;
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/*
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enum reboot_type reboot_type = BOOT_KBD;
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* Keyboard reset and triple fault may result in INIT, not RESET, which
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* doesn't work when we're in vmx root mode. Try ACPI first.
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*/
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enum reboot_type reboot_type = BOOT_ACPI;
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int reboot_force;
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int reboot_force;
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#if defined(CONFIG_X86_32) && defined(CONFIG_SMP)
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#if defined(CONFIG_X86_32) && defined(CONFIG_SMP)
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@ -154,6 +154,12 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
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flush_mm = mm;
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flush_mm = mm;
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flush_va = va;
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flush_va = va;
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cpus_or(flush_cpumask, cpumask, flush_cpumask);
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cpus_or(flush_cpumask, cpumask, flush_cpumask);
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/*
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* Make the above memory operations globally visible before
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* sending the IPI.
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*/
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smp_mb();
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/*
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/*
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* We have to send the IPI only to
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* We have to send the IPI only to
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* CPUs affected.
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* CPUs affected.
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@ -182,6 +182,11 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
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f->flush_va = va;
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f->flush_va = va;
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cpus_or(f->flush_cpumask, cpumask, f->flush_cpumask);
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cpus_or(f->flush_cpumask, cpumask, f->flush_cpumask);
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/*
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* Make the above memory operations globally visible before
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* sending the IPI.
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*/
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smp_mb();
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/*
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/*
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* We have to send the IPI only to
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* We have to send the IPI only to
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* CPUs affected.
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* CPUs affected.
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@ -813,10 +813,6 @@ void __init tsc_init(void)
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cpu_khz = calibrate_cpu();
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cpu_khz = calibrate_cpu();
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#endif
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#endif
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lpj = ((u64)tsc_khz * 1000);
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do_div(lpj, HZ);
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lpj_fine = lpj;
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printk("Detected %lu.%03lu MHz processor.\n",
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printk("Detected %lu.%03lu MHz processor.\n",
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(unsigned long)cpu_khz / 1000,
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(unsigned long)cpu_khz / 1000,
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(unsigned long)cpu_khz % 1000);
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(unsigned long)cpu_khz % 1000);
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@ -836,6 +832,10 @@ void __init tsc_init(void)
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/* now allow native_sched_clock() to use rdtsc */
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/* now allow native_sched_clock() to use rdtsc */
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tsc_disabled = 0;
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tsc_disabled = 0;
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lpj = ((u64)tsc_khz * 1000);
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do_div(lpj, HZ);
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lpj_fine = lpj;
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use_tsc_delay();
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use_tsc_delay();
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/* Check and install the TSC clocksource */
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/* Check and install the TSC clocksource */
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dmi_check_system(bad_tsc_dmi_table);
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dmi_check_system(bad_tsc_dmi_table);
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@ -27,7 +27,7 @@ static struct irqaction irq2 = {
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void __init intr_init_hook(void)
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void __init intr_init_hook(void)
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{
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{
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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smp_intr_init();
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voyager_smp_intr_init();
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#endif
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#endif
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setup_irq(2, &irq2);
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setup_irq(2, &irq2);
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@ -1258,7 +1258,7 @@ static void handle_vic_irq(unsigned int irq, struct irq_desc *desc)
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#define QIC_SET_GATE(cpi, vector) \
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#define QIC_SET_GATE(cpi, vector) \
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set_intr_gate((cpi) + QIC_DEFAULT_CPI_BASE, (vector))
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set_intr_gate((cpi) + QIC_DEFAULT_CPI_BASE, (vector))
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void __init smp_intr_init(void)
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void __init voyager_smp_intr_init(void)
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{
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{
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int i;
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int i;
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@ -67,18 +67,18 @@ static void split_page_count(int level)
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void arch_report_meminfo(struct seq_file *m)
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void arch_report_meminfo(struct seq_file *m)
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{
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{
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seq_printf(m, "DirectMap4k: %8lu kB\n",
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seq_printf(m, "DirectMap4k: %8lu kB\n",
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direct_pages_count[PG_LEVEL_4K] << 2);
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direct_pages_count[PG_LEVEL_4K] << 2);
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#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
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#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
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seq_printf(m, "DirectMap2M: %8lu kB\n",
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seq_printf(m, "DirectMap2M: %8lu kB\n",
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direct_pages_count[PG_LEVEL_2M] << 11);
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direct_pages_count[PG_LEVEL_2M] << 11);
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#else
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#else
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seq_printf(m, "DirectMap4M: %8lu kB\n",
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seq_printf(m, "DirectMap4M: %8lu kB\n",
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direct_pages_count[PG_LEVEL_2M] << 12);
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direct_pages_count[PG_LEVEL_2M] << 12);
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#endif
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#endif
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#ifdef CONFIG_X86_64
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#ifdef CONFIG_X86_64
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if (direct_gbpages)
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if (direct_gbpages)
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seq_printf(m, "DirectMap1G: %8lu kB\n",
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seq_printf(m, "DirectMap1G: %8lu kB\n",
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direct_pages_count[PG_LEVEL_1G] << 20);
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direct_pages_count[PG_LEVEL_1G] << 20);
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#endif
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#endif
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}
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}
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