UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

wifi: rtw89: initialize DMA of CMAC 

8852C needs this to change CMAC dma to full mode to keep receiving
packets after RX full event being resolved.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220916033811.13862-2-pkshih@realtek.com
This commit is contained in:
Ping-Ke Shih 2022-09-16 11:38:05 +08:00 committed by Kalle Valo
parent 8a1f6c8846
commit a0d99ebb3e
2 changed files with 47 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
drivers/net/wireless/realtek/rtw89/mac.c
View File

@ -2173,6 +2173,25 @@ static int ptcl_init(struct rtw89_dev *rtwdev, u8 mac_idx)
return 0;
}
static int cmac_dma_init(struct rtw89_dev *rtwdev, u8 mac_idx)
{
enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;
u32 reg;
int ret;
if (chip_id != RTL8852A && chip_id != RTL8852B)
return 0;
ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
if (ret)
return ret;
reg = rtw89_mac_reg_by_idx(R_AX_RXDMA_CTRL_0, mac_idx);
rtw89_write8_clr(rtwdev, reg, RX_FULL_MODE);
return 0;
}
static int cmac_init(struct rtw89_dev *rtwdev, u8 mac_idx)
{
int ret;
@ -2248,6 +2267,12 @@ static int cmac_init(struct rtw89_dev *rtwdev, u8 mac_idx)
return ret;
}
ret = cmac_dma_init(rtwdev, mac_idx);
if (ret) {
rtw89_err(rtwdev, "[ERR]CMAC%d DMA init %d\n", mac_idx, ret);
return ret;
}
return ret;
}

22
drivers/net/wireless/realtek/rtw89/reg.h
View File

@ -2332,6 +2332,28 @@
#define B_AX_DLE_IMR_SET (B_AX_RXSTS_FSM_HANG_ERROR_IMR | \
B_AX_RXDATA_FSM_HANG_ERROR_IMR)
#define R_AX_RXDMA_CTRL_0 0xC804
#define R_AX_RXDMA_CTRL_0_C1 0xE804
#define B_AX_RXDMA_DBGOUT_EN BIT(31)
#define B_AX_RXDMA_DBG_SEL_MASK GENMASK(30, 29)
#define B_AX_RXDMA_FIFO_DBG_SEL_MASK GENMASK(28, 25)
#define B_AX_RXDMA_DEFAULT_PAGE_MASK GENMASK(22, 21)
#define B_AX_RXDMA_BUFF_REQ_PRI_MASK GENMASK(20, 19)
#define B_AX_RXDMA_TGT_QUEID_MASK GENMASK(18, 13)
#define B_AX_RXDMA_TGT_PRID_MASK GENMASK(12, 10)
#define B_AX_RXDMA_DIS_CSI_RELEASE BIT(9)
#define B_AX_RXDMA_DIS_RXSTS_WAIT_PTR_CLR BIT(7)
#define B_AX_RXDMA_DIS_CSI_WAIT_PTR_CLR BIT(6)
#define B_AX_RXSTS_PTR_FULL_MODE BIT(5)
#define B_AX_CSI_PTR_FULL_MODE BIT(4)
#define B_AX_RU3_PTR_FULL_MODE BIT(3)
#define B_AX_RU2_PTR_FULL_MODE BIT(2)
#define B_AX_RU1_PTR_FULL_MODE BIT(1)
#define B_AX_RU0_PTR_FULL_MODE BIT(0)
#define RX_FULL_MODE (B_AX_RU0_PTR_FULL_MODE | B_AX_RU1_PTR_FULL_MODE | \
B_AX_RU2_PTR_FULL_MODE | B_AX_RU3_PTR_FULL_MODE | \
B_AX_CSI_PTR_FULL_MODE | B_AX_RXSTS_PTR_FULL_MODE)
#define R_AX_RXDMA_PKT_INFO_0 0xC814
#define R_AX_RXDMA_PKT_INFO_1 0xC818
#define R_AX_RXDMA_PKT_INFO_2 0xC81C