habanalabs: create internal CB pool
Create a device MMU-mapped internal command buffer pool, in order to allow the driver to allocate CBs for the signal/wait operations that are fetched by the queues when they are configured with the user's address space ID. We must pre-map this internal pool due to performance issues. This pool is needed for future ASIC support and it is currently unused in GOYA and GAUDI. Signed-off-by: Ofir Bitton <obitton@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
This commit is contained in:
parent
eb8b293e79
commit
a04b7cd97e
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@ -10,12 +10,18 @@
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/genalloc.h>
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static void cb_fini(struct hl_device *hdev, struct hl_cb *cb)
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{
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hdev->asic_funcs->asic_dma_free_coherent(hdev, cb->size,
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(void *) (uintptr_t) cb->kernel_address,
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cb->bus_address);
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if (cb->is_internal)
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gen_pool_free(hdev->internal_cb_pool,
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cb->kernel_address, cb->size);
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else
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hdev->asic_funcs->asic_dma_free_coherent(hdev, cb->size,
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(void *) (uintptr_t) cb->kernel_address,
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cb->bus_address);
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kfree(cb);
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}
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@ -44,9 +50,10 @@ static void cb_release(struct kref *ref)
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}
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static struct hl_cb *hl_cb_alloc(struct hl_device *hdev, u32 cb_size,
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int ctx_id)
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int ctx_id, bool internal_cb)
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{
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struct hl_cb *cb;
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u32 cb_offset;
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void *p;
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/*
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@ -65,13 +72,25 @@ static struct hl_cb *hl_cb_alloc(struct hl_device *hdev, u32 cb_size,
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if (!cb)
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return NULL;
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if (ctx_id == HL_KERNEL_ASID_ID)
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if (internal_cb) {
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p = (void *) gen_pool_alloc(hdev->internal_cb_pool, cb_size);
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if (!p) {
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kfree(cb);
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return NULL;
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}
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cb_offset = p - hdev->internal_cb_pool_virt_addr;
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cb->is_internal = true;
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cb->bus_address = hdev->internal_cb_va_base + cb_offset;
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} else if (ctx_id == HL_KERNEL_ASID_ID) {
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p = hdev->asic_funcs->asic_dma_alloc_coherent(hdev, cb_size,
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&cb->bus_address, GFP_ATOMIC);
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else
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} else {
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p = hdev->asic_funcs->asic_dma_alloc_coherent(hdev, cb_size,
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&cb->bus_address,
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GFP_USER | __GFP_ZERO);
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}
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if (!p) {
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dev_err(hdev->dev,
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"failed to allocate %d of dma memory for CB\n",
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@ -87,7 +106,7 @@ static struct hl_cb *hl_cb_alloc(struct hl_device *hdev, u32 cb_size,
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}
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int hl_cb_create(struct hl_device *hdev, struct hl_cb_mgr *mgr,
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u32 cb_size, u64 *handle, int ctx_id)
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u32 cb_size, u64 *handle, int ctx_id, bool internal_cb)
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{
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struct hl_cb *cb;
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bool alloc_new_cb = true;
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@ -112,28 +131,30 @@ int hl_cb_create(struct hl_device *hdev, struct hl_cb_mgr *mgr,
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goto out_err;
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}
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/* Minimum allocation must be PAGE SIZE */
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if (cb_size < PAGE_SIZE)
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cb_size = PAGE_SIZE;
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if (!internal_cb) {
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/* Minimum allocation must be PAGE SIZE */
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if (cb_size < PAGE_SIZE)
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cb_size = PAGE_SIZE;
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if (ctx_id == HL_KERNEL_ASID_ID &&
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cb_size <= hdev->asic_prop.cb_pool_cb_size) {
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if (ctx_id == HL_KERNEL_ASID_ID &&
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cb_size <= hdev->asic_prop.cb_pool_cb_size) {
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spin_lock(&hdev->cb_pool_lock);
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if (!list_empty(&hdev->cb_pool)) {
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cb = list_first_entry(&hdev->cb_pool, typeof(*cb),
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pool_list);
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list_del(&cb->pool_list);
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spin_unlock(&hdev->cb_pool_lock);
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alloc_new_cb = false;
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} else {
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spin_unlock(&hdev->cb_pool_lock);
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dev_dbg(hdev->dev, "CB pool is empty\n");
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spin_lock(&hdev->cb_pool_lock);
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if (!list_empty(&hdev->cb_pool)) {
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cb = list_first_entry(&hdev->cb_pool,
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typeof(*cb), pool_list);
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list_del(&cb->pool_list);
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spin_unlock(&hdev->cb_pool_lock);
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alloc_new_cb = false;
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} else {
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spin_unlock(&hdev->cb_pool_lock);
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dev_dbg(hdev->dev, "CB pool is empty\n");
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}
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}
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}
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if (alloc_new_cb) {
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cb = hl_cb_alloc(hdev, cb_size, ctx_id);
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cb = hl_cb_alloc(hdev, cb_size, ctx_id, internal_cb);
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if (!cb) {
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rc = -ENOMEM;
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goto out_err;
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@ -229,8 +250,8 @@ int hl_cb_ioctl(struct hl_fpriv *hpriv, void *data)
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rc = -EINVAL;
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} else {
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rc = hl_cb_create(hdev, &hpriv->cb_mgr,
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args->in.cb_size, &handle,
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hpriv->ctx->asid);
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args->in.cb_size, &handle,
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hpriv->ctx->asid, false);
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}
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memset(args, 0, sizeof(*args));
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@ -398,14 +419,15 @@ void hl_cb_mgr_fini(struct hl_device *hdev, struct hl_cb_mgr *mgr)
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idr_destroy(&mgr->cb_handles);
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}
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struct hl_cb *hl_cb_kernel_create(struct hl_device *hdev, u32 cb_size)
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struct hl_cb *hl_cb_kernel_create(struct hl_device *hdev, u32 cb_size,
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bool internal_cb)
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{
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u64 cb_handle;
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struct hl_cb *cb;
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int rc;
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rc = hl_cb_create(hdev, &hdev->kernel_cb_mgr, cb_size, &cb_handle,
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HL_KERNEL_ASID_ID);
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HL_KERNEL_ASID_ID, internal_cb);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to allocate CB for the kernel driver %d\n", rc);
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@ -437,7 +459,7 @@ int hl_cb_pool_init(struct hl_device *hdev)
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for (i = 0 ; i < hdev->asic_prop.cb_pool_cb_cnt ; i++) {
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cb = hl_cb_alloc(hdev, hdev->asic_prop.cb_pool_cb_size,
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HL_KERNEL_ASID_ID);
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HL_KERNEL_ASID_ID, false);
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if (cb) {
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cb->is_pool = true;
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list_add(&cb->pool_list, &hdev->cb_pool);
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@ -919,7 +919,13 @@ static int cs_ioctl_signal_wait(struct hl_fpriv *hpriv, enum hl_cs_type cs_type,
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goto put_cs;
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}
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cb = hl_cb_kernel_create(hdev, PAGE_SIZE);
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if (cs->type == CS_TYPE_WAIT)
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cb_size = hdev->asic_funcs->get_wait_cb_size(hdev);
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else
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cb_size = hdev->asic_funcs->get_signal_cb_size(hdev);
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cb = hl_cb_kernel_create(hdev, cb_size,
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q_type == QUEUE_TYPE_HW && hdev->mmu_enable);
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if (!cb) {
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ctx->cs_counters.out_of_mem_drop_cnt++;
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kfree(job);
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@ -927,11 +933,6 @@ static int cs_ioctl_signal_wait(struct hl_fpriv *hpriv, enum hl_cs_type cs_type,
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goto put_cs;
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}
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if (cs->type == CS_TYPE_WAIT)
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cb_size = hdev->asic_funcs->get_wait_cb_size(hdev);
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else
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cb_size = hdev->asic_funcs->get_signal_cb_size(hdev);
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job->id = 0;
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job->cs = cs;
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job->user_cb = cb;
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@ -153,10 +153,18 @@ int hl_ctx_init(struct hl_device *hdev, struct hl_ctx *ctx, bool is_kernel_ctx)
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rc = -ENOMEM;
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goto mem_ctx_err;
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}
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rc = hdev->asic_funcs->ctx_init(ctx);
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if (rc) {
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dev_err(hdev->dev, "ctx_init failed\n");
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goto ctx_init_err;
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}
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}
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return 0;
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ctx_init_err:
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hl_vm_ctx_fini(ctx);
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mem_ctx_err:
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if (ctx->asid != HL_KERNEL_ASID_ID)
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hl_asid_free(hdev, ctx->asid);
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@ -392,6 +392,7 @@ struct hl_cb_mgr {
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* @ctx_id: holds the ID of the owner's context.
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* @mmap: true if the CB is currently mmaped to user.
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* @is_pool: true if CB was acquired from the pool, false otherwise.
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* @is_internal: internaly allocated
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*/
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struct hl_cb {
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struct kref refcount;
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@ -408,6 +409,7 @@ struct hl_cb {
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u32 ctx_id;
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u8 mmap;
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u8 is_pool;
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u8 is_internal;
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};
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@ -643,6 +645,7 @@ enum div_select_defs {
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* @rreg: Read a register. Needed for simulator support.
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* @wreg: Write a register. Needed for simulator support.
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* @halt_coresight: stop the ETF and ETR traces.
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* @ctx_init: context dependent initialization.
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* @get_clk_rate: Retrieve the ASIC current and maximum clock rate in MHz
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* @get_queue_id_for_cq: Get the H/W queue id related to the given CQ index.
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* @read_device_fw_version: read the device's firmware versions that are
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@ -745,6 +748,7 @@ struct hl_asic_funcs {
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u32 (*rreg)(struct hl_device *hdev, u32 reg);
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void (*wreg)(struct hl_device *hdev, u32 reg, u32 val);
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void (*halt_coresight)(struct hl_device *hdev);
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int (*ctx_init)(struct hl_ctx *ctx);
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int (*get_clk_rate)(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk);
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u32 (*get_queue_id_for_cq)(struct hl_device *hdev, u32 cq_idx);
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void (*read_device_fw_version)(struct hl_device *hdev,
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@ -1432,6 +1436,10 @@ struct hl_device_idle_busy_ts {
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* @hl_debugfs: device's debugfs manager.
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* @cb_pool: list of preallocated CBs.
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* @cb_pool_lock: protects the CB pool.
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* @internal_cb_pool_virt_addr: internal command buffer pool virtual address.
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* @internal_cb_pool_dma_addr: internal command buffer pool dma address.
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* @internal_cb_pool: internal command buffer memory pool.
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* @internal_cb_va_base: internal cb pool mmu virtual address base
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* @fpriv_list: list of file private data structures. Each structure is created
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* when a user opens the device
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* @fpriv_list_lock: protects the fpriv_list
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@ -1531,6 +1539,11 @@ struct hl_device {
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struct list_head cb_pool;
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spinlock_t cb_pool_lock;
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void *internal_cb_pool_virt_addr;
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dma_addr_t internal_cb_pool_dma_addr;
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struct gen_pool *internal_cb_pool;
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u64 internal_cb_va_base;
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struct list_head fpriv_list;
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struct mutex fpriv_list_lock;
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@ -1741,7 +1754,7 @@ int hl_hwmon_init(struct hl_device *hdev);
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void hl_hwmon_fini(struct hl_device *hdev);
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int hl_cb_create(struct hl_device *hdev, struct hl_cb_mgr *mgr, u32 cb_size,
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u64 *handle, int ctx_id);
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u64 *handle, int ctx_id, bool internal_cb);
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int hl_cb_destroy(struct hl_device *hdev, struct hl_cb_mgr *mgr, u64 cb_handle);
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int hl_cb_mmap(struct hl_fpriv *hpriv, struct vm_area_struct *vma);
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struct hl_cb *hl_cb_get(struct hl_device *hdev, struct hl_cb_mgr *mgr,
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@ -1749,7 +1762,8 @@ struct hl_cb *hl_cb_get(struct hl_device *hdev, struct hl_cb_mgr *mgr,
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void hl_cb_put(struct hl_cb *cb);
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void hl_cb_mgr_init(struct hl_cb_mgr *mgr);
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void hl_cb_mgr_fini(struct hl_device *hdev, struct hl_cb_mgr *mgr);
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struct hl_cb *hl_cb_kernel_create(struct hl_device *hdev, u32 cb_size);
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struct hl_cb *hl_cb_kernel_create(struct hl_device *hdev, u32 cb_size,
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bool internal_cb);
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int hl_cb_pool_init(struct hl_device *hdev);
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int hl_cb_pool_fini(struct hl_device *hdev);
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@ -635,7 +635,7 @@ static int _gaudi_init_tpc_mem(struct hl_device *hdev,
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u8 tpc_id;
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int rc;
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cb = hl_cb_kernel_create(hdev, PAGE_SIZE);
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cb = hl_cb_kernel_create(hdev, PAGE_SIZE, false);
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if (!cb)
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return -EFAULT;
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@ -4048,9 +4048,8 @@ static int gaudi_parse_cb_mmu(struct hl_device *hdev,
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parser->patched_cb_size = parser->user_cb_size +
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sizeof(struct packet_msg_prot) * 2;
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rc = hl_cb_create(hdev, &hdev->kernel_cb_mgr,
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parser->patched_cb_size,
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&patched_cb_handle, HL_KERNEL_ASID_ID);
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rc = hl_cb_create(hdev, &hdev->kernel_cb_mgr, parser->patched_cb_size,
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&patched_cb_handle, HL_KERNEL_ASID_ID, false);
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if (rc) {
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dev_err(hdev->dev,
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@ -4122,9 +4121,8 @@ static int gaudi_parse_cb_no_mmu(struct hl_device *hdev,
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if (rc)
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goto free_userptr;
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rc = hl_cb_create(hdev, &hdev->kernel_cb_mgr,
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parser->patched_cb_size,
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&patched_cb_handle, HL_KERNEL_ASID_ID);
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rc = hl_cb_create(hdev, &hdev->kernel_cb_mgr, parser->patched_cb_size,
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&patched_cb_handle, HL_KERNEL_ASID_ID, false);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to allocate patched CB for DMA CS %d\n", rc);
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@ -4257,7 +4255,7 @@ static int gaudi_memset_device_memory(struct hl_device *hdev, u64 addr,
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struct hl_cb *cb;
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int rc;
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cb = hl_cb_kernel_create(hdev, PAGE_SIZE);
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cb = hl_cb_kernel_create(hdev, PAGE_SIZE, false);
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if (!cb)
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return -EFAULT;
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@ -6229,6 +6227,11 @@ static enum hl_device_hw_state gaudi_get_hw_state(struct hl_device *hdev)
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return RREG32(mmHW_STATE);
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}
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int gaudi_ctx_init(struct hl_ctx *ctx)
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{
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return 0;
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}
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static u32 gaudi_get_queue_id_for_cq(struct hl_device *hdev, u32 cq_idx)
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{
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return gaudi_cq_assignment[cq_idx];
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@ -6532,6 +6535,7 @@ static const struct hl_asic_funcs gaudi_funcs = {
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.rreg = hl_rreg,
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.wreg = hl_wreg,
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.halt_coresight = gaudi_halt_coresight,
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.ctx_init = gaudi_ctx_init,
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.get_clk_rate = gaudi_get_clk_rate,
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.get_queue_id_for_cq = gaudi_get_queue_id_for_cq,
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.read_device_fw_version = gaudi_read_device_fw_version,
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@ -3771,9 +3771,8 @@ static int goya_parse_cb_mmu(struct hl_device *hdev,
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parser->patched_cb_size = parser->user_cb_size +
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sizeof(struct packet_msg_prot) * 2;
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rc = hl_cb_create(hdev, &hdev->kernel_cb_mgr,
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parser->patched_cb_size,
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&patched_cb_handle, HL_KERNEL_ASID_ID);
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rc = hl_cb_create(hdev, &hdev->kernel_cb_mgr, parser->patched_cb_size,
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&patched_cb_handle, HL_KERNEL_ASID_ID, false);
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if (rc) {
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dev_err(hdev->dev,
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@ -3845,9 +3844,8 @@ static int goya_parse_cb_no_mmu(struct hl_device *hdev,
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if (rc)
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goto free_userptr;
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rc = hl_cb_create(hdev, &hdev->kernel_cb_mgr,
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parser->patched_cb_size,
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&patched_cb_handle, HL_KERNEL_ASID_ID);
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rc = hl_cb_create(hdev, &hdev->kernel_cb_mgr, parser->patched_cb_size,
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&patched_cb_handle, HL_KERNEL_ASID_ID, false);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to allocate patched CB for DMA CS %d\n", rc);
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@ -4693,7 +4691,7 @@ static int goya_memset_device_memory(struct hl_device *hdev, u64 addr, u64 size,
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lin_dma_pkts_cnt = DIV_ROUND_UP_ULL(size, SZ_2G);
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cb_size = lin_dma_pkts_cnt * sizeof(struct packet_lin_dma) +
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sizeof(struct packet_msg_prot);
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cb = hl_cb_kernel_create(hdev, cb_size);
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cb = hl_cb_kernel_create(hdev, cb_size, false);
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if (!cb)
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return -ENOMEM;
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@ -5223,6 +5221,11 @@ static enum hl_device_hw_state goya_get_hw_state(struct hl_device *hdev)
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return RREG32(mmHW_STATE);
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}
|
||||
|
||||
int goya_ctx_init(struct hl_ctx *ctx)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
u32 goya_get_queue_id_for_cq(struct hl_device *hdev, u32 cq_idx)
|
||||
{
|
||||
return cq_idx;
|
||||
|
@ -5336,6 +5339,7 @@ static const struct hl_asic_funcs goya_funcs = {
|
|||
.rreg = hl_rreg,
|
||||
.wreg = hl_wreg,
|
||||
.halt_coresight = goya_halt_coresight,
|
||||
.ctx_init = goya_ctx_init,
|
||||
.get_clk_rate = goya_get_clk_rate,
|
||||
.get_queue_id_for_cq = goya_get_queue_id_for_cq,
|
||||
.read_device_fw_version = goya_read_device_fw_version,
|
||||
|
|
Loading…
Reference in New Issue