mmc: sdhci-omap: Add special reset capability
Some omap controllers need software to monitor a 0->1->0 for software reset. Add a SDHCI_OMAP_SPECIAL_RESET flag to indicate this. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200116105154.7685-11-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -86,6 +86,7 @@
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/* sdhci-omap controller flags */
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#define SDHCI_OMAP_REQUIRE_IODELAY BIT(0)
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#define SDHCI_OMAP_SPECIAL_RESET BIT(1)
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struct sdhci_omap_data {
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u32 offset;
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@ -779,15 +780,35 @@ static void sdhci_omap_set_uhs_signaling(struct sdhci_host *host,
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sdhci_omap_start_clock(omap_host);
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}
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#define MMC_TIMEOUT_US 20000 /* 20000 micro Sec */
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static void sdhci_omap_reset(struct sdhci_host *host, u8 mask)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host);
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unsigned long limit = MMC_TIMEOUT_US;
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unsigned long i = 0;
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/* Don't reset data lines during tuning operation */
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if (omap_host->is_tuning)
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mask &= ~SDHCI_RESET_DATA;
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if (omap_host->flags & SDHCI_OMAP_SPECIAL_RESET) {
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sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
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while ((!(sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask)) &&
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(i++ < limit))
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udelay(1);
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i = 0;
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while ((sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) &&
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(i++ < limit))
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udelay(1);
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if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask)
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dev_err(mmc_dev(host->mmc),
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"Timeout waiting on controller reset in %s\n",
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__func__);
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return;
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}
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sdhci_reset(host, mask);
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}
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@ -900,10 +921,12 @@ static const struct sdhci_omap_data k2g_data = {
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static const struct sdhci_omap_data am335_data = {
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.offset = 0x200,
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.flags = SDHCI_OMAP_SPECIAL_RESET,
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};
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static const struct sdhci_omap_data am437_data = {
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.offset = 0x200,
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.flags = SDHCI_OMAP_SPECIAL_RESET,
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};
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static const struct sdhci_omap_data dra7_data = {
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