[SCSI] qla2xxx: T10 DIF - ISP83xx changes.
Signed-off-by: Arun Easi <arun.easi@qlogic.com> Signed-off-by: Chad Dupuis <chad.dupuis@qlogic.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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@ -1812,7 +1812,7 @@ qla24xx_vport_create(struct fc_vport *fc_vport, bool disable)
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if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
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if (ha->fw_attributes & BIT_4) {
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int prot = 0;
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int prot = 0, guard;
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vha->flags.difdix_supported = 1;
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ql_dbg(ql_dbg_user, vha, 0x7082,
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"Registered for DIF/DIX type 1 and 3 protection.\n");
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@ -1825,7 +1825,14 @@ qla24xx_vport_create(struct fc_vport *fc_vport, bool disable)
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| SHOST_DIX_TYPE1_PROTECTION
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| SHOST_DIX_TYPE2_PROTECTION
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| SHOST_DIX_TYPE3_PROTECTION);
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scsi_host_set_guard(vha->host, SHOST_DIX_GUARD_CRC);
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guard = SHOST_DIX_GUARD_CRC;
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if (IS_PI_IPGUARD_CAPABLE(ha) &&
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(ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
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guard |= SHOST_DIX_GUARD_IP;
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scsi_host_set_guard(vha->host, guard);
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} else
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vha->flags.difdix_supported = 0;
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}
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@ -17,7 +17,8 @@
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* | | | 0x113a |
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* | Device Discovery | 0x2087 | 0x2020-0x2022, |
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* | | | 0x2016 |
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* | Queue Command and IO tracing | 0x3030 | 0x3006,0x3008 |
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* | Queue Command and IO tracing | 0x3030 | 0x3006-0x300b |
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* | | | 0x3027-0x3028 |
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* | | | 0x302d-0x302e |
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* | DPC Thread | 0x401d | 0x4002,0x4013 |
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* | Async Events | 0x5071 | 0x502b-0x502f |
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@ -1468,9 +1468,10 @@ typedef struct {
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} cont_a64_entry_t;
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#define PO_MODE_DIF_INSERT 0
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#define PO_MODE_DIF_REMOVE BIT_0
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#define PO_MODE_DIF_PASS BIT_1
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#define PO_MODE_DIF_REPLACE (BIT_0 + BIT_1)
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#define PO_MODE_DIF_REMOVE 1
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#define PO_MODE_DIF_PASS 2
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#define PO_MODE_DIF_REPLACE 3
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#define PO_MODE_DIF_TCP_CKSUM 6
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#define PO_ENABLE_DIF_BUNDLING BIT_8
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#define PO_ENABLE_INCR_GUARD_SEED BIT_3
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#define PO_DISABLE_INCR_REF_TAG BIT_5
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@ -2781,6 +2782,12 @@ struct qla_hw_data {
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/* Bit 21 of fw_attributes decides the MCTP capabilities */
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#define IS_MCTP_CAPABLE(ha) (IS_QLA2031(ha) && \
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((ha)->fw_attributes_ext[0] & BIT_0))
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#define IS_PI_UNINIT_CAPABLE(ha) (IS_QLA83XX(ha))
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#define IS_PI_IPGUARD_CAPABLE(ha) (IS_QLA83XX(ha))
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#define IS_PI_DIFB_DIX0_CAPABLE(ha) (0)
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#define IS_PI_SPLIT_DET_CAPABLE_HBA(ha) (IS_QLA83XX(ha))
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#define IS_PI_SPLIT_DET_CAPABLE(ha) (IS_PI_SPLIT_DET_CAPABLE_HBA(ha) && \
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(((ha)->fw_attributes_h << 16 | (ha)->fw_attributes) & BIT_22))
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/* HBA serial number */
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uint8_t serial0;
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@ -5498,6 +5498,9 @@ qla81xx_nvram_config(scsi_qla_host_t *vha)
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rval = 1;
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}
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if (IS_T10_PI_CAPABLE(ha))
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nv->frame_payload_size &= ~7;
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/* Reset Initialization control block */
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memset(icb, 0, ha->init_cb_size);
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@ -147,13 +147,6 @@ qla24xx_configure_prot_mode(srb_t *sp, uint16_t *fw_prot_opts)
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struct scsi_cmnd *cmd = GET_CMD_SP(sp);
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uint8_t guard = scsi_host_get_guard(cmd->device->host);
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/* We only support T10 DIF right now */
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if (guard != SHOST_DIX_GUARD_CRC) {
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ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3007,
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"Unsupported guard: %d for cmd=%p.\n", guard, cmd);
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return 0;
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}
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/* We always use DIFF Bundling for best performance */
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*fw_prot_opts = 0;
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@ -172,10 +165,11 @@ qla24xx_configure_prot_mode(srb_t *sp, uint16_t *fw_prot_opts)
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*fw_prot_opts |= PO_MODE_DIF_REMOVE;
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break;
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case SCSI_PROT_READ_PASS:
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*fw_prot_opts |= PO_MODE_DIF_PASS;
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break;
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case SCSI_PROT_WRITE_PASS:
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*fw_prot_opts |= PO_MODE_DIF_PASS;
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if (guard & SHOST_DIX_GUARD_IP)
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*fw_prot_opts |= PO_MODE_DIF_TCP_CKSUM;
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else
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*fw_prot_opts |= PO_MODE_DIF_PASS;
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break;
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default: /* Normal Request */
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*fw_prot_opts |= PO_MODE_DIF_PASS;
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@ -821,7 +815,6 @@ qla24xx_set_t10dif_tags(srb_t *sp, struct fw_dif_context *pkt,
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unsigned int protcnt)
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{
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struct scsi_cmnd *cmd = GET_CMD_SP(sp);
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scsi_qla_host_t *vha = shost_priv(cmd->device->host);
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switch (scsi_get_prot_type(cmd)) {
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case SCSI_PROT_DIF_TYPE0:
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@ -891,12 +884,6 @@ qla24xx_set_t10dif_tags(srb_t *sp, struct fw_dif_context *pkt,
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pkt->ref_tag_mask[3] = 0xff;
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break;
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}
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ql_dbg(ql_dbg_io, vha, 0x3009,
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"Setting protection Tags: (BIG) ref tag = 0x%x, app tag = 0x%x, "
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"prot SG count %d, cmd lba 0x%x, prot_type=%u cmd=%p.\n",
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pkt->ref_tag, pkt->app_tag, protcnt, (int)scsi_get_lba(cmd),
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scsi_get_prot_type(cmd), cmd);
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}
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struct qla2_sgx {
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@ -1068,9 +1055,6 @@ qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd,
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int i;
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uint16_t used_dsds = tot_dsds;
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struct scsi_cmnd *cmd = GET_CMD_SP(sp);
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scsi_qla_host_t *vha = shost_priv(cmd->device->host);
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uint8_t *cp;
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scsi_for_each_sg(cmd, sg, tot_dsds, i) {
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dma_addr_t sle_dma;
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@ -1113,19 +1097,12 @@ qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd,
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cur_dsd = (uint32_t *)next_dsd;
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}
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sle_dma = sg_dma_address(sg);
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ql_dbg(ql_dbg_io, vha, 0x300a,
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"sg entry %d - addr=0x%x 0x%x, " "len=%d for cmd=%p.\n",
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i, LSD(sle_dma), MSD(sle_dma), sg_dma_len(sg), cmd);
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*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
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*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
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*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
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avail_dsds--;
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if (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_PASS) {
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cp = page_address(sg_page(sg)) + sg->offset;
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ql_dbg(ql_dbg_io, vha, 0x300b,
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"User data buffer=%p for cmd=%p.\n", cp, cmd);
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}
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}
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/* Null termination */
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*cur_dsd++ = 0;
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@ -1148,8 +1125,6 @@ qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
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struct scsi_cmnd *cmd;
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uint32_t *cur_dsd = dsd;
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uint16_t used_dsds = tot_dsds;
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scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
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uint8_t *cp;
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cmd = GET_CMD_SP(sp);
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scsi_for_each_prot_sg(cmd, sg, tot_dsds, i) {
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@ -1193,23 +1168,11 @@ qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
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cur_dsd = (uint32_t *)next_dsd;
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}
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sle_dma = sg_dma_address(sg);
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if (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_PASS) {
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ql_dbg(ql_dbg_io, vha, 0x3027,
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"%s(): %p, sg_entry %d - "
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"addr=0x%x0x%x, len=%d.\n",
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__func__, cur_dsd, i,
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LSD(sle_dma), MSD(sle_dma), sg_dma_len(sg));
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}
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*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
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*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
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*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
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if (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_PASS) {
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cp = page_address(sg_page(sg)) + sg->offset;
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ql_dbg(ql_dbg_io, vha, 0x3028,
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"%s(): Protection Data buffer = %p.\n", __func__,
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cp);
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}
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avail_dsds--;
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}
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/* Null termination */
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@ -1386,6 +1349,16 @@ qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
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if (!qla2x00_hba_err_chk_enabled(sp))
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fw_prot_opts |= 0x10; /* Disable Guard tag checking */
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/* HBA error checking enabled */
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else if (IS_PI_UNINIT_CAPABLE(ha)) {
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if ((scsi_get_prot_type(GET_CMD_SP(sp)) == SCSI_PROT_DIF_TYPE1)
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|| (scsi_get_prot_type(GET_CMD_SP(sp)) ==
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SCSI_PROT_DIF_TYPE2))
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fw_prot_opts |= BIT_10;
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else if (scsi_get_prot_type(GET_CMD_SP(sp)) ==
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SCSI_PROT_DIF_TYPE3)
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fw_prot_opts |= BIT_11;
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}
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if (!bundling) {
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cur_dsd = (uint32_t *) &crc_ctx_pkt->u.nobundling.data_address;
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@ -2163,6 +2163,19 @@ check_scsi_status:
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case CS_DIF_ERROR:
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logit = qla2x00_handle_dif_error(sp, sts24);
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break;
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case CS_TRANSPORT:
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res = DID_ERROR << 16;
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if (!IS_PI_SPLIT_DET_CAPABLE(ha))
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break;
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if (state_flags & BIT_4)
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scmd_printk(KERN_WARNING, cp,
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"Unsupported device '%s' found.\n",
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cp->device->vendor);
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break;
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default:
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res = DID_ERROR << 16;
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break;
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@ -116,9 +116,8 @@ MODULE_PARM_DESC(ql2xmaxqdepth,
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"Maximum queue depth to set for each LUN. "
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"Default is 32.");
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/* Do not change the value of this after module load */
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int ql2xenabledif = 0;
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module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
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int ql2xenabledif = 2;
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module_param(ql2xenabledif, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xenabledif,
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" Enable T10-CRC-DIF "
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" Default is 0 - No DIF Support. 1 - Enable it"
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@ -1358,6 +1357,9 @@ qla2xxx_slave_configure(struct scsi_device *sdev)
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scsi_qla_host_t *vha = shost_priv(sdev->host);
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struct req_que *req = vha->req;
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if (IS_T10_PI_CAPABLE(vha->hw))
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blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
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if (sdev->tagged_supported)
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scsi_activate_tcq(sdev, req->max_q_depth);
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else
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@ -2574,7 +2576,7 @@ skip_dpc:
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if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
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if (ha->fw_attributes & BIT_4) {
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int prot = 0;
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int prot = 0, guard;
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base_vha->flags.difdix_supported = 1;
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ql_dbg(ql_dbg_init, base_vha, 0x00f1,
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"Registering for DIF/DIX type 1 and 3 protection.\n");
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@ -2587,7 +2589,14 @@ skip_dpc:
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| SHOST_DIX_TYPE1_PROTECTION
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| SHOST_DIX_TYPE2_PROTECTION
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| SHOST_DIX_TYPE3_PROTECTION);
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scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
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guard = SHOST_DIX_GUARD_CRC;
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if (IS_PI_IPGUARD_CAPABLE(ha) &&
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(ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
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guard |= SHOST_DIX_GUARD_IP;
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scsi_host_set_guard(host, guard);
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} else
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base_vha->flags.difdix_supported = 0;
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}
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