ARM: dts: AM4372: Add L2, EDMA, mailbox, MMC and SHAM nodes
Populate nodes for l2-cache-controller, EDMA, mailbox, mmc, sham. Update as well DT properties for epwmss, aes, des. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
This commit is contained in:
Lokesh Vutla
Benoit Cousson
parent
c47ee6ee8b
commit
9e3269b8c6
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@ -19,6 +19,8 @@
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aliases {
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serial0 = &uart0;
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ethernet0 = &cpsw_emac0;
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ethernet1 = &cpsw_emac1;
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};
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cpus {
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@ -39,11 +41,42 @@
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<0x48240100 0x0100>;
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};
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l2-cache-controller@48242000 {
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compatible = "arm,pl310-cache";
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reg = <0x48242000 0x1000>;
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cache-unified;
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cache-level = <2>;
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};
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am43xx_pinmux: pinmux@44e10800 {
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compatible = "pinctrl-single";
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reg = <0x44e10800 0x31c>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0xffffffff>;
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};
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ocp {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main";
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edma: edma@49000000 {
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compatible = "ti,edma3";
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ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
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reg = <0x49000000 0x10000>,
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<0x44e10f90 0x10>;
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interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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#dma-cells = <1>;
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dma-channels = <64>;
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ti,edma-regions = <4>;
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ti,edma-slots = <256>;
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};
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uart0: serial@44e09000 {
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compatible = "ti,am4372-uart","ti,omap2-uart";
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@ -92,6 +125,18 @@
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status = "disabled";
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};
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mailbox: mailbox@480C8000 {
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compatible = "ti,omap4-mailbox";
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reg = <0x480C8000 0x200>;
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "mailbox";
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ti,mbox-num-users = <4>;
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ti,mbox-num-fifos = <8>;
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ti,mbox-names = "wkup_m3";
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ti,mbox-data = <0 0 0 0>;
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status = "disabled";
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};
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timer1: timer@44e31000 {
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compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
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reg = <0x44e31000 0x400>;
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@ -203,7 +248,6 @@
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reg = <0x44e35000 0x1000>;
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interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "wd_timer2";
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status = "disabled";
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};
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gpio0: gpio@44e07000 {
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@ -318,6 +362,40 @@
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status = "disabled";
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};
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mmc1: mmc@48060000 {
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compatible = "ti,omap4-hsmmc";
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reg = <0x48060000 0x1000>;
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ti,hwmods = "mmc1";
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ti,dual-volt;
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ti,needs-special-reset;
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dmas = <&edma 24
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&edma 25>;
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dma-names = "tx", "rx";
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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mmc2: mmc@481d8000 {
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compatible = "ti,omap4-hsmmc";
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reg = <0x481d8000 0x1000>;
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ti,hwmods = "mmc2";
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ti,needs-special-reset;
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dmas = <&edma 2
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&edma 3>;
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dma-names = "tx", "rx";
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interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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mmc3: mmc@47810000 {
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compatible = "ti,omap4-hsmmc";
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reg = <0x47810000 0x1000>;
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ti,hwmods = "mmc3";
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ti,needs-special-reset;
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interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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spi1: spi@481a0000 {
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compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
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reg = <0x481a0000 0x400>;
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@ -366,50 +444,173 @@
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GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <1>;
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ti,hwmods = "cpgmac0";
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status = "disabled";
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cpdma_channels = <8>;
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ale_entries = <1024>;
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bd_ram_size = <0x2000>;
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no_bd_ram = <0>;
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rx_descs = <64>;
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mac_control = <0x20>;
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slaves = <2>;
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active_slave = <0>;
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cpts_clock_mult = <0x80000000>;
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cpts_clock_shift = <29>;
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ranges;
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davinci_mdio: mdio@4a101000 {
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compatible = "ti,am4372-mdio","ti,davinci_mdio";
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reg = <0x4a101000 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "davinci_mdio";
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bus_freq = <1000000>;
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status = "disabled";
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};
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cpsw_emac0: slave@4a100200 {
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/* Filled in by U-Boot */
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mac-address = [ 00 00 00 00 00 00 ];
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};
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cpsw_emac1: slave@4a100300 {
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/* Filled in by U-Boot */
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mac-address = [ 00 00 00 00 00 00 ];
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};
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};
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epwmss0: epwmss@48300000 {
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compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
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reg = <0x48300000 0x10>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "epwmss0";
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status = "disabled";
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ecap0: ecap@48300100 {
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compatible = "ti,am4372-ecap","ti,am33xx-ecap";
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reg = <0x48300100 0x80>;
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ti,hwmods = "ecap0";
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status = "disabled";
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};
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ehrpwm0: ehrpwm@48300200 {
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compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
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reg = <0x48300200 0x80>;
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ti,hwmods = "ehrpwm0";
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status = "disabled";
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};
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};
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epwmss1: epwmss@48302000 {
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compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
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reg = <0x48302000 0x10>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "epwmss1";
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status = "disabled";
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ecap1: ecap@48302100 {
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compatible = "ti,am4372-ecap","ti,am33xx-ecap";
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reg = <0x48302100 0x80>;
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ti,hwmods = "ecap1";
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status = "disabled";
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};
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ehrpwm1: ehrpwm@48302200 {
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compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
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reg = <0x48302200 0x80>;
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ti,hwmods = "ehrpwm1";
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status = "disabled";
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};
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};
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epwmss2: epwmss@48304000 {
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compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
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reg = <0x48304000 0x10>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "epwmss2";
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status = "disabled";
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ecap2: ecap@48304100 {
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compatible = "ti,am4372-ecap","ti,am33xx-ecap";
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reg = <0x48304100 0x80>;
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ti,hwmods = "ecap2";
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status = "disabled";
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};
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ehrpwm2: ehrpwm@48304200 {
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compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
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reg = <0x48304200 0x80>;
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ti,hwmods = "ehrpwm2";
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status = "disabled";
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};
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};
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epwmss3: epwmss@48306000 {
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compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
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reg = <0x48306000 0x10>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "epwmss3";
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status = "disabled";
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ehrpwm3: ehrpwm@48306200 {
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compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
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reg = <0x48306200 0x80>;
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ti,hwmods = "ehrpwm3";
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status = "disabled";
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};
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};
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epwmss4: epwmss@48308000 {
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compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
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reg = <0x48308000 0x10>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "epwmss4";
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status = "disabled";
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ehrpwm4: ehrpwm@48308200 {
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compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
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reg = <0x48308200 0x80>;
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ti,hwmods = "ehrpwm4";
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status = "disabled";
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};
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};
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epwmss5: epwmss@4830a000 {
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compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
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reg = <0x4830a000 0x10>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "epwmss5";
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status = "disabled";
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ehrpwm5: ehrpwm@4830a200 {
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compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
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reg = <0x4830a200 0x80>;
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ti,hwmods = "ehrpwm5";
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status = "disabled";
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};
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};
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sham: sham@53100000 {
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compatible = "ti,omap5-sham";
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ti,hwmods = "sham";
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reg = <0x53100000 0x300>;
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dmas = <&edma 36>;
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dma-names = "rx";
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interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
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};
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aes: aes@53501000 {
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@ -417,6 +618,9 @@
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ti,hwmods = "aes";
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reg = <0x53501000 0xa0>;
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&edma 6
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&edma 5>;
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dma-names = "tx", "rx";
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};
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des: des@53701000 {
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@ -424,6 +628,10 @@
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ti,hwmods = "des";
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reg = <0x53701000 0xa0>;
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interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&edma 34
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&edma 33>;
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dma-names = "tx", "rx";
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};
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};
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};
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