ARM: OMAP2+: clock: remove dead definitions from the clock header file
Cleanup the mess in clock.h by removing all definitions that are no longer used for anything. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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@ -23,7 +23,6 @@
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#include "clock.h"
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#include "clock3xxx.h"
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#include "clock34xx.h"
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#include "sdrc.h"
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#include "sram.h"
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@ -23,90 +23,6 @@
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#include <linux/clk-provider.h>
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#include <linux/clk/ti.h>
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struct omap_clk {
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u16 cpu;
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struct clk_lookup lk;
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};
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#define CLK(dev, con, ck) \
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{ \
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.lk = { \
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.dev_id = dev, \
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.con_id = con, \
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.clk = ck, \
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}, \
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}
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struct clockdomain;
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#define DEFINE_STRUCT_CLK(_name, _parent_array_name, _clkops_name) \
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static struct clk_core _name##_core = { \
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.name = #_name, \
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.hw = &_name##_hw.hw, \
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.parent_names = _parent_array_name, \
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.num_parents = ARRAY_SIZE(_parent_array_name), \
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.ops = &_clkops_name, \
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}; \
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static struct clk _name = { \
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.core = &_name##_core, \
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};
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#define DEFINE_STRUCT_CLK_FLAGS(_name, _parent_array_name, \
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_clkops_name, _flags) \
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static struct clk_core _name##_core = { \
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.name = #_name, \
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.hw = &_name##_hw.hw, \
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.parent_names = _parent_array_name, \
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.num_parents = ARRAY_SIZE(_parent_array_name), \
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.ops = &_clkops_name, \
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.flags = _flags, \
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}; \
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static struct clk _name = { \
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.core = &_name##_core, \
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};
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#define DEFINE_STRUCT_CLK_HW_OMAP(_name, _clkdm_name) \
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static struct clk_hw_omap _name##_hw = { \
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.hw = { \
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.clk = &_name, \
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}, \
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.clkdm_name = _clkdm_name, \
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};
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#define DEFINE_CLK_OMAP_MUX(_name, _clkdm_name, _clksel, \
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_clksel_reg, _clksel_mask, \
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_parent_names, _ops) \
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static struct clk _name; \
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static struct clk_hw_omap _name##_hw = { \
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.hw = { \
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.clk = &_name, \
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}, \
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.clksel = _clksel, \
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.clksel_reg = _clksel_reg, \
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.clksel_mask = _clksel_mask, \
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.clkdm_name = _clkdm_name, \
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}; \
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DEFINE_STRUCT_CLK(_name, _parent_names, _ops);
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#define DEFINE_CLK_OMAP_MUX_GATE(_name, _clkdm_name, _clksel, \
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_clksel_reg, _clksel_mask, \
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_enable_reg, _enable_bit, \
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_hwops, _parent_names, _ops) \
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static struct clk _name; \
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static struct clk_hw_omap _name##_hw = { \
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.hw = { \
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.clk = &_name, \
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}, \
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.ops = _hwops, \
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.enable_reg = _enable_reg, \
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.enable_bit = _enable_bit, \
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.clksel = _clksel, \
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.clksel_reg = _clksel_reg, \
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.clksel_mask = _clksel_mask, \
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.clkdm_name = _clkdm_name, \
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}; \
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DEFINE_STRUCT_CLK(_name, _parent_names, _ops);
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/* struct clksel_rate.flags possibilities */
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#define RATE_IN_242X (1 << 0)
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#define RATE_IN_243X (1 << 1)
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@ -127,38 +43,6 @@ struct clockdomain;
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/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
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#define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
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/**
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* struct clksel_rate - register bitfield values corresponding to clk divisors
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* @val: register bitfield value (shifted to bit 0)
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* @div: clock divisor corresponding to @val
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* @flags: (see "struct clksel_rate.flags possibilities" above)
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*
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* @val should match the value of a read from struct clk.clksel_reg
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* AND'ed with struct clk.clksel_mask, shifted right to bit 0.
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*
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* @div is the divisor that should be applied to the parent clock's rate
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* to produce the current clock's rate.
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*/
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struct clksel_rate {
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u32 val;
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u8 div;
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u16 flags;
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};
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/**
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* struct clksel - available parent clocks, and a pointer to their divisors
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* @parent: struct clk * to a possible parent clock
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* @rates: available divisors for this parent clock
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*
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* A struct clksel is always associated with one or more struct clks
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* and one or more struct clksel_rates.
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*/
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struct clksel {
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struct clk *parent;
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const struct clksel_rate *rates;
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};
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/* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */
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#define CORE_CLK_SRC_32K 0x0
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#define CORE_CLK_SRC_DPLL 0x1
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@ -194,14 +78,6 @@ extern const struct clkops clkops_omap2_dflt;
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extern struct clk_functions omap2_clk_functions;
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extern const struct clk_hw_omap_ops clkhwops_wait;
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extern const struct clk_hw_omap_ops clkhwops_omap3430es2_ssi_wait;
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extern const struct clk_hw_omap_ops clkhwops_omap3430es2_dss_usbhost_wait;
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extern const struct clk_hw_omap_ops clkhwops_omap3430es2_hsotgusb_wait;
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extern const struct clk_hw_omap_ops clkhwops_am35xx_ipss_module_wait;
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extern const struct clk_hw_omap_ops clkhwops_apll54;
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extern const struct clk_hw_omap_ops clkhwops_apll96;
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struct regmap;
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int __init omap2_clk_provider_init(struct device_node *np, int index,
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@ -1,18 +0,0 @@
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/*
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* OMAP34xx clock function prototypes and macros
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*
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* Copyright (C) 2007-2010 Texas Instruments, Inc.
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* Copyright (C) 2007-2011 Nokia Corporation
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK34XX_H
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#define __ARCH_ARM_MACH_OMAP2_CLOCK34XX_H
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extern const struct clkops clkops_omap3430es2_ssi_wait;
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extern const struct clkops clkops_omap3430es2_iclk_ssi_wait;
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extern const struct clkops clkops_omap3430es2_hsotgusb_wait;
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extern const struct clkops clkops_omap3430es2_iclk_hsotgusb_wait;
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extern const struct clkops clkops_omap3430es2_dss_usbhost_wait;
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extern const struct clkops clkops_omap3430es2_iclk_dss_usbhost_wait;
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#endif
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