dmaengine: fsl-edma: transition from bool fields to bitmask flags in drvdata

Replace individual bool fields with bitmask flags within drvdata. This
will facilitate future extensions, making it easier to add more flags to
accommodate new versions of the edma IP.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20230821161617.2142561-4-Frank.Li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Frank Li 2023-08-21 12:16:08 -04:00 committed by Vinod Koul
parent 66aac8ea0a
commit 9e006b2439
3 changed files with 7 additions and 6 deletions

View File

@ -114,7 +114,7 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan,
chans_per_mux = fsl_chan->edma->n_chans / dmamux_nr; chans_per_mux = fsl_chan->edma->n_chans / dmamux_nr;
ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux; ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux;
if (fsl_chan->edma->drvdata->mux_swap) if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_MUX_SWAP)
ch_off += endian_diff[ch_off % 4]; ch_off += endian_diff[ch_off % 4];
muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux]; muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];

View File

@ -144,11 +144,12 @@ enum edma_version {
v3, /* 32ch, i.mx7ulp */ v3, /* 32ch, i.mx7ulp */
}; };
#define FSL_EDMA_DRV_HAS_DMACLK BIT(0)
#define FSL_EDMA_DRV_MUX_SWAP BIT(1)
struct fsl_edma_drvdata { struct fsl_edma_drvdata {
enum edma_version version; enum edma_version version;
u32 dmamuxs; u32 dmamuxs;
bool has_dmaclk; u32 flags;
bool mux_swap;
int (*setup_irq)(struct platform_device *pdev, int (*setup_irq)(struct platform_device *pdev,
struct fsl_edma_engine *fsl_edma); struct fsl_edma_engine *fsl_edma);
}; };

View File

@ -244,14 +244,14 @@ static struct fsl_edma_drvdata vf610_data = {
static struct fsl_edma_drvdata ls1028a_data = { static struct fsl_edma_drvdata ls1028a_data = {
.version = v1, .version = v1,
.dmamuxs = DMAMUX_NR, .dmamuxs = DMAMUX_NR,
.mux_swap = true, .flags = FSL_EDMA_DRV_MUX_SWAP,
.setup_irq = fsl_edma_irq_init, .setup_irq = fsl_edma_irq_init,
}; };
static struct fsl_edma_drvdata imx7ulp_data = { static struct fsl_edma_drvdata imx7ulp_data = {
.version = v3, .version = v3,
.dmamuxs = 1, .dmamuxs = 1,
.has_dmaclk = true, .flags = FSL_EDMA_DRV_HAS_DMACLK,
.setup_irq = fsl_edma2_irq_init, .setup_irq = fsl_edma2_irq_init,
}; };
@ -303,7 +303,7 @@ static int fsl_edma_probe(struct platform_device *pdev)
fsl_edma_setup_regs(fsl_edma); fsl_edma_setup_regs(fsl_edma);
regs = &fsl_edma->regs; regs = &fsl_edma->regs;
if (drvdata->has_dmaclk) { if (drvdata->flags & FSL_EDMA_DRV_HAS_DMACLK) {
fsl_edma->dmaclk = devm_clk_get(&pdev->dev, "dma"); fsl_edma->dmaclk = devm_clk_get(&pdev->dev, "dma");
if (IS_ERR(fsl_edma->dmaclk)) { if (IS_ERR(fsl_edma->dmaclk)) {
dev_err(&pdev->dev, "Missing DMA block clock.\n"); dev_err(&pdev->dev, "Missing DMA block clock.\n");