dmaengine: fsl-edma: transition from bool fields to bitmask flags in drvdata
Replace individual bool fields with bitmask flags within drvdata. This will facilitate future extensions, making it easier to add more flags to accommodate new versions of the edma IP. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20230821161617.2142561-4-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -114,7 +114,7 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan,
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chans_per_mux = fsl_chan->edma->n_chans / dmamux_nr;
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chans_per_mux = fsl_chan->edma->n_chans / dmamux_nr;
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ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux;
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ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux;
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if (fsl_chan->edma->drvdata->mux_swap)
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if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_MUX_SWAP)
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ch_off += endian_diff[ch_off % 4];
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ch_off += endian_diff[ch_off % 4];
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muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];
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muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];
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@ -144,11 +144,12 @@ enum edma_version {
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v3, /* 32ch, i.mx7ulp */
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v3, /* 32ch, i.mx7ulp */
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};
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};
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#define FSL_EDMA_DRV_HAS_DMACLK BIT(0)
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#define FSL_EDMA_DRV_MUX_SWAP BIT(1)
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struct fsl_edma_drvdata {
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struct fsl_edma_drvdata {
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enum edma_version version;
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enum edma_version version;
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u32 dmamuxs;
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u32 dmamuxs;
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bool has_dmaclk;
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u32 flags;
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bool mux_swap;
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int (*setup_irq)(struct platform_device *pdev,
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int (*setup_irq)(struct platform_device *pdev,
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struct fsl_edma_engine *fsl_edma);
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struct fsl_edma_engine *fsl_edma);
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};
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};
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@ -244,14 +244,14 @@ static struct fsl_edma_drvdata vf610_data = {
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static struct fsl_edma_drvdata ls1028a_data = {
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static struct fsl_edma_drvdata ls1028a_data = {
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.version = v1,
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.version = v1,
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.dmamuxs = DMAMUX_NR,
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.dmamuxs = DMAMUX_NR,
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.mux_swap = true,
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.flags = FSL_EDMA_DRV_MUX_SWAP,
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.setup_irq = fsl_edma_irq_init,
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.setup_irq = fsl_edma_irq_init,
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};
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};
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static struct fsl_edma_drvdata imx7ulp_data = {
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static struct fsl_edma_drvdata imx7ulp_data = {
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.version = v3,
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.version = v3,
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.dmamuxs = 1,
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.dmamuxs = 1,
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.has_dmaclk = true,
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.flags = FSL_EDMA_DRV_HAS_DMACLK,
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.setup_irq = fsl_edma2_irq_init,
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.setup_irq = fsl_edma2_irq_init,
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};
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};
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@ -303,7 +303,7 @@ static int fsl_edma_probe(struct platform_device *pdev)
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fsl_edma_setup_regs(fsl_edma);
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fsl_edma_setup_regs(fsl_edma);
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regs = &fsl_edma->regs;
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regs = &fsl_edma->regs;
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if (drvdata->has_dmaclk) {
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if (drvdata->flags & FSL_EDMA_DRV_HAS_DMACLK) {
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fsl_edma->dmaclk = devm_clk_get(&pdev->dev, "dma");
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fsl_edma->dmaclk = devm_clk_get(&pdev->dev, "dma");
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if (IS_ERR(fsl_edma->dmaclk)) {
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if (IS_ERR(fsl_edma->dmaclk)) {
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dev_err(&pdev->dev, "Missing DMA block clock.\n");
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dev_err(&pdev->dev, "Missing DMA block clock.\n");
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