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drm/rockchip: vop: rk3328: fix overlay abnormal 

It's a hardware bug, all window's overlay channel reset
value is same, hardware overlay would be die.

so we must initial difference id for each overlay channel.

The Channel register is supported on all vop will full design.
Following is the details for this register
VOP_WIN0_CTRL2
  bit[7:4] win_rid_win0_cbr
       axi read id of win0 cbr channel
  bit[3:0] win_rid_win0_yrgb
       axi read id of win0 yrgb channel

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/1501049980-6239-1-git-send-email-mark.yao@rock-chips.com
This commit is contained in:
Mark yao 2017-07-26 14:19:39 +08:00 committed by Mark Yao
parent b218dec7bb
commit 9dd2aca46a
3 changed files with 4 additions and 0 deletions
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2
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
View File

@ -1457,7 +1457,9 @@ static int vop_initial(struct vop *vop)
for (i = 0; i < vop_data->win_size; i++) {
const struct vop_win_data *win = &vop_data->win[i];
int channel = i * 2 + 1;
VOP_WIN_SET(vop, win, channel, (channel + 1) << 4 | channel);
VOP_WIN_SET(vop, win, enable, 0);
VOP_WIN_SET(vop, win, gate, 1);
}

1
drivers/gpu/drm/rockchip/rockchip_drm_vop.h
View File

@ -141,6 +141,7 @@ struct vop_win_phy {
struct vop_reg dst_alpha_ctl;
struct vop_reg src_alpha_ctl;
struct vop_reg channel;
};
struct vop_win_data {

1
drivers/gpu/drm/rockchip/rockchip_vop_reg.c
View File

@ -197,6 +197,7 @@ static const struct vop_win_phy rk3288_win01_data = {
.uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),
.src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
.dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0),
.channel = VOP_REG(RK3288_WIN0_CTRL2, 0xff, 0),
};
static const struct vop_win_phy rk3288_win23_data = {