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usb: dwc3: imx8mp: Add support for setting SOC specific flags 

The i.MX8MP glue layer has support for the following flags:
* over-current polarity
* PWR pad polarity
* controlling PPC flag in HCCPARAMS register
* permanent port attach for usb2 & usb3 port

Allow setting these flags by supporting specific flags in the glue node.
In order to get this to work an additional IORESOURCE_MEM and clock is
necessary. For backward compatibility this is purely optional.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Link: https://lore.kernel.org/r/20220218152707.2198357-4-alexander.stein@ew.tq-group.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Alexander Stein 2022-02-18 16:27:06 +01:00 committed by Greg Kroah-Hartman
parent d600d31e37
commit 9d52107185
1 changed files with 63 additions and 0 deletions
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63
drivers/usb/dwc3/dwc3-imx8mp.c
View File

@ -36,10 +36,22 @@
#define USB_WAKEUP_EN_MASK GENMASK(5, 0)
/* USB glue registers */
#define USB_CTRL0 0x00
#define USB_CTRL1 0x04
#define USB_CTRL0_PORTPWR_EN BIT(12) /* 1 - PPC enabled (default) */
#define USB_CTRL0_USB3_FIXED BIT(22) /* 1 - USB3 permanent attached */
#define USB_CTRL0_USB2_FIXED BIT(23) /* 1 - USB2 permanent attached */
#define USB_CTRL1_OC_POLARITY BIT(16) /* 0 - HIGH / 1 - LOW */
#define USB_CTRL1_PWR_POLARITY BIT(17) /* 0 - HIGH / 1 - LOW */
struct dwc3_imx8mp {
struct device *dev;
struct platform_device *dwc3;
void __iomem *hsio_blk_base;
void __iomem *glue_base;
struct clk *hsio_clk;
struct clk *suspend_clk;
int irq;
@ -47,6 +59,42 @@ struct dwc3_imx8mp {
bool wakeup_pending;
};
static void imx8mp_configure_glue(struct dwc3_imx8mp *dwc3_imx)
{
struct device *dev = dwc3_imx->dev;
u32 value;
if (!dwc3_imx->glue_base)
return;
value = readl(dwc3_imx->glue_base + USB_CTRL0);
if (device_property_read_bool(dev, "fsl,permanently-attached"))
value |= (USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED);
else
value &= ~(USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED);
if (device_property_read_bool(dev, "fsl,disable-port-power-control"))
value &= ~(USB_CTRL0_PORTPWR_EN);
else
value |= USB_CTRL0_PORTPWR_EN;
writel(value, dwc3_imx->glue_base + USB_CTRL0);
value = readl(dwc3_imx->glue_base + USB_CTRL1);
if (device_property_read_bool(dev, "fsl,over-current-active-low"))
value |= USB_CTRL1_OC_POLARITY;
else
value &= ~USB_CTRL1_OC_POLARITY;
if (device_property_read_bool(dev, "fsl,power-active-low"))
value |= USB_CTRL1_PWR_POLARITY;
else
value &= ~USB_CTRL1_PWR_POLARITY;
writel(value, dwc3_imx->glue_base + USB_CTRL1);
}
static void dwc3_imx8mp_wakeup_enable(struct dwc3_imx8mp *dwc3_imx)
{
struct dwc3 *dwc3 = platform_get_drvdata(dwc3_imx->dwc3);
@ -100,6 +148,7 @@ static int dwc3_imx8mp_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct device_node *dwc3_np, *node = dev->of_node;
struct dwc3_imx8mp *dwc3_imx;
struct resource *res;
int err, irq;
if (!node) {
@ -119,6 +168,15 @@ static int dwc3_imx8mp_probe(struct platform_device *pdev)
if (IS_ERR(dwc3_imx->hsio_blk_base))
return PTR_ERR(dwc3_imx->hsio_blk_base);
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
if (!res) {
dev_warn(dev, "Base address for glue layer missing. Continuing without, some features are missing though.");
} else {
dwc3_imx->glue_base = devm_ioremap_resource(dev, res);
if (IS_ERR(dwc3_imx->glue_base))
return PTR_ERR(dwc3_imx->glue_base);
}
dwc3_imx->hsio_clk = devm_clk_get(dev, "hsio");
if (IS_ERR(dwc3_imx->hsio_clk)) {
err = PTR_ERR(dwc3_imx->hsio_clk);
@ -152,6 +210,8 @@ static int dwc3_imx8mp_probe(struct platform_device *pdev)
}
dwc3_imx->irq = irq;
imx8mp_configure_glue(dwc3_imx);
pm_runtime_set_active(dev);
pm_runtime_enable(dev);
err = pm_runtime_get_sync(dev);
@ -252,6 +312,9 @@ static int __maybe_unused dwc3_imx8mp_resume(struct dwc3_imx8mp *dwc3_imx,
dwc3_imx8mp_wakeup_disable(dwc3_imx);
dwc3_imx->pm_suspended = false;
/* Upon power loss any previous configuration is lost, restore it */
imx8mp_configure_glue(dwc3_imx);
if (dwc3_imx->wakeup_pending) {
dwc3_imx->wakeup_pending = false;
if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE) {