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drm/msm/dpu: assign intf to encoder in mode_set 

Iterate and assign HW intf block to physical encoders
in encoder modeset. Moving all the HW block assignments
to encoder modeset to allow easy switching to state
based resource management.

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1550107156-17625-7-git-send-email-jsanka@codeaurora.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
Jeykumar Sankaran 2019-02-13 17:19:15 -08:00 committed by Rob Clark
parent b107603b4a
commit 9d4c8fd1af
2 changed files with 21 additions and 25 deletions
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22
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
View File

@ -969,7 +969,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
struct dpu_hw_ctl *hw_ctl[MAX_CHANNELS_PER_ENC] = { NULL };
struct dpu_hw_mixer *hw_lm[MAX_CHANNELS_PER_ENC] = { NULL };
int num_lm = 0, num_ctl = 0;
int i = 0, ret;
int i, j, ret;
if (!drm_enc) {
DPU_ERROR("invalid encoder\n");
@ -1066,6 +1066,26 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
phys->hw_pp = dpu_enc->hw_pp[i];
phys->hw_ctl = hw_ctl[i];
dpu_rm_init_hw_iter(&hw_iter, drm_enc->base.id,
DPU_HW_BLK_INTF);
for (j = 0; j < MAX_CHANNELS_PER_ENC; j++) {
struct dpu_hw_intf *hw_intf;
if (!dpu_rm_get_hw(&dpu_kms->rm, &hw_iter))
break;
hw_intf = (struct dpu_hw_intf *)hw_iter.hw;
if (hw_intf->idx == phys->intf_idx)
phys->hw_intf = hw_intf;
}
if (!phys->hw_intf) {
DPU_ERROR_ENC(dpu_enc,
"no intf block assigned at idx: %d\n",
i);
goto error;
}
phys->connector = conn->state->connector;
if (phys->ops.mode_set)
phys->ops.mode_set(phys, mode, adj_mode);

24
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
View File

@ -449,35 +449,11 @@ end:
static void dpu_encoder_phys_vid_enable(struct dpu_encoder_phys *phys_enc)
{
struct msm_drm_private *priv;
struct dpu_rm_hw_iter iter;
struct dpu_hw_ctl *ctl;
u32 flush_mask = 0;
if (!phys_enc || !phys_enc->parent || !phys_enc->parent->dev ||
!phys_enc->parent->dev->dev_private) {
DPU_ERROR("invalid encoder/device\n");
return;
}
priv = phys_enc->parent->dev->dev_private;
ctl = phys_enc->hw_ctl;
dpu_rm_init_hw_iter(&iter, phys_enc->parent->base.id, DPU_HW_BLK_INTF);
while (dpu_rm_get_hw(&phys_enc->dpu_kms->rm, &iter)) {
struct dpu_hw_intf *hw_intf = (struct dpu_hw_intf *)iter.hw;
if (hw_intf->idx == phys_enc->intf_idx) {
phys_enc->hw_intf = hw_intf;
break;
}
}
if (!phys_enc->hw_intf) {
DPU_ERROR("hw_intf not assigned\n");
return;
}
DPU_DEBUG_VIDENC(phys_enc, "\n");
if (WARN_ON(!phys_enc->hw_intf->ops.enable_timing))