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arm64: dts: mt7622: add timer, CCI-400 and PMU nodes 

Add device tree entries for timer, ARM CCI-400 and its PMU.
Otherwise, we add a cortex-a53-pmu node to enable hw perfevents.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Ryder Lee 2018-08-19 00:02:24 +08:00 committed by Matthias Brugger
parent 5b394b2ddf
commit 9cc7f0de9e
1 changed files with 55 additions and 0 deletions
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55
arch/arm64/boot/dts/mediatek/mt7622.dtsi
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@ -79,6 +79,7 @@
#cooling-cells = <2>; #cooling-cells = <2>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <1300000000>; clock-frequency = <1300000000>;
cci-control-port = <&cci_control2>;
}; };
cpu1: cpu@1 { cpu1: cpu@1 {
@ -92,6 +93,7 @@
#cooling-cells = <2>; #cooling-cells = <2>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <1300000000>; clock-frequency = <1300000000>;
cci-control-port = <&cci_control2>;
}; };
}; };
@ -113,6 +115,13 @@
method = "smc"; method = "smc";
}; };
pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_LOW>;
interrupt-affinity = <&cpu0>, <&cpu1>;
};
reserved-memory { reserved-memory {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
@ -218,6 +227,16 @@
#reset-cells = <1>; #reset-cells = <1>;
}; };
timer: timer@10004000 {
compatible = "mediatek,mt7622-timer",
"mediatek,mt6577-timer";
reg = <0 0x10004000 0 0x80>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
clocks = <&infracfg CLK_INFRA_APXGPT_PD>,
<&topckgen CLK_TOP_RTC>;
clock-names = "system-clk", "rtc-clk";
};
scpsys: scpsys@10006000 { scpsys: scpsys@10006000 {
compatible = "mediatek,mt7622-scpsys", compatible = "mediatek,mt7622-scpsys",
"syscon"; "syscon";
@ -325,6 +344,42 @@
<0 0x10360000 0 0x2000>; <0 0x10360000 0 0x2000>;
}; };
cci: cci@10390000 {
compatible = "arm,cci-400";
#address-cells = <1>;
#size-cells = <1>;
reg = <0 0x10390000 0 0x1000>;
ranges = <0 0 0x10390000 0x10000>;
cci_control0: slave-if@1000 {
compatible = "arm,cci-400-ctrl-if";
interface-type = "ace-lite";
reg = <0x1000 0x1000>;
};
cci_control1: slave-if@4000 {
compatible = "arm,cci-400-ctrl-if";
interface-type = "ace";
reg = <0x4000 0x1000>;
};
cci_control2: slave-if@5000 {
compatible = "arm,cci-400-ctrl-if";
interface-type = "ace";
reg = <0x5000 0x1000>;
};
pmu@9000 {
compatible = "arm,cci-400-pmu,r1";
reg = <0x9000 0x5000>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
};
};
auxadc: adc@11001000 { auxadc: adc@11001000 {
compatible = "mediatek,mt7622-auxadc"; compatible = "mediatek,mt7622-auxadc";
reg = <0 0x11001000 0 0x1000>; reg = <0 0x11001000 0 0x1000>;