From 9c869204b252027f2b57992914e2564fc4becd4a Mon Sep 17 00:00:00 2001 From: Pu Wen Date: Thu, 8 Jun 2023 12:46:00 +0800 Subject: [PATCH] x86/cpu: Get CPU topology and LLC ID for Hygon family 18h model 5h Add support to derive CPU topology for Hygon family 18h model 5h processor, and calculate LLC ID for it from the number of threads sharing the cache. Signed-off-by: Pu Wen Signed-off-by: Jinliang Zheng Reviewed-by: Bin Lai Signed-off-by: Jinliang Zheng Reviewed-by: caelli Signed-off-by: Jianping Liu --- arch/x86/kernel/cpu/cacheinfo.c | 29 ++++++++++++++++++++++++----- arch/x86/kernel/cpu/hygon.c | 1 + 2 files changed, 25 insertions(+), 5 deletions(-) diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c index cae566567e15..f467b9d18c52 100644 --- a/arch/x86/kernel/cpu/cacheinfo.c +++ b/arch/x86/kernel/cpu/cacheinfo.c @@ -693,11 +693,30 @@ void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c, int cpu) if (!cpuid_edx(0x80000006)) return; - /* - * LLC is at the core complex level. - * Core complex ID is ApicId[3] for these processors. - */ - per_cpu(cpu_llc_id, cpu) = c->apicid >> 3; + if (c->x86_model < 0x5) { + /* + * LLC is at the core complex level. + * Core complex ID is ApicId[3] for these processors. + */ + per_cpu(cpu_llc_id, cpu) = c->apicid >> 3; + } else { + /* + * LLC ID is calculated from the number of threads + * sharing the cache. + */ + u32 eax, ebx, ecx, edx, num_sharing_cache = 0; + u32 llc_index = find_num_cache_leaves(c) - 1; + + cpuid_count(0x8000001d, llc_index, &eax, &ebx, &ecx, &edx); + if (eax) + num_sharing_cache = ((eax >> 14) & 0xfff) + 1; + + if (num_sharing_cache) { + int bits = get_count_order(num_sharing_cache); + + per_cpu(cpu_llc_id, cpu) = c->apicid >> bits; + } + } } void init_amd_cacheinfo(struct cpuinfo_x86 *c) diff --git a/arch/x86/kernel/cpu/hygon.c b/arch/x86/kernel/cpu/hygon.c index 0196de7638fa..18805a03bbb7 100644 --- a/arch/x86/kernel/cpu/hygon.c +++ b/arch/x86/kernel/cpu/hygon.c @@ -88,6 +88,7 @@ static void hygon_get_topology(struct cpuinfo_x86 *c) c->phys_proc_id = c->apicid >> APICID_SOCKET_ID_BIT; break; case 0x4: + case 0x5: /* * In case leaf 0xB is available, use it to derive * topology information.