amd-xgbe: Simplify calculation and setting of queue fifos
The calculation of the Tx and Rx fifo sizes can be calculated rather than hardcoded in a switch statement. Additionally, the per-queue fifo sizes can be calculated rather than hardcoded using if/else if statements that can possibly underutilize the available fifo area. Change the code to calculate the fifo sizes and the per-queue fifo sizes to simplify the code and make best use of the available fifo. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1940,84 +1940,31 @@ static void xgbe_config_mtl_mode(struct xgbe_prv_data *pdata)
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static unsigned int xgbe_calculate_per_queue_fifo(unsigned int fifo_size,
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static unsigned int xgbe_calculate_per_queue_fifo(unsigned int fifo_size,
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unsigned int queue_count)
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unsigned int queue_count)
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{
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{
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unsigned int q_fifo_size = 0;
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unsigned int q_fifo_size;
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enum xgbe_mtl_fifo_size p_fifo = XGMAC_MTL_FIFO_SIZE_256;
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unsigned int p_fifo;
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/* Calculate Tx/Rx fifo share per queue */
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/* Calculate the configured fifo size */
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switch (fifo_size) {
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q_fifo_size = 1 << (fifo_size + 7);
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case 0:
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q_fifo_size = XGBE_FIFO_SIZE_B(128);
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break;
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case 1:
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q_fifo_size = XGBE_FIFO_SIZE_B(256);
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break;
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case 2:
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q_fifo_size = XGBE_FIFO_SIZE_B(512);
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break;
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case 3:
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q_fifo_size = XGBE_FIFO_SIZE_KB(1);
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break;
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case 4:
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q_fifo_size = XGBE_FIFO_SIZE_KB(2);
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break;
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case 5:
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q_fifo_size = XGBE_FIFO_SIZE_KB(4);
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break;
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case 6:
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q_fifo_size = XGBE_FIFO_SIZE_KB(8);
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break;
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case 7:
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q_fifo_size = XGBE_FIFO_SIZE_KB(16);
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break;
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case 8:
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q_fifo_size = XGBE_FIFO_SIZE_KB(32);
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break;
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case 9:
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q_fifo_size = XGBE_FIFO_SIZE_KB(64);
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break;
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case 10:
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q_fifo_size = XGBE_FIFO_SIZE_KB(128);
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break;
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case 11:
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q_fifo_size = XGBE_FIFO_SIZE_KB(256);
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break;
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}
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/* The configured value is not the actual amount of fifo RAM */
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/* The configured value may not be the actual amount of fifo RAM */
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q_fifo_size = min_t(unsigned int, XGBE_FIFO_MAX, q_fifo_size);
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q_fifo_size = min_t(unsigned int, XGBE_FIFO_MAX, q_fifo_size);
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q_fifo_size = q_fifo_size / queue_count;
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q_fifo_size = q_fifo_size / queue_count;
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/* Set the queue fifo size programmable value */
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/* Each increment in the queue fifo size represents 256 bytes of
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if (q_fifo_size >= XGBE_FIFO_SIZE_KB(256))
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* fifo, with 0 representing 256 bytes. Distribute the fifo equally
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p_fifo = XGMAC_MTL_FIFO_SIZE_256K;
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* between the queues.
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else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(128))
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*/
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p_fifo = XGMAC_MTL_FIFO_SIZE_128K;
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p_fifo = q_fifo_size / 256;
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else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(64))
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if (p_fifo)
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p_fifo = XGMAC_MTL_FIFO_SIZE_64K;
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p_fifo--;
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else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(32))
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p_fifo = XGMAC_MTL_FIFO_SIZE_32K;
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else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(16))
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p_fifo = XGMAC_MTL_FIFO_SIZE_16K;
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else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(8))
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p_fifo = XGMAC_MTL_FIFO_SIZE_8K;
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else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(4))
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p_fifo = XGMAC_MTL_FIFO_SIZE_4K;
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else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(2))
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p_fifo = XGMAC_MTL_FIFO_SIZE_2K;
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else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(1))
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p_fifo = XGMAC_MTL_FIFO_SIZE_1K;
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else if (q_fifo_size >= XGBE_FIFO_SIZE_B(512))
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p_fifo = XGMAC_MTL_FIFO_SIZE_512;
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else if (q_fifo_size >= XGBE_FIFO_SIZE_B(256))
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p_fifo = XGMAC_MTL_FIFO_SIZE_256;
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return p_fifo;
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return p_fifo;
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}
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}
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static void xgbe_config_tx_fifo_size(struct xgbe_prv_data *pdata)
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static void xgbe_config_tx_fifo_size(struct xgbe_prv_data *pdata)
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{
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{
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enum xgbe_mtl_fifo_size fifo_size;
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unsigned int fifo_size;
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unsigned int i;
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unsigned int i;
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fifo_size = xgbe_calculate_per_queue_fifo(pdata->hw_feat.tx_fifo_size,
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fifo_size = xgbe_calculate_per_queue_fifo(pdata->hw_feat.tx_fifo_size,
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@ -2033,7 +1980,7 @@ static void xgbe_config_tx_fifo_size(struct xgbe_prv_data *pdata)
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static void xgbe_config_rx_fifo_size(struct xgbe_prv_data *pdata)
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static void xgbe_config_rx_fifo_size(struct xgbe_prv_data *pdata)
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{
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{
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enum xgbe_mtl_fifo_size fifo_size;
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unsigned int fifo_size;
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unsigned int i;
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unsigned int i;
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fifo_size = xgbe_calculate_per_queue_fifo(pdata->hw_feat.rx_fifo_size,
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fifo_size = xgbe_calculate_per_queue_fifo(pdata->hw_feat.rx_fifo_size,
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@ -209,8 +209,6 @@
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#define XGMAC_IOCTL_CONTEXT 2
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#define XGMAC_IOCTL_CONTEXT 2
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#define XGBE_FIFO_MAX 81920
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#define XGBE_FIFO_MAX 81920
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#define XGBE_FIFO_SIZE_B(x) (x)
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#define XGBE_FIFO_SIZE_KB(x) (x * 1024)
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#define XGBE_TC_MIN_QUANTUM 10
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#define XGBE_TC_MIN_QUANTUM 10
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@ -483,20 +481,6 @@ enum xgbe_int_state {
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XGMAC_INT_STATE_RESTORE,
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XGMAC_INT_STATE_RESTORE,
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};
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};
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enum xgbe_mtl_fifo_size {
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XGMAC_MTL_FIFO_SIZE_256 = 0x00,
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XGMAC_MTL_FIFO_SIZE_512 = 0x01,
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XGMAC_MTL_FIFO_SIZE_1K = 0x03,
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XGMAC_MTL_FIFO_SIZE_2K = 0x07,
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XGMAC_MTL_FIFO_SIZE_4K = 0x0f,
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XGMAC_MTL_FIFO_SIZE_8K = 0x1f,
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XGMAC_MTL_FIFO_SIZE_16K = 0x3f,
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XGMAC_MTL_FIFO_SIZE_32K = 0x7f,
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XGMAC_MTL_FIFO_SIZE_64K = 0xff,
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XGMAC_MTL_FIFO_SIZE_128K = 0x1ff,
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XGMAC_MTL_FIFO_SIZE_256K = 0x3ff,
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};
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enum xgbe_speed {
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enum xgbe_speed {
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XGBE_SPEED_1000 = 0,
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XGBE_SPEED_1000 = 0,
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XGBE_SPEED_2500,
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XGBE_SPEED_2500,
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