Merge tag 'drm-intel-next-fixes-2019-12-05' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
- Includes gvt-next-fixes-2019-12-02 pull - Fixes for CI spotted eadlock and a race condition in GEM contexts - Fix for EHL port D programming Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191205092412.GA8089@jlahtine-desk.ger.corp.intel.com
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commit
9c1867d730
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@ -5476,15 +5476,13 @@ static bool bxt_digital_port_connected(struct intel_encoder *encoder)
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return I915_READ(GEN8_DE_PORT_ISR) & bit;
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}
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static bool icl_combo_port_connected(struct drm_i915_private *dev_priv,
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struct intel_digital_port *intel_dig_port)
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static bool intel_combo_phy_connected(struct drm_i915_private *dev_priv,
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enum phy phy)
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{
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enum port port = intel_dig_port->base.port;
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if (HAS_PCH_MCC(dev_priv) && port == PORT_C)
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if (HAS_PCH_MCC(dev_priv) && phy == PHY_C)
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return I915_READ(SDEISR) & SDE_TC_HOTPLUG_ICP(PORT_TC1);
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return I915_READ(SDEISR) & SDE_DDI_HOTPLUG_ICP(port);
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return I915_READ(SDEISR) & SDE_DDI_HOTPLUG_ICP(phy);
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}
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static bool icl_digital_port_connected(struct intel_encoder *encoder)
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@ -5494,7 +5492,7 @@ static bool icl_digital_port_connected(struct intel_encoder *encoder)
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enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
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if (intel_phy_is_combo(dev_priv, phy))
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return icl_combo_port_connected(dev_priv, dig_port);
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return intel_combo_phy_connected(dev_priv, phy);
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else if (intel_phy_is_tc(dev_priv, phy))
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return intel_tc_port_connected(dig_port);
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else
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@ -368,7 +368,7 @@ static struct intel_engine_cs *active_engine(struct intel_context *ce)
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if (!ce->timeline)
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return NULL;
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rcu_read_lock();
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mutex_lock(&ce->timeline->mutex);
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list_for_each_entry_reverse(rq, &ce->timeline->requests, link) {
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if (i915_request_completed(rq))
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break;
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@ -378,7 +378,7 @@ static struct intel_engine_cs *active_engine(struct intel_context *ce)
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if (engine)
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break;
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}
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rcu_read_unlock();
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mutex_unlock(&ce->timeline->mutex);
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return engine;
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}
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@ -1599,9 +1599,9 @@ static int cmd_handler_mi_op_2f(struct parser_exec_state *s)
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if (!(cmd_val(s, 0) & (1 << 22)))
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return ret;
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/* check if QWORD */
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if (DWORD_FIELD(0, 20, 19) == 1)
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valid_len += 8;
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/* check inline data */
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if (cmd_val(s, 0) & BIT(18))
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valid_len = CMD_LEN(9);
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ret = gvt_check_valid_cmd_length(cmd_length(s),
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valid_len);
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if (ret)
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@ -460,6 +460,7 @@ static int pipeconf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
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static i915_reg_t force_nonpriv_white_list[] = {
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GEN9_CS_DEBUG_MODE1, //_MMIO(0x20ec)
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GEN9_CTX_PREEMPT_REG,//_MMIO(0x2248)
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PS_INVOCATION_COUNT,//_MMIO(0x2348)
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GEN8_CS_CHICKEN1,//_MMIO(0x2580)
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_MMIO(0x2690),
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_MMIO(0x2694),
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@ -508,7 +509,7 @@ static inline bool in_whitelist(unsigned int reg)
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static int force_nonpriv_write(struct intel_vgpu *vgpu,
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unsigned int offset, void *p_data, unsigned int bytes)
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{
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u32 reg_nonpriv = *(u32 *)p_data;
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u32 reg_nonpriv = (*(u32 *)p_data) & REG_GENMASK(25, 2);
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int ring_id = intel_gvt_render_mmio_to_ring_id(vgpu->gvt, offset);
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u32 ring_base;
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struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
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@ -528,7 +529,7 @@ static int force_nonpriv_write(struct intel_vgpu *vgpu,
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bytes);
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} else
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gvt_err("vgpu(%d) Invalid FORCE_NONPRIV write %x at offset %x\n",
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vgpu->id, reg_nonpriv, offset);
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vgpu->id, *(u32 *)p_data, offset);
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return 0;
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}
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