Merge series "Add I2S-MCC support for Microchip's SAMA7G5" from Codrin Ciubotariu <codrin.ciubotariu@microchip.com>:
SAMA7G5 includes an updated version of I2S-MCC, found previously on
SAM9X60. This controller includes 8 data pins, 4 for playback and 4 for
capture. For I2S and LEFT_J formats, these pins can be used to
send/receive up to 8 audio channels. For DSP_A, with TDM, any pins pair
(DIN/DOUT) from these 4 can be selected to send/receive data. This
version also includes 2 FIFOs (send and receive).
This patch set starts by moving the driver's bindings to yaml and
continues with adding a new compatible for the SAMA7G5 variant, followed
by the changes needed for I2S/LEFT_J support, TDM pin pair selection and
FIFO support, exclusively for SAMA7G5.
Changes in v2:
- moved DT binding conversion patch from the beginning to the end of the
patch serieses
- patches that update the DT binding are modified to change .txt file
instead of .yaml
Codrin Ciubotariu (7):
dt-bindings: mchp,i2s-mcc: Add SAMA7G5 to binding
ASoC: mchp-i2s-mcc: Add compatible for SAMA7G5
ASoC: mchp-i2s-mcc: Add multi-channel support for I2S and LEFT_J
formats
dt-bindings: mchp,i2s-mcc: Add property to specify pin pair for TDM
ASoC: mchp-i2s-mcc: Add support to select TDM pins
ASoC: mchp-i2s-mcc: Add FIFOs support
ASoC: convert Microchip I2SMCC binding to yaml
.../bindings/sound/mchp,i2s-mcc.yaml | 108 ++++++++++++
.../bindings/sound/mchp-i2s-mcc.txt | 43 -----
sound/soc/atmel/Kconfig | 3 +
sound/soc/atmel/mchp-i2s-mcc.c | 161 +++++++++++++++---
4 files changed, 252 insertions(+), 63 deletions(-)
create mode 100644 Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
delete mode 100644 Documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt
--
2.27.0
This commit is contained in:
Mark Brown
commit
9bcf56c964
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/mchp,i2s-mcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip I2S Multi-Channel Controller
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maintainers:
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- Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
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description:
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The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and
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supports a Time Division Multiplexed (TDM) interface with external
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multi-channel audio codecs. It consists of a receiver, a transmitter and a
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common clock generator that can be enabled separately to provide Adapter,
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Client or Controller modes with receiver and/or transmitter active.
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On later I2SMCC versions (starting with Microchip's SAMA7G5) I2S
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multi-channel is supported by using multiple data pins, output and
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input, without TDM.
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properties:
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"#sound-dai-cells":
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const: 0
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compatible:
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enum:
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- microchip,sam9x60-i2smcc
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- microchip,sama7g5-i2smcc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: Peripheral Bus Clock
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- description: Generic Clock (Optional). Should be set mostly when Master
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Mode is required.
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minItems: 1
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clock-names:
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items:
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- const: pclk
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- const: gclk
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minItems: 1
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dmas:
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items:
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- description: TX DMA Channel
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- description: RX DMA Channel
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dma-names:
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items:
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- const: tx
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- const: rx
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microchip,tdm-data-pair:
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description:
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Represents the DIN/DOUT pair pins that are used to receive/send
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TDM data. It is optional and it is only needed if the controller
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uses the TDM mode.
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$ref: /schemas/types.yaml#/definitions/uint8
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enum: [0, 1, 2, 3]
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default: 0
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if:
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properties:
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compatible:
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const: microchip,sam9x60-i2smcc
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then:
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properties:
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microchip,tdm-data-pair: false
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required:
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- "#sound-dai-cells"
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- dmas
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- dma-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/dma/at91.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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i2s@f001c000 {
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#sound-dai-cells = <0>;
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compatible = "microchip,sam9x60-i2smcc";
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reg = <0xf001c000 0x100>;
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interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
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dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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AT91_XDMAC_DT_PERID(36))>,
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<&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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AT91_XDMAC_DT_PERID(37))>;
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dma-names = "tx", "rx";
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clocks = <&i2s_clk>, <&i2s_gclk>;
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clock-names = "pclk", "gclk";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2s_default>;
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};
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@ -1,49 +0,0 @@
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* Microchip I2S Multi-Channel Controller
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Required properties:
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- compatible: Should be "microchip,sam9x60-i2smcc" or
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"microchip,sama7g5-i2smcc".
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- reg: Should be the physical base address of the controller and the
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length of memory mapped region.
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- interrupts: Should contain the interrupt for the controller.
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- dmas: Should be one per channel name listed in the dma-names property,
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as described in atmel-dma.txt and dma.txt files.
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- dma-names: Identifier string for each DMA request line in the dmas property.
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Two dmas have to be defined, "tx" and "rx".
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- clocks: Must contain an entry for each entry in clock-names.
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Please refer to clock-bindings.txt.
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- clock-names: Should be one of each entry matching the clocks phandles list:
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- "pclk" (peripheral clock) Required.
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- "gclk" (generated clock) Optional (1).
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Optional properties:
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- pinctrl-0: Should specify pin control groups used for this controller.
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- princtrl-names: Should contain only one value - "default".
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- microchip,tdm-data-pair: 8 bit value that represents the DIN/DOUT pair pins
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which are used to receive/send TDM data. It is optional
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and it is only needed if the controller uses the TDM
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mode. Not available for "microchip,sam9x60-i2smcc"
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compatible. If it's not present, the default value is 0,
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so the DIN/DOUT 0 pins are used.
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(1) : Only the peripheral clock is required. The generated clock is optional
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and should be set mostly when Master Mode is required.
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Example:
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i2s@f001c000 {
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compatible = "microchip,sam9x60-i2smcc";
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reg = <0xf001c000 0x100>;
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interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
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dmas = <&dma0
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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AT91_XDMAC_DT_PERID(36))>,
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<&dma0
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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AT91_XDMAC_DT_PERID(37))>;
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dma-names = "tx", "rx";
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clocks = <&i2s_clk>, <&i2s_gclk>;
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clock-names = "pclk", "gclk";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2s_default>;
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};
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