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tty: serial: fsl_lpuart: Flush HW FIFOs in .flush_buffer 

Switching baud rate might cause bogus data to appear in HW
FIFO. Add code to do a HW FIFO flush to .flush_buffer callback to
avoid that.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Cory Tusar <cory.tusar@zii.aero>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.com>
Cc: linux-imx@nxp.com
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Link: https://lore.kernel.org/r/20190729195226.8862-4-andrew.smirnov@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Andrey Smirnov 2019-07-29 12:52:05 -07:00 committed by Greg Kroah-Hartman
parent cc584ab860
commit 9bc19af9da
1 changed files with 17 additions and 6 deletions
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23
drivers/tty/serial/fsl_lpuart.c
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@ -518,9 +518,16 @@ static int lpuart_dma_tx_request(struct uart_port *port)
return 0; return 0;
} }
static bool lpuart_is_32(struct lpuart_port *sport)
{
return sport->port.iotype == UPIO_MEM32 ||
sport->port.iotype == UPIO_MEM32BE;
}
static void lpuart_flush_buffer(struct uart_port *port) static void lpuart_flush_buffer(struct uart_port *port)
{ {
struct lpuart_port *sport = container_of(port, struct lpuart_port, port); struct lpuart_port *sport = container_of(port, struct lpuart_port, port);
u32 val;
if (sport->lpuart_dma_tx_use) { if (sport->lpuart_dma_tx_use) {
if (sport->dma_tx_in_progress) { if (sport->dma_tx_in_progress) {
@ -530,6 +537,16 @@ static void lpuart_flush_buffer(struct uart_port *port)
} }
dmaengine_terminate_all(sport->dma_tx_chan); dmaengine_terminate_all(sport->dma_tx_chan);
} }
if (lpuart_is_32(sport)) {
val = lpuart32_read(&sport->port, UARTFIFO);
val |= UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH;
lpuart32_write(&sport->port, val, UARTFIFO);
} else {
val = readb(sport->port.membase + UARTPFIFO);
val |= UARTCFIFO_TXFLUSH | UARTCFIFO_RXFLUSH;
writeb(val, sport->port.membase + UARTCFIFO);
}
} }
#if defined(CONFIG_CONSOLE_POLL) #if defined(CONFIG_CONSOLE_POLL)
@ -754,12 +771,6 @@ static unsigned int lpuart32_tx_empty(struct uart_port *port)
return 0; return 0;
} }
static bool lpuart_is_32(struct lpuart_port *sport)
{
return sport->port.iotype == UPIO_MEM32 ||
sport->port.iotype == UPIO_MEM32BE;
}
static irqreturn_t lpuart_txint(int irq, void *dev_id) static irqreturn_t lpuart_txint(int irq, void *dev_id)
{ {
struct lpuart_port *sport = dev_id; struct lpuart_port *sport = dev_id;