ARM: S3C24XX: Add initial s3c_gpio configuration code
Add support for s3c_gpio_setcfg() and s3c_gpio_setpull() implementations to get ready for removal of the specific code being used by s3c24xx. Also rename the s3c_gpio_setcfg_s3c24xx_banka to s3c_gpio_setcfg_s3c24xx_a as seen in the header file to correct a build warning. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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@ -9,6 +9,7 @@ config PLAT_S3C24XX
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select NO_IOPORT
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select NO_IOPORT
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select ARCH_REQUIRE_GPIOLIB
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select ARCH_REQUIRE_GPIOLIB
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select S3C_DEVICE_NAND
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select S3C_DEVICE_NAND
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select S3C_GPIO_CFG_S3C24XX
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help
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help
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Base platform code for any Samsung S3C24XX device
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Base platform code for any Samsung S3C24XX device
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@ -21,6 +21,8 @@
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#include <linux/gpio.h>
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#include <linux/gpio.h>
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#include <plat/gpio-core.h>
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#include <plat/gpio-core.h>
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#include <plat/gpio-cfg.h>
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#include <plat/gpio-cfg-helpers.h>
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#include <mach/hardware.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/irq.h>
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#include <plat/pm.h>
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#include <plat/pm.h>
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@ -77,10 +79,19 @@ static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset)
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return IRQ_EINT8 + offset;
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return IRQ_EINT8 + offset;
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}
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}
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static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
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.set_config = s3c_gpio_setcfg_s3c24xx_a,
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};
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struct s3c_gpio_cfg s3c24xx_gpiocfg_default = {
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.set_config = s3c_gpio_setcfg_s3c24xx,
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};
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struct s3c_gpio_chip s3c24xx_gpios[] = {
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struct s3c_gpio_chip s3c24xx_gpios[] = {
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[0] = {
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[0] = {
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.base = S3C2410_GPACON,
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.base = S3C2410_GPACON,
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.pm = __gpio_pm(&s3c_gpio_pm_1bit),
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.pm = __gpio_pm(&s3c_gpio_pm_1bit),
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.config = &s3c24xx_gpiocfg_banka,
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.chip = {
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.chip = {
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.base = S3C2410_GPA(0),
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.base = S3C2410_GPA(0),
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.owner = THIS_MODULE,
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.owner = THIS_MODULE,
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@ -168,8 +179,12 @@ static __init int s3c24xx_gpiolib_init(void)
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struct s3c_gpio_chip *chip = s3c24xx_gpios;
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struct s3c_gpio_chip *chip = s3c24xx_gpios;
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int gpn;
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int gpn;
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for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++)
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for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++) {
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if (!chip->config)
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chip->config = &s3c24xx_gpiocfg_default;
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s3c_gpiolib_add(chip);
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s3c_gpiolib_add(chip);
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}
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return 0;
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return 0;
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}
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}
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@ -61,8 +61,8 @@ int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
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EXPORT_SYMBOL(s3c_gpio_setpull);
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EXPORT_SYMBOL(s3c_gpio_setpull);
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#ifdef CONFIG_S3C_GPIO_CFG_S3C24XX
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#ifdef CONFIG_S3C_GPIO_CFG_S3C24XX
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int s3c_gpio_setcfg_s3c24xx_banka(struct s3c_gpio_chip *chip,
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int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
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unsigned int off, unsigned int cfg)
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unsigned int off, unsigned int cfg)
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{
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{
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void __iomem *reg = chip->base;
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void __iomem *reg = chip->base;
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unsigned int shift = off;
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unsigned int shift = off;
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@ -108,6 +108,9 @@ extern void samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip,
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extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip);
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extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip);
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extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
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extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
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/* exported for core SoC support to change */
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extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default;
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#ifdef CONFIG_S3C_GPIO_TRACK
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#ifdef CONFIG_S3C_GPIO_TRACK
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extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
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extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
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