media: ov2680: Add a bunch of register tweaks
Usually when developing a sensor driver with help from the vendor the vendor will provide a bunch of register tweaks for optimal performance of the sensor. The atomisp-ov2680.c driver was (presumably) developed by Intel with help from OmniVision and indeed contains a bunch of register tweaks. Add these register tweaks to the "main" ov2680.c driver. Acked-by: Rui Miguel Silva <rmfrfs@gmail.com> Reviewed-by: Daniel Scally <dan.scally@ideasonboard.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
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@ -180,18 +180,71 @@ static const int ov2680_hv_flip_bayer_order[] = {
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};
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};
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static const struct reg_sequence ov2680_global_setting[] = {
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static const struct reg_sequence ov2680_global_setting[] = {
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/* MIPI PHY, 0x10 -> 0x1c enable bp_c_hs_en_lat and bp_d_hs_en_lat */
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{0x3016, 0x1c},
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/* R MANUAL set exposure and gain to manual (hw does not do auto) */
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/* R MANUAL set exposure and gain to manual (hw does not do auto) */
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{0x3503, 0x03},
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{0x3503, 0x03},
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/* Analog control register tweaks */
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{0x3603, 0x39}, /* Reset value 0x99 */
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{0x3604, 0x24}, /* Reset value 0x74 */
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{0x3621, 0x37}, /* Reset value 0x44 */
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/* Sensor control register tweaks */
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{0x3701, 0x64}, /* Reset value 0x61 */
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{0x3705, 0x3c}, /* Reset value 0x21 */
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{0x370c, 0x50}, /* Reset value 0x10 */
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{0x370d, 0xc0}, /* Reset value 0x00 */
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{0x3718, 0x88}, /* Reset value 0x80 */
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/* PSRAM tweaks */
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{0x3781, 0x80}, /* Reset value 0x00 */
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{0x3784, 0x0c}, /* Reset value 0x00, based on OV2680_R1A_AM10.ovt */
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{0x3789, 0x60}, /* Reset value 0x50 */
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/* BLC CTRL00 0x01 -> 0x81 set avg_weight to 8 */
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{0x4000, 0x81},
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/* Set black level compensation range to 0 - 3 (default 0 - 11) */
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/* Set black level compensation range to 0 - 3 (default 0 - 11) */
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{0x4008, 0x00},
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{0x4008, 0x00},
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{0x4009, 0x03},
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{0x4009, 0x03},
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/* VFIFO R2 0x00 -> 0x02 set Frame reset enable */
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{0x4602, 0x02},
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/* MIPI ctrl CLK PREPARE MIN change from 0x26 (38) -> 0x36 (54) */
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{0x481f, 0x36},
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/* MIPI ctrl CLK LPX P MIN change from 0x32 (50) -> 0x36 (54) */
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{0x4825, 0x36},
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/* R ISP CTRL2 0x20 -> 0x30, set sof_sel bit */
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{0x5002, 0x30},
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/*
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/*
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* Window CONTROL 0x00 -> 0x01, enable manual window control,
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* Window CONTROL 0x00 -> 0x01, enable manual window control,
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* this is necessary for full size flip and mirror support.
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* this is necessary for full size flip and mirror support.
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*/
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*/
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{0x5708, 0x01},
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{0x5708, 0x01},
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/*
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* DPC CTRL0 0x14 -> 0x3e, set enable_tail, enable_3x3_cluster
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* and enable_general_tail bits based OV2680_R1A_AM10.ovt.
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*/
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{0x5780, 0x3e},
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/* DPC MORE CONNECTION CASE THRE 0x0c (12) -> 0x02 (2) */
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{0x5788, 0x02},
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/* DPC GAIN LIST1 0x0f (15) -> 0x08 (8) */
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{0x578e, 0x08},
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/* DPC GAIN LIST2 0x3f (63) -> 0x0c (12) */
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{0x578f, 0x0c},
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/* DPC THRE RATIO 0x04 (4) -> 0x00 (0) */
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{0x5792, 0x00},
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};
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};
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static struct ov2680_dev *to_ov2680_dev(struct v4l2_subdev *sd)
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static struct ov2680_dev *to_ov2680_dev(struct v4l2_subdev *sd)
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