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OMAPDSS: DSI: use lane config in dsi_cio_enable_lane_override 

Use the new lane config in dsi_cio_enable_lane_override(). The function
parameters are also slightly changed.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Tomi Valkeinen 2011-10-13 16:06:43 +03:00
parent 8dc0766fcf
commit 9b4362f2b5
1 changed files with 23 additions and 54 deletions
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77
drivers/video/omap2/dss/dsi.c
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@ -238,19 +238,6 @@ enum dsi_vc_source {
DSI_VC_SOURCE_VP,
};
enum dsi_lane {
DSI_CLK_P = 1 << 0,
DSI_CLK_N = 1 << 1,
DSI_DATA1_P = 1 << 2,
DSI_DATA1_N = 1 << 3,
DSI_DATA2_P = 1 << 4,
DSI_DATA2_N = 1 << 5,
DSI_DATA3_P = 1 << 6,
DSI_DATA3_N = 1 << 7,
DSI_DATA4_P = 1 << 8,
DSI_DATA4_N = 1 << 9,
};
struct dsi_update_region {
u16 x, y, w, h;
struct omap_dss_device *device;
@ -2290,49 +2277,28 @@ static void dsi_cio_timings(struct platform_device *dsidev)
dsi_write_reg(dsidev, DSI_DSIPHY_CFG2, r);
}
/* lane masks have lane 0 at lsb. mask_p for positive lines, n for negative */
static void dsi_cio_enable_lane_override(struct omap_dss_device *dssdev,
enum dsi_lane lanes)
unsigned mask_p, unsigned mask_n)
{
struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
int clk_lane = dssdev->phy.dsi.clk_lane;
int data1_lane = dssdev->phy.dsi.data1_lane;
int data2_lane = dssdev->phy.dsi.data2_lane;
int data3_lane = dssdev->phy.dsi.data3_lane;
int data4_lane = dssdev->phy.dsi.data4_lane;
int clk_pol = dssdev->phy.dsi.clk_pol;
int data1_pol = dssdev->phy.dsi.data1_pol;
int data2_pol = dssdev->phy.dsi.data2_pol;
int data3_pol = dssdev->phy.dsi.data3_pol;
int data4_pol = dssdev->phy.dsi.data4_pol;
u32 l = 0;
int i;
u32 l;
u8 lptxscp_start = dsi->num_lanes_supported == 3 ? 22 : 26;
if (lanes & DSI_CLK_P)
l |= 1 << ((clk_lane - 1) * 2 + (clk_pol ? 0 : 1));
if (lanes & DSI_CLK_N)
l |= 1 << ((clk_lane - 1) * 2 + (clk_pol ? 1 : 0));
l = 0;
if (lanes & DSI_DATA1_P)
l |= 1 << ((data1_lane - 1) * 2 + (data1_pol ? 0 : 1));
if (lanes & DSI_DATA1_N)
l |= 1 << ((data1_lane - 1) * 2 + (data1_pol ? 1 : 0));
for (i = 0; i < dsi->num_lanes_supported; ++i) {
unsigned p = dsi->lanes[i].polarity;
if (lanes & DSI_DATA2_P)
l |= 1 << ((data2_lane - 1) * 2 + (data2_pol ? 0 : 1));
if (lanes & DSI_DATA2_N)
l |= 1 << ((data2_lane - 1) * 2 + (data2_pol ? 1 : 0));
if (mask_p & (1 << i))
l |= 1 << (i * 2 + (p ? 0 : 1));
if (lanes & DSI_DATA3_P)
l |= 1 << ((data3_lane - 1) * 2 + (data3_pol ? 0 : 1));
if (lanes & DSI_DATA3_N)
l |= 1 << ((data3_lane - 1) * 2 + (data3_pol ? 1 : 0));
if (mask_n & (1 << i))
l |= 1 << (i * 2 + (p ? 1 : 0));
}
if (lanes & DSI_DATA4_P)
l |= 1 << ((data4_lane - 1) * 2 + (data4_pol ? 0 : 1));
if (lanes & DSI_DATA4_N)
l |= 1 << ((data4_lane - 1) * 2 + (data4_pol ? 1 : 0));
/*
* Bits in REGLPTXSCPDAT4TO0DXDY:
* 17: DY0 18: DX0
@ -2432,7 +2398,6 @@ static int dsi_cio_init(struct omap_dss_device *dssdev)
struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
int r;
int num_lanes_used = dsi_get_num_lanes_used(dssdev);
u32 l;
DSSDBGF();
@ -2467,7 +2432,8 @@ static int dsi_cio_init(struct omap_dss_device *dssdev)
dsi_write_reg(dsidev, DSI_TIMING1, l);
if (dsi->ulps_enabled) {
u32 lane_mask = DSI_CLK_P | DSI_DATA1_P | DSI_DATA2_P;
unsigned mask_p;
int i;
DSSDBG("manual ulps exit\n");
@ -2476,16 +2442,19 @@ static int dsi_cio_init(struct omap_dss_device *dssdev)
* ULPS exit sequence, as after reset the DSS HW thinks
* that we are not in ULPS mode, and refuses to send the
* sequence. So we need to send the ULPS exit sequence
* manually.
* manually by setting positive lines high and negative lines
* low for 1ms.
*/
if (num_lanes_used > 3)
lane_mask |= DSI_DATA3_P;
mask_p = 0;
if (num_lanes_used > 4)
lane_mask |= DSI_DATA4_P;
for (i = 0; i < dsi->num_lanes_supported; ++i) {
if (dsi->lanes[i].function == DSI_LANE_UNUSED)
continue;
mask_p |= 1 << i;
}
dsi_cio_enable_lane_override(dssdev, lane_mask);
dsi_cio_enable_lane_override(dssdev, mask_p, 0);
}
r = dsi_cio_power(dsidev, DSI_COMPLEXIO_POWER_ON);