This pull request got a bit bigger than I wanted, due to
needing to reshuffle and fix some bugs. I merged mac80211
to get the right base for some of these changes.
* new mac80211 API for upcoming driver changes: EOSP handling,
key iteration
* scan abort changes allowing to cancel an ongoing scan
* VHT IBSS 80+80 MHz support
* re-enable full AP client state tracking after fixes
* various small fixes (that weren't relevant for mac80211)
* various cleanups
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Merge tag 'mac80211-next-for-davem-2015-12-07' into next
This pull request got a bit bigger than I wanted, due to
needing to reshuffle and fix some bugs. I merged mac80211
to get the right base for some of these changes.
* new mac80211 API for upcoming driver changes: EOSP handling,
key iteration
* scan abort changes allowing to cancel an ongoing scan
* VHT IBSS 80+80 MHz support
* re-enable full AP client state tracking after fixes
* various small fixes (that weren't relevant for mac80211)
* various cleanups
This commit is contained in:
Emmanuel Grumbach
commit
9b18d42dda
|
|
@ -0,0 +1,12 @@
|
|||
What: /sys/bus/scsi/drivers/st/debug_flag
|
||||
Date: October 2015
|
||||
Kernel Version: ?.?
|
||||
Contact: shane.seymour@hpe.com
|
||||
Description:
|
||||
This file allows you to turn debug output from the st driver
|
||||
off if you write a '0' to the file or on if you write a '1'.
|
||||
Note that debug output requires that the module be compiled
|
||||
with the #define DEBUG set to a non-zero value (this is the
|
||||
default). If DEBUG is set to 0 then this file will not
|
||||
appear in sysfs as its presence is conditional upon debug
|
||||
output support being compiled into the module.
|
||||
|
|
@ -718,8 +718,21 @@ generates appropriate diffstats by default.)
|
|||
See more details on the proper patch format in the following
|
||||
references.
|
||||
|
||||
15) Explicit In-Reply-To headers
|
||||
--------------------------------
|
||||
|
||||
15) Sending "git pull" requests
|
||||
It can be helpful to manually add In-Reply-To: headers to a patch
|
||||
(e.g., when using "git send email") to associate the patch with
|
||||
previous relevant discussion, e.g. to link a bug fix to the email with
|
||||
the bug report. However, for a multi-patch series, it is generally
|
||||
best to avoid using In-Reply-To: to link to older versions of the
|
||||
series. This way multiple versions of the patch don't become an
|
||||
unmanageable forest of references in email clients. If a link is
|
||||
helpful, you can use the https://lkml.kernel.org/ redirector (e.g., in
|
||||
the cover email text) to link to an earlier version of the patch series.
|
||||
|
||||
|
||||
16) Sending "git pull" requests
|
||||
-------------------------------
|
||||
|
||||
If you have a series of patches, it may be most convenient to have the
|
||||
|
|
|
|||
|
|
@ -1,14 +1,15 @@
|
|||
* Texas Instruments tsc2005 touchscreen controller
|
||||
* Texas Instruments tsc2004 and tsc2005 touchscreen controllers
|
||||
|
||||
Required properties:
|
||||
- compatible : "ti,tsc2005"
|
||||
- reg : SPI device address
|
||||
- spi-max-frequency : Maximal SPI speed
|
||||
- compatible : "ti,tsc2004" or "ti,tsc2005"
|
||||
- reg : Device address
|
||||
- interrupts : IRQ specifier
|
||||
- reset-gpios : GPIO specifier
|
||||
- vio-supply : Regulator specifier
|
||||
- spi-max-frequency : Maximum SPI clocking speed of the device
|
||||
(for tsc2005)
|
||||
|
||||
Optional properties:
|
||||
- vio-supply : Regulator specifier
|
||||
- reset-gpios : GPIO specifier for the controller reset line
|
||||
- ti,x-plate-ohms : integer, resistance of the touchscreen's X plates
|
||||
in ohm (defaults to 280)
|
||||
- ti,esd-recovery-timeout-ms : integer, if the touchscreen does not respond after
|
||||
|
|
@ -18,6 +19,27 @@ Optional properties:
|
|||
|
||||
Example:
|
||||
|
||||
&i2c3 {
|
||||
tsc2004@48 {
|
||||
compatible = "ti,tsc2004";
|
||||
reg = <0x48>;
|
||||
vio-supply = <&vio>;
|
||||
|
||||
reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
|
||||
interrupts-extended = <&gpio1 27 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
touchscreen-fuzz-x = <4>;
|
||||
touchscreen-fuzz-y = <7>;
|
||||
touchscreen-fuzz-pressure = <2>;
|
||||
touchscreen-size-x = <4096>;
|
||||
touchscreen-size-y = <4096>;
|
||||
touchscreen-max-pressure = <2048>;
|
||||
|
||||
ti,x-plate-ohms = <280>;
|
||||
ti,esd-recovery-timeout-ms = <8000>;
|
||||
};
|
||||
}
|
||||
|
||||
&mcspi1 {
|
||||
tsc2005@0 {
|
||||
compatible = "ti,tsc2005";
|
||||
|
|
|
|||
|
|
@ -0,0 +1,83 @@
|
|||
Imagination University Program MIPSfpga
|
||||
=======================================
|
||||
|
||||
Under the Imagination University Program, a microAptiv UP core has been
|
||||
released for academic usage.
|
||||
|
||||
As we are dealing with a MIPS core instantiated on an FPGA, specifications
|
||||
are fluid and can be varied in RTL.
|
||||
|
||||
This binding document is provided as baseline guidance for the example
|
||||
project provided by IMG.
|
||||
|
||||
The example project runs on the Nexys4DDR board by Digilent powered by
|
||||
the ARTIX-7 FPGA by Xilinx.
|
||||
|
||||
Relevant details about the example project and the Nexys4DDR board:
|
||||
|
||||
- microAptiv UP core m14Kc
|
||||
- 50MHz clock speed
|
||||
- 128Mbyte DDR RAM at 0x0000_0000
|
||||
- 8Kbyte RAM at 0x1000_0000
|
||||
- axi_intc at 0x1020_0000
|
||||
- axi_uart16550 at 0x1040_0000
|
||||
- axi_gpio at 0x1060_0000
|
||||
- axi_i2c at 0x10A0_0000
|
||||
- custom_gpio at 0x10C0_0000
|
||||
- axi_ethernetlite at 0x10E0_0000
|
||||
- 8Kbyte BootRAM at 0x1FC0_0000
|
||||
|
||||
Required properties:
|
||||
--------------------
|
||||
- compatible: Must include "digilent,nexys4ddr","img,xilfpga".
|
||||
|
||||
CPU nodes:
|
||||
----------
|
||||
A "cpus" node is required. Required properties:
|
||||
- #address-cells: Must be 1.
|
||||
- #size-cells: Must be 0.
|
||||
A CPU sub-node is also required for at least CPU 0. Required properties:
|
||||
- device_type: Must be "cpu".
|
||||
- compatible: Must be "mips,m14Kc".
|
||||
- reg: Must be <0>.
|
||||
- clocks: phandle to ext clock for fixed-clock received by MIPS core.
|
||||
|
||||
Example:
|
||||
|
||||
compatible = "img,xilfpga","digilent,nexys4ddr";
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "mips,m14Kc";
|
||||
reg = <0>;
|
||||
clocks = <&ext>;
|
||||
};
|
||||
};
|
||||
|
||||
ext: ext {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <50000000>;
|
||||
};
|
||||
|
||||
Boot protocol:
|
||||
--------------
|
||||
|
||||
The BootRAM is a writeable "RAM" in FPGA at 0x1FC0_0000.
|
||||
This is for easy reprogrammibility via JTAG.
|
||||
|
||||
The BootRAM initializes the cache and the axi_uart peripheral.
|
||||
|
||||
DDR initialization is already handled by a HW IP block.
|
||||
|
||||
When the example project bitstream is loaded, the cpu_reset button
|
||||
needs to be pressed.
|
||||
|
||||
The bootram initializes the cache and axi_uart.
|
||||
Then outputs MIPSFPGA\n\r on the serial port on the Nexys4DDR board.
|
||||
|
||||
At this point, the board is ready to load the Linux kernel
|
||||
vmlinux file via JTAG.
|
||||
|
|
@ -31,6 +31,8 @@ A switch child node has the following optional property:
|
|||
switch. Must be set if the switch can not detect
|
||||
the presence and/or size of a connected EEPROM,
|
||||
otherwise optional.
|
||||
- reset-gpios : phandle and specifier to a gpio line connected to
|
||||
reset pin of the switch chip.
|
||||
|
||||
A switch may have multiple "port" children nodes
|
||||
|
||||
|
|
@ -114,6 +116,7 @@ Example:
|
|||
#size-cells = <0>;
|
||||
reg = <17 1>; /* MDIO address 17, switch 1 in tree */
|
||||
mii-bus = <&mii_bus1>;
|
||||
reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
|
||||
|
||||
switch1port0: port@0 {
|
||||
reg = <0>;
|
||||
|
|
|
|||
|
|
@ -1,7 +1,12 @@
|
|||
Hisilicon MDIO bus controller
|
||||
|
||||
Properties:
|
||||
- compatible: "hisilicon,mdio","hisilicon,hns-mdio".
|
||||
- compatible: can be one of:
|
||||
"hisilicon,hns-mdio"
|
||||
"hisilicon,mdio"
|
||||
"hisilicon,hns-mdio" is recommended to be used for hip05 and later SOCs,
|
||||
while "hisilicon,mdio" is optional for backwards compatibility only on
|
||||
hip04 Soc.
|
||||
- reg: The base address of the MDIO bus controller register bank.
|
||||
- #address-cells: Must be <1>.
|
||||
- #size-cells: Must be <0>. MDIO addresses have no size component.
|
||||
|
|
|
|||
|
|
@ -0,0 +1,20 @@
|
|||
Broadcom BCM7038 PWM controller (BCM7xxx Set Top Box PWM controller)
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: must be "brcm,bcm7038-pwm"
|
||||
- reg: physical base address and length for this controller
|
||||
- #pwm-cells: should be 2. See pwm.txt in this directory for a description
|
||||
of the cells format
|
||||
- clocks: a phandle to the reference clock for this block which is fed through
|
||||
its internal variable clock frequency generator
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
pwm: pwm@f0408000 {
|
||||
compatible = "brcm,bcm7038-pwm";
|
||||
reg = <0xf0408000 0x28>;
|
||||
#pwm-cells = <2>;
|
||||
clocks = <&upg_fixed>;
|
||||
};
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
Berlin PWM controller
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "marvell,berlin-pwm"
|
||||
- reg: physical base address and length of the controller's registers
|
||||
- clocks: phandle to the input clock
|
||||
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
|
||||
the cells format.
|
||||
|
||||
Example:
|
||||
|
||||
pwm: pwm@f7f20000 {
|
||||
compatible = "marvell,berlin-pwm";
|
||||
reg = <0xf7f20000 0x40>;
|
||||
clocks = <&chip_clk CLKID_CFG>;
|
||||
#pwm-cells = <3>;
|
||||
}
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
MediaTek display PWM controller
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "mediatek,<name>-disp-pwm":
|
||||
- "mediatek,mt8173-disp-pwm": found on mt8173 SoC.
|
||||
- "mediatek,mt6595-disp-pwm": found on mt6595 SoC.
|
||||
- reg: physical base address and length of the controller's registers.
|
||||
- #pwm-cells: must be 2. See pwm.txt in this directory for a description of
|
||||
the cell format.
|
||||
- clocks: phandle and clock specifier of the PWM reference clock.
|
||||
- clock-names: must contain the following:
|
||||
- "main": clock used to generate PWM signals.
|
||||
- "mm": sync signals from the modules of mmsys.
|
||||
- pinctrl-names: Must contain a "default" entry.
|
||||
- pinctrl-0: One property must exist for each entry in pinctrl-names.
|
||||
See pinctrl/pinctrl-bindings.txt for details of the property values.
|
||||
|
||||
Example:
|
||||
pwm0: pwm@1401e000 {
|
||||
compatible = "mediatek,mt8173-disp-pwm",
|
||||
"mediatek,mt6595-disp-pwm";
|
||||
reg = <0 0x1401e000 0 0x1000>;
|
||||
#pwm-cells = <2>;
|
||||
clocks = <&mmsys CLK_MM_DISP_PWM026M>,
|
||||
<&mmsys CLK_MM_DISP_PWM0MM>;
|
||||
clock-names = "main", "mm";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&disp_pwm0_pins>;
|
||||
};
|
||||
|
||||
backlight_lcd: backlight_lcd {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm0 0 1000000>;
|
||||
brightness-levels = <
|
||||
0 16 32 48 64 80 96 112
|
||||
128 144 160 176 192 208 224 240
|
||||
255
|
||||
>;
|
||||
default-brightness-level = <9>;
|
||||
power-supply = <&mt6397_vio18_reg>;
|
||||
enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
|
@ -3,6 +3,8 @@ Allwinner sun4i and sun7i SoC PWM controller
|
|||
Required properties:
|
||||
- compatible: should be one of:
|
||||
- "allwinner,sun4i-a10-pwm"
|
||||
- "allwinner,sun5i-a10s-pwm"
|
||||
- "allwinner,sun5i-a13-pwm"
|
||||
- "allwinner,sun7i-a20-pwm"
|
||||
- reg: physical base address and length of the controller's registers
|
||||
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
|
||||
|
|
|
|||
|
|
@ -0,0 +1,26 @@
|
|||
* Renesas R-Car PWM Timer Controller
|
||||
|
||||
Required Properties:
|
||||
- compatible: should be "renesas,pwm-rcar" and one of the following.
|
||||
- "renesas,pwm-r8a7778": for R-Car M1A
|
||||
- "renesas,pwm-r8a7779": for R-Car H1
|
||||
- "renesas,pwm-r8a7790": for R-Car H2
|
||||
- "renesas,pwm-r8a7791": for R-Car M2-W
|
||||
- "renesas,pwm-r8a7794": for R-Car E2
|
||||
- reg: base address and length of the registers block for the PWM.
|
||||
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
|
||||
the cells format.
|
||||
- clocks: clock phandle and specifier pair.
|
||||
- pinctrl-0: phandle, referring to a default pin configuration node.
|
||||
- pinctrl-names: Set to "default".
|
||||
|
||||
Example: R8A7790 (R-Car H2) PWM Timer node
|
||||
|
||||
pwm0: pwm@e6e30000 {
|
||||
compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e30000 0 0x8>;
|
||||
#pwm-cells = <2>;
|
||||
clocks = <&mstp5_clks R8A7790_CLK_PWM>;
|
||||
pinctrl-0 = <&pwm0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
|
@ -12,6 +12,11 @@ Required properties:
|
|||
- resets : Must contain an entry for each entry in reset-names.
|
||||
See ../reset/reset.txt for details.
|
||||
- reset-names : Must include the name "tsadc-apb".
|
||||
- pinctrl-names : The pin control state names;
|
||||
- pinctrl-0 : The "init" pinctrl state, it will be set before device probe.
|
||||
- pinctrl-1 : The "default" pinctrl state, it will be set after reset the
|
||||
TSADC controller.
|
||||
- pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend.
|
||||
- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
|
||||
- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
|
||||
- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
|
||||
|
|
@ -27,8 +32,10 @@ tsadc: tsadc@ff280000 {
|
|||
clock-names = "tsadc", "apb_pclk";
|
||||
resets = <&cru SRST_TSADC>;
|
||||
reset-names = "tsadc-apb";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&otp_out>;
|
||||
pinctrl-names = "init", "default", "sleep";
|
||||
pinctrl-0 = <&otp_gpio>;
|
||||
pinctrl-1 = <&otp_out>;
|
||||
pinctrl-2 = <&otp_gpio>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
rockchip,hw-tshut-temp = <95000>;
|
||||
rockchip,hw-tshut-mode = <0>;
|
||||
|
|
|
|||
|
|
@ -10,6 +10,8 @@ to the silicon temperature.
|
|||
|
||||
Required properties:
|
||||
- compatible : Should be:
|
||||
- "ti,omap34xx-bandgap" : for OMAP34xx bandgap
|
||||
- "ti,omap36xx-bandgap" : for OMAP36xx bandgap
|
||||
- "ti,omap4430-bandgap" : for OMAP4430 bandgap
|
||||
- "ti,omap4460-bandgap" : for OMAP4460 bandgap
|
||||
- "ti,omap4470-bandgap" : for OMAP4470 bandgap
|
||||
|
|
@ -25,6 +27,18 @@ to each bandgap version, because the mapping may change from
|
|||
soc to soc, apart of depending on available features.
|
||||
|
||||
Example:
|
||||
OMAP34xx:
|
||||
bandgap {
|
||||
reg = <0x48002524 0x4>;
|
||||
compatible = "ti,omap34xx-bandgap";
|
||||
};
|
||||
|
||||
OMAP36xx:
|
||||
bandgap {
|
||||
reg = <0x48002524 0x4>;
|
||||
compatible = "ti,omap36xx-bandgap";
|
||||
};
|
||||
|
||||
OMAP4430:
|
||||
bandgap {
|
||||
reg = <0x4a002260 0x4 0x4a00232C 0x4>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,58 @@
|
|||
* Qualcomm Technologies Inc Universal Flash Storage (UFS) PHY
|
||||
|
||||
UFSPHY nodes are defined to describe on-chip UFS PHY hardware macro.
|
||||
Each UFS PHY node should have its own node.
|
||||
|
||||
To bind UFS PHY with UFS host controller, the controller node should
|
||||
contain a phandle reference to UFS PHY node.
|
||||
|
||||
Required properties:
|
||||
- compatible : compatible list, contains "qcom,ufs-phy-qmp-20nm"
|
||||
or "qcom,ufs-phy-qmp-14nm" according to the relevant phy in use.
|
||||
- reg : should contain PHY register address space (mandatory),
|
||||
- reg-names : indicates various resources passed to driver (via reg proptery) by name.
|
||||
Required "reg-names" is "phy_mem".
|
||||
- #phy-cells : This property shall be set to 0
|
||||
- vdda-phy-supply : phandle to main PHY supply for analog domain
|
||||
- vdda-pll-supply : phandle to PHY PLL and Power-Gen block power supply
|
||||
- clocks : List of phandle and clock specifier pairs
|
||||
- clock-names : List of clock input name strings sorted in the same
|
||||
order as the clocks property. "ref_clk_src", "ref_clk",
|
||||
"tx_iface_clk" & "rx_iface_clk" are mandatory but
|
||||
"ref_clk_parent" is optional
|
||||
|
||||
Optional properties:
|
||||
- vdda-phy-max-microamp : specifies max. load that can be drawn from phy supply
|
||||
- vdda-pll-max-microamp : specifies max. load that can be drawn from pll supply
|
||||
- vddp-ref-clk-supply : phandle to UFS device ref_clk pad power supply
|
||||
- vddp-ref-clk-max-microamp : specifies max. load that can be drawn from this supply
|
||||
- vddp-ref-clk-always-on : specifies if this supply needs to be kept always on
|
||||
|
||||
Example:
|
||||
|
||||
ufsphy1: ufsphy@0xfc597000 {
|
||||
compatible = "qcom,ufs-phy-qmp-20nm";
|
||||
reg = <0xfc597000 0x800>;
|
||||
reg-names = "phy_mem";
|
||||
#phy-cells = <0>;
|
||||
vdda-phy-supply = <&pma8084_l4>;
|
||||
vdda-pll-supply = <&pma8084_l12>;
|
||||
vdda-phy-max-microamp = <50000>;
|
||||
vdda-pll-max-microamp = <1000>;
|
||||
clock-names = "ref_clk_src",
|
||||
"ref_clk_parent",
|
||||
"ref_clk",
|
||||
"tx_iface_clk",
|
||||
"rx_iface_clk";
|
||||
clocks = <&clock_rpm clk_ln_bb_clk>,
|
||||
<&clock_gcc clk_pcie_1_phy_ldo >,
|
||||
<&clock_gcc clk_ufs_phy_ldo>,
|
||||
<&clock_gcc clk_gcc_ufs_tx_cfg_clk>,
|
||||
<&clock_gcc clk_gcc_ufs_rx_cfg_clk>;
|
||||
};
|
||||
|
||||
ufshc@0xfc598000 {
|
||||
...
|
||||
phys = <&ufsphy1>;
|
||||
phy-names = "ufsphy";
|
||||
};
|
||||
|
|
@ -4,11 +4,18 @@ UFSHC nodes are defined to describe on-chip UFS host controllers.
|
|||
Each UFS controller instance should have its own node.
|
||||
|
||||
Required properties:
|
||||
- compatible : compatible list, contains "jedec,ufs-1.1"
|
||||
- compatible : must contain "jedec,ufs-1.1", may also list one or more
|
||||
of the following:
|
||||
"qcom,msm8994-ufshc"
|
||||
"qcom,msm8996-ufshc"
|
||||
"qcom,ufshc"
|
||||
- interrupts : <interrupt mapping for UFS host controller IRQ>
|
||||
- reg : <registers mapping>
|
||||
|
||||
Optional properties:
|
||||
- phys : phandle to UFS PHY node
|
||||
- phy-names : the string "ufsphy" when is found in a node, along
|
||||
with "phys" attribute, provides phandle to UFS PHY node
|
||||
- vdd-hba-supply : phandle to UFS host controller supply regulator node
|
||||
- vcc-supply : phandle to VCC supply regulator node
|
||||
- vccq-supply : phandle to VCCQ supply regulator node
|
||||
|
|
@ -54,4 +61,6 @@ Example:
|
|||
clocks = <&core 0>, <&ref 0>, <&iface 0>;
|
||||
clock-names = "core_clk", "ref_clk", "iface_clk";
|
||||
freq-table-hz = <100000000 200000000>, <0 0>, <0 0>;
|
||||
phys = <&ufsphy1>;
|
||||
phy-names = "ufsphy";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -165,7 +165,6 @@ mach-types.h
|
|||
machtypes.h
|
||||
map
|
||||
map_hugetlb
|
||||
media
|
||||
mconf
|
||||
miboot*
|
||||
mk_elfconfig
|
||||
|
|
|
|||
|
|
@ -176,11 +176,47 @@ To use 'vim' with mutt:
|
|||
if you want to include the patch inline.
|
||||
(a)ttach works fine without "set paste".
|
||||
|
||||
You can also generate patches with 'git format-patch' and then use Mutt
|
||||
to send them:
|
||||
$ mutt -H 0001-some-bug-fix.patch
|
||||
|
||||
Config options:
|
||||
It should work with default settings.
|
||||
However, it's a good idea to set the "send_charset" to:
|
||||
set send_charset="us-ascii:utf-8"
|
||||
|
||||
Mutt is highly customizable. Here is a minimum configuration to start
|
||||
using Mutt to send patches through Gmail:
|
||||
|
||||
# .muttrc
|
||||
# ================ IMAP ====================
|
||||
set imap_user = 'yourusername@gmail.com'
|
||||
set imap_pass = 'yourpassword'
|
||||
set spoolfile = imaps://imap.gmail.com/INBOX
|
||||
set folder = imaps://imap.gmail.com/
|
||||
set record="imaps://imap.gmail.com/[Gmail]/Sent Mail"
|
||||
set postponed="imaps://imap.gmail.com/[Gmail]/Drafts"
|
||||
set mbox="imaps://imap.gmail.com/[Gmail]/All Mail"
|
||||
|
||||
# ================ SMTP ====================
|
||||
set smtp_url = "smtp://username@smtp.gmail.com:587/"
|
||||
set smtp_pass = $imap_pass
|
||||
set ssl_force_tls = yes # Require encrypted connection
|
||||
|
||||
# ================ Composition ====================
|
||||
set editor = `echo \$EDITOR`
|
||||
set edit_headers = yes # See the headers when editing
|
||||
set charset = UTF-8 # value of $LANG; also fallback for send_charset
|
||||
# Sender, email address, and sign-off line must match
|
||||
unset use_domain # because joe@localhost is just embarrassing
|
||||
set realname = "YOUR NAME"
|
||||
set from = "username@gmail.com"
|
||||
set use_from = yes
|
||||
|
||||
The Mutt docs have lots more information:
|
||||
http://dev.mutt.org/trac/wiki/UseCases/Gmail
|
||||
http://dev.mutt.org/doc/manual.html
|
||||
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
Pine (TUI)
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,3 @@
|
|||
subdir-y := configfs
|
||||
|
||||
# List of programs to build
|
||||
hostprogs-y := dnotify_test
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +0,0 @@
|
|||
ifneq ($(CONFIG_CONFIGFS_FS),)
|
||||
obj-m += configfs_example_explicit.o configfs_example_macros.o
|
||||
endif
|
||||
|
|
@ -160,12 +160,6 @@ among other things. For that, it needs a type.
|
|||
|
||||
struct configfs_item_operations {
|
||||
void (*release)(struct config_item *);
|
||||
ssize_t (*show_attribute)(struct config_item *,
|
||||
struct configfs_attribute *,
|
||||
char *);
|
||||
ssize_t (*store_attribute)(struct config_item *,
|
||||
struct configfs_attribute *,
|
||||
const char *, size_t);
|
||||
int (*allow_link)(struct config_item *src,
|
||||
struct config_item *target);
|
||||
int (*drop_link)(struct config_item *src,
|
||||
|
|
@ -183,9 +177,7 @@ The most basic function of a config_item_type is to define what
|
|||
operations can be performed on a config_item. All items that have been
|
||||
allocated dynamically will need to provide the ct_item_ops->release()
|
||||
method. This method is called when the config_item's reference count
|
||||
reaches zero. Items that wish to display an attribute need to provide
|
||||
the ct_item_ops->show_attribute() method. Similarly, storing a new
|
||||
attribute value uses the store_attribute() method.
|
||||
reaches zero.
|
||||
|
||||
[struct configfs_attribute]
|
||||
|
||||
|
|
@ -193,6 +185,8 @@ attribute value uses the store_attribute() method.
|
|||
char *ca_name;
|
||||
struct module *ca_owner;
|
||||
umode_t ca_mode;
|
||||
ssize_t (*show)(struct config_item *, char *);
|
||||
ssize_t (*store)(struct config_item *, const char *, size_t);
|
||||
};
|
||||
|
||||
When a config_item wants an attribute to appear as a file in the item's
|
||||
|
|
@ -202,10 +196,10 @@ config_item_type->ct_attrs. When the item appears in configfs, the
|
|||
attribute file will appear with the configfs_attribute->ca_name
|
||||
filename. configfs_attribute->ca_mode specifies the file permissions.
|
||||
|
||||
If an attribute is readable and the config_item provides a
|
||||
ct_item_ops->show_attribute() method, that method will be called
|
||||
whenever userspace asks for a read(2) on the attribute. The converse
|
||||
will happen for write(2).
|
||||
If an attribute is readable and provides a ->show method, that method will
|
||||
be called whenever userspace asks for a read(2) on the attribute. If an
|
||||
attribute is writable and provides a ->store method, that method will be
|
||||
be called whenever userspace asks for a write(2) on the attribute.
|
||||
|
||||
[struct config_group]
|
||||
|
||||
|
|
@ -311,20 +305,10 @@ the subsystem must be ready for it.
|
|||
[An Example]
|
||||
|
||||
The best example of these basic concepts is the simple_children
|
||||
subsystem/group and the simple_child item in configfs_example_explicit.c
|
||||
and configfs_example_macros.c. It shows a trivial object displaying and
|
||||
storing an attribute, and a simple group creating and destroying these
|
||||
children.
|
||||
|
||||
The only difference between configfs_example_explicit.c and
|
||||
configfs_example_macros.c is how the attributes of the childless item
|
||||
are defined. The childless item has extended attributes, each with
|
||||
their own show()/store() operation. This follows a convention commonly
|
||||
used in sysfs. configfs_example_explicit.c creates these attributes
|
||||
by explicitly defining the structures involved. Conversely
|
||||
configfs_example_macros.c uses some convenience macros from configfs.h
|
||||
to define the attributes. These macros are similar to their sysfs
|
||||
counterparts.
|
||||
subsystem/group and the simple_child item in
|
||||
samples/configfs/configfs_sample.c. It shows a trivial object displaying
|
||||
and storing an attribute, and a simple group creating and destroying
|
||||
these children.
|
||||
|
||||
[Hierarchy Navigation and the Subsystem Mutex]
|
||||
|
||||
|
|
|
|||
|
|
@ -1,483 +0,0 @@
|
|||
/*
|
||||
* vim: noexpandtab ts=8 sts=0 sw=8:
|
||||
*
|
||||
* configfs_example_explicit.c - This file is a demonstration module
|
||||
* containing a number of configfs subsystems. It explicitly defines
|
||||
* each structure without using the helper macros defined in
|
||||
* configfs.h.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public
|
||||
* License as published by the Free Software Foundation; either
|
||||
* version 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this program; if not, write to the
|
||||
* Free Software Foundation, Inc., 59 Temple Place - Suite 330,
|
||||
* Boston, MA 021110-1307, USA.
|
||||
*
|
||||
* Based on sysfs:
|
||||
* sysfs is Copyright (C) 2001, 2002, 2003 Patrick Mochel
|
||||
*
|
||||
* configfs Copyright (C) 2005 Oracle. All rights reserved.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <linux/configfs.h>
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* 01-childless
|
||||
*
|
||||
* This first example is a childless subsystem. It cannot create
|
||||
* any config_items. It just has attributes.
|
||||
*
|
||||
* Note that we are enclosing the configfs_subsystem inside a container.
|
||||
* This is not necessary if a subsystem has no attributes directly
|
||||
* on the subsystem. See the next example, 02-simple-children, for
|
||||
* such a subsystem.
|
||||
*/
|
||||
|
||||
struct childless {
|
||||
struct configfs_subsystem subsys;
|
||||
int showme;
|
||||
int storeme;
|
||||
};
|
||||
|
||||
struct childless_attribute {
|
||||
struct configfs_attribute attr;
|
||||
ssize_t (*show)(struct childless *, char *);
|
||||
ssize_t (*store)(struct childless *, const char *, size_t);
|
||||
};
|
||||
|
||||
static inline struct childless *to_childless(struct config_item *item)
|
||||
{
|
||||
return item ? container_of(to_configfs_subsystem(to_config_group(item)), struct childless, subsys) : NULL;
|
||||
}
|
||||
|
||||
static ssize_t childless_showme_read(struct childless *childless,
|
||||
char *page)
|
||||
{
|
||||
ssize_t pos;
|
||||
|
||||
pos = sprintf(page, "%d\n", childless->showme);
|
||||
childless->showme++;
|
||||
|
||||
return pos;
|
||||
}
|
||||
|
||||
static ssize_t childless_storeme_read(struct childless *childless,
|
||||
char *page)
|
||||
{
|
||||
return sprintf(page, "%d\n", childless->storeme);
|
||||
}
|
||||
|
||||
static ssize_t childless_storeme_write(struct childless *childless,
|
||||
const char *page,
|
||||
size_t count)
|
||||
{
|
||||
unsigned long tmp;
|
||||
char *p = (char *) page;
|
||||
|
||||
tmp = simple_strtoul(p, &p, 10);
|
||||
if ((*p != '\0') && (*p != '\n'))
|
||||
return -EINVAL;
|
||||
|
||||
if (tmp > INT_MAX)
|
||||
return -ERANGE;
|
||||
|
||||
childless->storeme = tmp;
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static ssize_t childless_description_read(struct childless *childless,
|
||||
char *page)
|
||||
{
|
||||
return sprintf(page,
|
||||
"[01-childless]\n"
|
||||
"\n"
|
||||
"The childless subsystem is the simplest possible subsystem in\n"
|
||||
"configfs. It does not support the creation of child config_items.\n"
|
||||
"It only has a few attributes. In fact, it isn't much different\n"
|
||||
"than a directory in /proc.\n");
|
||||
}
|
||||
|
||||
static struct childless_attribute childless_attr_showme = {
|
||||
.attr = { .ca_owner = THIS_MODULE, .ca_name = "showme", .ca_mode = S_IRUGO },
|
||||
.show = childless_showme_read,
|
||||
};
|
||||
static struct childless_attribute childless_attr_storeme = {
|
||||
.attr = { .ca_owner = THIS_MODULE, .ca_name = "storeme", .ca_mode = S_IRUGO | S_IWUSR },
|
||||
.show = childless_storeme_read,
|
||||
.store = childless_storeme_write,
|
||||
};
|
||||
static struct childless_attribute childless_attr_description = {
|
||||
.attr = { .ca_owner = THIS_MODULE, .ca_name = "description", .ca_mode = S_IRUGO },
|
||||
.show = childless_description_read,
|
||||
};
|
||||
|
||||
static struct configfs_attribute *childless_attrs[] = {
|
||||
&childless_attr_showme.attr,
|
||||
&childless_attr_storeme.attr,
|
||||
&childless_attr_description.attr,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static ssize_t childless_attr_show(struct config_item *item,
|
||||
struct configfs_attribute *attr,
|
||||
char *page)
|
||||
{
|
||||
struct childless *childless = to_childless(item);
|
||||
struct childless_attribute *childless_attr =
|
||||
container_of(attr, struct childless_attribute, attr);
|
||||
ssize_t ret = 0;
|
||||
|
||||
if (childless_attr->show)
|
||||
ret = childless_attr->show(childless, page);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static ssize_t childless_attr_store(struct config_item *item,
|
||||
struct configfs_attribute *attr,
|
||||
const char *page, size_t count)
|
||||
{
|
||||
struct childless *childless = to_childless(item);
|
||||
struct childless_attribute *childless_attr =
|
||||
container_of(attr, struct childless_attribute, attr);
|
||||
ssize_t ret = -EINVAL;
|
||||
|
||||
if (childless_attr->store)
|
||||
ret = childless_attr->store(childless, page, count);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct configfs_item_operations childless_item_ops = {
|
||||
.show_attribute = childless_attr_show,
|
||||
.store_attribute = childless_attr_store,
|
||||
};
|
||||
|
||||
static struct config_item_type childless_type = {
|
||||
.ct_item_ops = &childless_item_ops,
|
||||
.ct_attrs = childless_attrs,
|
||||
.ct_owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
static struct childless childless_subsys = {
|
||||
.subsys = {
|
||||
.su_group = {
|
||||
.cg_item = {
|
||||
.ci_namebuf = "01-childless",
|
||||
.ci_type = &childless_type,
|
||||
},
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* 02-simple-children
|
||||
*
|
||||
* This example merely has a simple one-attribute child. Note that
|
||||
* there is no extra attribute structure, as the child's attribute is
|
||||
* known from the get-go. Also, there is no container for the
|
||||
* subsystem, as it has no attributes of its own.
|
||||
*/
|
||||
|
||||
struct simple_child {
|
||||
struct config_item item;
|
||||
int storeme;
|
||||
};
|
||||
|
||||
static inline struct simple_child *to_simple_child(struct config_item *item)
|
||||
{
|
||||
return item ? container_of(item, struct simple_child, item) : NULL;
|
||||
}
|
||||
|
||||
static struct configfs_attribute simple_child_attr_storeme = {
|
||||
.ca_owner = THIS_MODULE,
|
||||
.ca_name = "storeme",
|
||||
.ca_mode = S_IRUGO | S_IWUSR,
|
||||
};
|
||||
|
||||
static struct configfs_attribute *simple_child_attrs[] = {
|
||||
&simple_child_attr_storeme,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static ssize_t simple_child_attr_show(struct config_item *item,
|
||||
struct configfs_attribute *attr,
|
||||
char *page)
|
||||
{
|
||||
ssize_t count;
|
||||
struct simple_child *simple_child = to_simple_child(item);
|
||||
|
||||
count = sprintf(page, "%d\n", simple_child->storeme);
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static ssize_t simple_child_attr_store(struct config_item *item,
|
||||
struct configfs_attribute *attr,
|
||||
const char *page, size_t count)
|
||||
{
|
||||
struct simple_child *simple_child = to_simple_child(item);
|
||||
unsigned long tmp;
|
||||
char *p = (char *) page;
|
||||
|
||||
tmp = simple_strtoul(p, &p, 10);
|
||||
if (!p || (*p && (*p != '\n')))
|
||||
return -EINVAL;
|
||||
|
||||
if (tmp > INT_MAX)
|
||||
return -ERANGE;
|
||||
|
||||
simple_child->storeme = tmp;
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static void simple_child_release(struct config_item *item)
|
||||
{
|
||||
kfree(to_simple_child(item));
|
||||
}
|
||||
|
||||
static struct configfs_item_operations simple_child_item_ops = {
|
||||
.release = simple_child_release,
|
||||
.show_attribute = simple_child_attr_show,
|
||||
.store_attribute = simple_child_attr_store,
|
||||
};
|
||||
|
||||
static struct config_item_type simple_child_type = {
|
||||
.ct_item_ops = &simple_child_item_ops,
|
||||
.ct_attrs = simple_child_attrs,
|
||||
.ct_owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
|
||||
struct simple_children {
|
||||
struct config_group group;
|
||||
};
|
||||
|
||||
static inline struct simple_children *to_simple_children(struct config_item *item)
|
||||
{
|
||||
return item ? container_of(to_config_group(item), struct simple_children, group) : NULL;
|
||||
}
|
||||
|
||||
static struct config_item *simple_children_make_item(struct config_group *group, const char *name)
|
||||
{
|
||||
struct simple_child *simple_child;
|
||||
|
||||
simple_child = kzalloc(sizeof(struct simple_child), GFP_KERNEL);
|
||||
if (!simple_child)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
config_item_init_type_name(&simple_child->item, name,
|
||||
&simple_child_type);
|
||||
|
||||
simple_child->storeme = 0;
|
||||
|
||||
return &simple_child->item;
|
||||
}
|
||||
|
||||
static struct configfs_attribute simple_children_attr_description = {
|
||||
.ca_owner = THIS_MODULE,
|
||||
.ca_name = "description",
|
||||
.ca_mode = S_IRUGO,
|
||||
};
|
||||
|
||||
static struct configfs_attribute *simple_children_attrs[] = {
|
||||
&simple_children_attr_description,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static ssize_t simple_children_attr_show(struct config_item *item,
|
||||
struct configfs_attribute *attr,
|
||||
char *page)
|
||||
{
|
||||
return sprintf(page,
|
||||
"[02-simple-children]\n"
|
||||
"\n"
|
||||
"This subsystem allows the creation of child config_items. These\n"
|
||||
"items have only one attribute that is readable and writeable.\n");
|
||||
}
|
||||
|
||||
static void simple_children_release(struct config_item *item)
|
||||
{
|
||||
kfree(to_simple_children(item));
|
||||
}
|
||||
|
||||
static struct configfs_item_operations simple_children_item_ops = {
|
||||
.release = simple_children_release,
|
||||
.show_attribute = simple_children_attr_show,
|
||||
};
|
||||
|
||||
/*
|
||||
* Note that, since no extra work is required on ->drop_item(),
|
||||
* no ->drop_item() is provided.
|
||||
*/
|
||||
static struct configfs_group_operations simple_children_group_ops = {
|
||||
.make_item = simple_children_make_item,
|
||||
};
|
||||
|
||||
static struct config_item_type simple_children_type = {
|
||||
.ct_item_ops = &simple_children_item_ops,
|
||||
.ct_group_ops = &simple_children_group_ops,
|
||||
.ct_attrs = simple_children_attrs,
|
||||
.ct_owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
static struct configfs_subsystem simple_children_subsys = {
|
||||
.su_group = {
|
||||
.cg_item = {
|
||||
.ci_namebuf = "02-simple-children",
|
||||
.ci_type = &simple_children_type,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* 03-group-children
|
||||
*
|
||||
* This example reuses the simple_children group from above. However,
|
||||
* the simple_children group is not the subsystem itself, it is a
|
||||
* child of the subsystem. Creation of a group in the subsystem creates
|
||||
* a new simple_children group. That group can then have simple_child
|
||||
* children of its own.
|
||||
*/
|
||||
|
||||
static struct config_group *group_children_make_group(struct config_group *group, const char *name)
|
||||
{
|
||||
struct simple_children *simple_children;
|
||||
|
||||
simple_children = kzalloc(sizeof(struct simple_children),
|
||||
GFP_KERNEL);
|
||||
if (!simple_children)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
config_group_init_type_name(&simple_children->group, name,
|
||||
&simple_children_type);
|
||||
|
||||
return &simple_children->group;
|
||||
}
|
||||
|
||||
static struct configfs_attribute group_children_attr_description = {
|
||||
.ca_owner = THIS_MODULE,
|
||||
.ca_name = "description",
|
||||
.ca_mode = S_IRUGO,
|
||||
};
|
||||
|
||||
static struct configfs_attribute *group_children_attrs[] = {
|
||||
&group_children_attr_description,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static ssize_t group_children_attr_show(struct config_item *item,
|
||||
struct configfs_attribute *attr,
|
||||
char *page)
|
||||
{
|
||||
return sprintf(page,
|
||||
"[03-group-children]\n"
|
||||
"\n"
|
||||
"This subsystem allows the creation of child config_groups. These\n"
|
||||
"groups are like the subsystem simple-children.\n");
|
||||
}
|
||||
|
||||
static struct configfs_item_operations group_children_item_ops = {
|
||||
.show_attribute = group_children_attr_show,
|
||||
};
|
||||
|
||||
/*
|
||||
* Note that, since no extra work is required on ->drop_item(),
|
||||
* no ->drop_item() is provided.
|
||||
*/
|
||||
static struct configfs_group_operations group_children_group_ops = {
|
||||
.make_group = group_children_make_group,
|
||||
};
|
||||
|
||||
static struct config_item_type group_children_type = {
|
||||
.ct_item_ops = &group_children_item_ops,
|
||||
.ct_group_ops = &group_children_group_ops,
|
||||
.ct_attrs = group_children_attrs,
|
||||
.ct_owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
static struct configfs_subsystem group_children_subsys = {
|
||||
.su_group = {
|
||||
.cg_item = {
|
||||
.ci_namebuf = "03-group-children",
|
||||
.ci_type = &group_children_type,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/* ----------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* We're now done with our subsystem definitions.
|
||||
* For convenience in this module, here's a list of them all. It
|
||||
* allows the init function to easily register them. Most modules
|
||||
* will only have one subsystem, and will only call register_subsystem
|
||||
* on it directly.
|
||||
*/
|
||||
static struct configfs_subsystem *example_subsys[] = {
|
||||
&childless_subsys.subsys,
|
||||
&simple_children_subsys,
|
||||
&group_children_subsys,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static int __init configfs_example_init(void)
|
||||
{
|
||||
int ret;
|
||||
int i;
|
||||
struct configfs_subsystem *subsys;
|
||||
|
||||
for (i = 0; example_subsys[i]; i++) {
|
||||
subsys = example_subsys[i];
|
||||
|
||||
config_group_init(&subsys->su_group);
|
||||
mutex_init(&subsys->su_mutex);
|
||||
ret = configfs_register_subsystem(subsys);
|
||||
if (ret) {
|
||||
printk(KERN_ERR "Error %d while registering subsystem %s\n",
|
||||
ret,
|
||||
subsys->su_group.cg_item.ci_namebuf);
|
||||
goto out_unregister;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
out_unregister:
|
||||
for (i--; i >= 0; i--)
|
||||
configfs_unregister_subsystem(example_subsys[i]);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit configfs_example_exit(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; example_subsys[i]; i++)
|
||||
configfs_unregister_subsystem(example_subsys[i]);
|
||||
}
|
||||
|
||||
module_init(configfs_example_init);
|
||||
module_exit(configfs_example_exit);
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
@ -1,4 +1,5 @@
|
|||
Written by: Neil Brown <neilb@suse.de>
|
||||
Written by: Neil Brown
|
||||
Please see MAINTAINERS file for where to send questions.
|
||||
|
||||
Overlay Filesystem
|
||||
==================
|
||||
|
|
|
|||
|
|
@ -681,7 +681,7 @@ solution for a couple of reasons:
|
|||
addr.can_family = AF_CAN;
|
||||
addr.can_ifindex = ifr.ifr_ifindex;
|
||||
|
||||
connect(s, (struct sockaddr *)&addr, sizeof(addr))
|
||||
connect(s, (struct sockaddr *)&addr, sizeof(addr));
|
||||
|
||||
(..)
|
||||
|
||||
|
|
|
|||
|
|
@ -62,6 +62,12 @@ DAX: File system extensions to bypass the page cache and block layer to
|
|||
mmap persistent memory, from a PMEM block device, directly into a
|
||||
process address space.
|
||||
|
||||
DSM: Device Specific Method: ACPI method to to control specific
|
||||
device - in this case the firmware.
|
||||
|
||||
DCR: NVDIMM Control Region Structure defined in ACPI 6 Section 5.2.25.5.
|
||||
It defines a vendor-id, device-id, and interface format for a given DIMM.
|
||||
|
||||
BTT: Block Translation Table: Persistent memory is byte addressable.
|
||||
Existing software may have an expectation that the power-fail-atomicity
|
||||
of writes is at least one sector, 512 bytes. The BTT is an indirection
|
||||
|
|
@ -133,16 +139,16 @@ device driver:
|
|||
registered, can be immediately attached to nd_pmem.
|
||||
|
||||
2. BLK (nd_blk.ko): This driver performs I/O using a set of platform
|
||||
defined apertures. A set of apertures will all access just one DIMM.
|
||||
Multiple windows allow multiple concurrent accesses, much like
|
||||
defined apertures. A set of apertures will access just one DIMM.
|
||||
Multiple windows (apertures) allow multiple concurrent accesses, much like
|
||||
tagged-command-queuing, and would likely be used by different threads or
|
||||
different CPUs.
|
||||
|
||||
The NFIT specification defines a standard format for a BLK-aperture, but
|
||||
the spec also allows for vendor specific layouts, and non-NFIT BLK
|
||||
implementations may other designs for BLK I/O. For this reason "nd_blk"
|
||||
calls back into platform-specific code to perform the I/O. One such
|
||||
implementation is defined in the "Driver Writer's Guide" and "DSM
|
||||
implementations may have other designs for BLK I/O. For this reason
|
||||
"nd_blk" calls back into platform-specific code to perform the I/O.
|
||||
One such implementation is defined in the "Driver Writer's Guide" and "DSM
|
||||
Interface Example".
|
||||
|
||||
|
||||
|
|
@ -152,7 +158,7 @@ Why BLK?
|
|||
While PMEM provides direct byte-addressable CPU-load/store access to
|
||||
NVDIMM storage, it does not provide the best system RAS (recovery,
|
||||
availability, and serviceability) model. An access to a corrupted
|
||||
system-physical-address address causes a cpu exception while an access
|
||||
system-physical-address address causes a CPU exception while an access
|
||||
to a corrupted address through an BLK-aperture causes that block window
|
||||
to raise an error status in a register. The latter is more aligned with
|
||||
the standard error model that host-bus-adapter attached disks present.
|
||||
|
|
@ -162,7 +168,7 @@ data could be interleaved in an opaque hardware specific manner across
|
|||
several DIMMs.
|
||||
|
||||
PMEM vs BLK
|
||||
BLK-apertures solve this RAS problem, but their presence is also the
|
||||
BLK-apertures solve these RAS problems, but their presence is also the
|
||||
major contributing factor to the complexity of the ND subsystem. They
|
||||
complicate the implementation because PMEM and BLK alias in DPA space.
|
||||
Any given DIMM's DPA-range may contribute to one or more
|
||||
|
|
@ -220,8 +226,8 @@ socket. Each unique interface (BLK or PMEM) to DPA space is identified
|
|||
by a region device with a dynamically assigned id (REGION0 - REGION5).
|
||||
|
||||
1. The first portion of DIMM0 and DIMM1 are interleaved as REGION0. A
|
||||
single PMEM namespace is created in the REGION0-SPA-range that spans
|
||||
DIMM0 and DIMM1 with a user-specified name of "pm0.0". Some of that
|
||||
single PMEM namespace is created in the REGION0-SPA-range that spans most
|
||||
of DIMM0 and DIMM1 with a user-specified name of "pm0.0". Some of that
|
||||
interleaved system-physical-address range is reclaimed as BLK-aperture
|
||||
accessed space starting at DPA-offset (a) into each DIMM. In that
|
||||
reclaimed space we create two BLK-aperture "namespaces" from REGION2 and
|
||||
|
|
@ -230,13 +236,13 @@ by a region device with a dynamically assigned id (REGION0 - REGION5).
|
|||
|
||||
2. In the last portion of DIMM0 and DIMM1 we have an interleaved
|
||||
system-physical-address range, REGION1, that spans those two DIMMs as
|
||||
well as DIMM2 and DIMM3. Some of REGION1 allocated to a PMEM namespace
|
||||
named "pm1.0" the rest is reclaimed in 4 BLK-aperture namespaces (for
|
||||
well as DIMM2 and DIMM3. Some of REGION1 is allocated to a PMEM namespace
|
||||
named "pm1.0", the rest is reclaimed in 4 BLK-aperture namespaces (for
|
||||
each DIMM in the interleave set), "blk2.1", "blk3.1", "blk4.0", and
|
||||
"blk5.0".
|
||||
|
||||
3. The portion of DIMM2 and DIMM3 that do not participate in the REGION1
|
||||
interleaved system-physical-address range (i.e. the DPA address below
|
||||
interleaved system-physical-address range (i.e. the DPA address past
|
||||
offset (b) are also included in the "blk4.0" and "blk5.0" namespaces.
|
||||
Note, that this example shows that BLK-aperture namespaces don't need to
|
||||
be contiguous in DPA-space.
|
||||
|
|
@ -252,15 +258,15 @@ LIBNVDIMM Kernel Device Model and LIBNDCTL Userspace API
|
|||
|
||||
What follows is a description of the LIBNVDIMM sysfs layout and a
|
||||
corresponding object hierarchy diagram as viewed through the LIBNDCTL
|
||||
api. The example sysfs paths and diagrams are relative to the Example
|
||||
API. The example sysfs paths and diagrams are relative to the Example
|
||||
NVDIMM Platform which is also the LIBNVDIMM bus used in the LIBNDCTL unit
|
||||
test.
|
||||
|
||||
LIBNDCTL: Context
|
||||
Every api call in the LIBNDCTL library requires a context that holds the
|
||||
Every API call in the LIBNDCTL library requires a context that holds the
|
||||
logging parameters and other library instance state. The library is
|
||||
based on the libabc template:
|
||||
https://git.kernel.org/cgit/linux/kernel/git/kay/libabc.git/
|
||||
https://git.kernel.org/cgit/linux/kernel/git/kay/libabc.git
|
||||
|
||||
LIBNDCTL: instantiate a new library context example
|
||||
|
||||
|
|
@ -409,7 +415,7 @@ Bit 31:28 Reserved
|
|||
LIBNVDIMM/LIBNDCTL: Region
|
||||
----------------------
|
||||
|
||||
A generic REGION device is registered for each PMEM range orBLK-aperture
|
||||
A generic REGION device is registered for each PMEM range or BLK-aperture
|
||||
set. Per the example there are 6 regions: 2 PMEM and 4 BLK-aperture
|
||||
sets on the "nfit_test.0" bus. The primary role of regions are to be a
|
||||
container of "mappings". A mapping is a tuple of <DIMM,
|
||||
|
|
@ -509,7 +515,7 @@ At first glance it seems since NFIT defines just PMEM and BLK interface
|
|||
types that we should simply name REGION devices with something derived
|
||||
from those type names. However, the ND subsystem explicitly keeps the
|
||||
REGION name generic and expects userspace to always consider the
|
||||
region-attributes for 4 reasons:
|
||||
region-attributes for four reasons:
|
||||
|
||||
1. There are already more than two REGION and "namespace" types. For
|
||||
PMEM there are two subtypes. As mentioned previously we have PMEM where
|
||||
|
|
@ -698,8 +704,8 @@ static int configure_namespace(struct ndctl_region *region,
|
|||
|
||||
Why the Term "namespace"?
|
||||
|
||||
1. Why not "volume" for instance? "volume" ran the risk of confusing ND
|
||||
as a volume manager like device-mapper.
|
||||
1. Why not "volume" for instance? "volume" ran the risk of confusing
|
||||
ND (libnvdimm subsystem) to a volume manager like device-mapper.
|
||||
|
||||
2. The term originated to describe the sub-devices that can be created
|
||||
within a NVME controller (see the nvme specification:
|
||||
|
|
@ -774,13 +780,14 @@ block" needs to be destroyed. Note, that to destroy a BTT the media
|
|||
needs to be written in raw mode. By default, the kernel will autodetect
|
||||
the presence of a BTT and disable raw mode. This autodetect behavior
|
||||
can be suppressed by enabling raw mode for the namespace via the
|
||||
ndctl_namespace_set_raw_mode() api.
|
||||
ndctl_namespace_set_raw_mode() API.
|
||||
|
||||
|
||||
Summary LIBNDCTL Diagram
|
||||
------------------------
|
||||
|
||||
For the given example above, here is the view of the objects as seen by the LIBNDCTL api:
|
||||
For the given example above, here is the view of the objects as seen by the
|
||||
LIBNDCTL API:
|
||||
+---+
|
||||
|CTX| +---------+ +--------------+ +---------------+
|
||||
+-+-+ +-> REGION0 +---> NAMESPACE0.0 +--> PMEM8 "pm0.0" |
|
||||
|
|
|
|||
|
|
@ -569,7 +569,9 @@ Debugging code is now compiled in by default but debugging is turned off
|
|||
with the kernel module parameter debug_flag defaulting to 0. Debugging
|
||||
can still be switched on and off with an ioctl. To enable debug at
|
||||
module load time add debug_flag=1 to the module load options, the
|
||||
debugging output is not voluminous.
|
||||
debugging output is not voluminous. Debugging can also be enabled
|
||||
and disabled by writing a '0' (disable) or '1' (enable) to the sysfs
|
||||
file /sys/bus/scsi/drivers/st/debug_flag.
|
||||
|
||||
If the tape seems to hang, I would be very interested to hear where
|
||||
the driver is waiting. With the command 'ps -l' you can see the state
|
||||
|
|
|
|||
|
|
@ -203,8 +203,6 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):
|
|||
buf += "#include <scsi/scsi_proto.h>\n\n"
|
||||
buf += "#include <target/target_core_base.h>\n"
|
||||
buf += "#include <target/target_core_fabric.h>\n"
|
||||
buf += "#include <target/target_core_fabric_configfs.h>\n"
|
||||
buf += "#include <target/configfs_macros.h>\n\n"
|
||||
buf += "#include \"" + fabric_mod_name + "_base.h\"\n"
|
||||
buf += "#include \"" + fabric_mod_name + "_fabric.h\"\n\n"
|
||||
|
||||
|
|
@ -283,19 +281,6 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):
|
|||
buf += " struct " + fabric_mod_name + "_" + fabric_mod_port + ", " + fabric_mod_port + "_wwn);\n"
|
||||
buf += " kfree(" + fabric_mod_port + ");\n"
|
||||
buf += "}\n\n"
|
||||
buf += "static ssize_t " + fabric_mod_name + "_wwn_show_attr_version(\n"
|
||||
buf += " struct target_fabric_configfs *tf,\n"
|
||||
buf += " char *page)\n"
|
||||
buf += "{\n"
|
||||
buf += " return sprintf(page, \"" + fabric_mod_name.upper() + " fabric module %s on %s/%s\"\n"
|
||||
buf += " \"on \"UTS_RELEASE\"\\n\", " + fabric_mod_name.upper() + "_VERSION, utsname()->sysname,\n"
|
||||
buf += " utsname()->machine);\n"
|
||||
buf += "}\n\n"
|
||||
buf += "TF_WWN_ATTR_RO(" + fabric_mod_name + ", version);\n\n"
|
||||
buf += "static struct configfs_attribute *" + fabric_mod_name + "_wwn_attrs[] = {\n"
|
||||
buf += " &" + fabric_mod_name + "_wwn_version.attr,\n"
|
||||
buf += " NULL,\n"
|
||||
buf += "};\n\n"
|
||||
|
||||
buf += "static const struct target_core_fabric_ops " + fabric_mod_name + "_ops = {\n"
|
||||
buf += " .module = THIS_MODULE,\n"
|
||||
|
|
@ -328,8 +313,6 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):
|
|||
buf += " .fabric_drop_wwn = " + fabric_mod_name + "_drop_" + fabric_mod_port + ",\n"
|
||||
buf += " .fabric_make_tpg = " + fabric_mod_name + "_make_tpg,\n"
|
||||
buf += " .fabric_drop_tpg = " + fabric_mod_name + "_drop_tpg,\n"
|
||||
buf += "\n"
|
||||
buf += " .tfc_wwn_attrs = " + fabric_mod_name + "_wwn_attrs,\n"
|
||||
buf += "};\n\n"
|
||||
|
||||
buf += "static int __init " + fabric_mod_name + "_init(void)\n"
|
||||
|
|
|
|||
27
MAINTAINERS
27
MAINTAINERS
|
|
@ -2210,6 +2210,7 @@ F: drivers/leds/leds-blinkm.c
|
|||
|
||||
BLOCK LAYER
|
||||
M: Jens Axboe <axboe@kernel.dk>
|
||||
L: linux-block@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
|
||||
S: Maintained
|
||||
F: block/
|
||||
|
|
@ -2545,7 +2546,7 @@ F: arch/c6x/
|
|||
|
||||
CACHEFILES: FS-CACHE BACKEND FOR CACHING ON MOUNTED FILESYSTEMS
|
||||
M: David Howells <dhowells@redhat.com>
|
||||
L: linux-cachefs@redhat.com
|
||||
L: linux-cachefs@redhat.com (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: Documentation/filesystems/caching/cachefiles.txt
|
||||
F: fs/cachefiles/
|
||||
|
|
@ -4558,7 +4559,7 @@ F: include/linux/frontswap.h
|
|||
|
||||
FS-CACHE: LOCAL CACHING FOR NETWORK FILESYSTEMS
|
||||
M: David Howells <dhowells@redhat.com>
|
||||
L: linux-cachefs@redhat.com
|
||||
L: linux-cachefs@redhat.com (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: Documentation/filesystems/caching/
|
||||
F: fs/fscache/
|
||||
|
|
@ -5505,7 +5506,8 @@ S: Supported
|
|||
F: drivers/idle/intel_idle.c
|
||||
|
||||
INTEL PSTATE DRIVER
|
||||
M: Kristen Carlson Accardi <kristen@linux.intel.com>
|
||||
M: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
|
||||
M: Len Brown <lenb@kernel.org>
|
||||
L: linux-pm@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/cpufreq/intel_pstate.c
|
||||
|
|
@ -5709,13 +5711,6 @@ M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar>
|
|||
S: Maintained
|
||||
F: net/ipv4/netfilter/ipt_MASQUERADE.c
|
||||
|
||||
IP1000A 10/100/1000 GIGABIT ETHERNET DRIVER
|
||||
M: Francois Romieu <romieu@fr.zoreil.com>
|
||||
M: Sorbica Shieh <sorbica@icplus.com.tw>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/ethernet/icplus/ipg.*
|
||||
|
||||
IPATH DRIVER
|
||||
M: Mike Marciniszyn <infinipath@intel.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
|
|
@ -6921,13 +6916,21 @@ F: drivers/scsi/megaraid.*
|
|||
F: drivers/scsi/megaraid/
|
||||
|
||||
MELLANOX ETHERNET DRIVER (mlx4_en)
|
||||
M: Amir Vadai <amirv@mellanox.com>
|
||||
M: Eugenia Emantayev <eugenia@mellanox.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.mellanox.com
|
||||
Q: http://patchwork.ozlabs.org/project/netdev/list/
|
||||
F: drivers/net/ethernet/mellanox/mlx4/en_*
|
||||
|
||||
MELLANOX ETHERNET DRIVER (mlx5e)
|
||||
M: Saeed Mahameed <saeedm@mellanox.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.mellanox.com
|
||||
Q: http://patchwork.ozlabs.org/project/netdev/list/
|
||||
F: drivers/net/ethernet/mellanox/mlx5/core/en_*
|
||||
|
||||
MELLANOX ETHERNET SWITCH DRIVERS
|
||||
M: Jiri Pirko <jiri@mellanox.com>
|
||||
M: Ido Schimmel <idosch@mellanox.com>
|
||||
|
|
@ -10298,7 +10301,7 @@ F: include/net/switchdev.h
|
|||
|
||||
SYNOPSYS ARC ARCHITECTURE
|
||||
M: Vineet Gupta <vgupta@synopsys.com>
|
||||
L: linux-snps-arc@lists.infraded.org
|
||||
L: linux-snps-arc@lists.infradead.org
|
||||
S: Supported
|
||||
F: arch/arc/
|
||||
F: Documentation/devicetree/bindings/arc/*
|
||||
|
|
|
|||
4
Makefile
4
Makefile
|
|
@ -1,7 +1,7 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 3
|
||||
PATCHLEVEL = 4
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION =
|
||||
EXTRAVERSION = -rc1
|
||||
NAME = Blurry Fish Butt
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
|
|
@ -57,11 +57,7 @@ struct task_struct;
|
|||
* A lot of busy-wait loops in SMP are based off of non-volatile data otherwise
|
||||
* get optimised away by gcc
|
||||
*/
|
||||
#ifdef CONFIG_SMP
|
||||
#define cpu_relax() __asm__ __volatile__ ("" : : : "memory")
|
||||
#else
|
||||
#define cpu_relax() do { } while (0)
|
||||
#endif
|
||||
|
||||
#define cpu_relax_lowlatency() cpu_relax()
|
||||
|
||||
|
|
|
|||
|
|
@ -91,6 +91,25 @@ ENTRY(EV_DCError)
|
|||
flag 1
|
||||
END(EV_DCError)
|
||||
|
||||
; ---------------------------------------------
|
||||
; Memory Error Exception Handler
|
||||
; - Unlike ARCompact, handles Bus errors for both User/Kernel mode,
|
||||
; Instruction fetch or Data access, under a single Exception Vector
|
||||
; ---------------------------------------------
|
||||
|
||||
ENTRY(mem_service)
|
||||
|
||||
EXCEPTION_PROLOGUE
|
||||
|
||||
lr r0, [efa]
|
||||
mov r1, sp
|
||||
|
||||
FAKE_RET_FROM_EXCPN
|
||||
|
||||
bl do_memory_error
|
||||
b ret_from_exception
|
||||
END(mem_service)
|
||||
|
||||
ENTRY(EV_Misaligned)
|
||||
|
||||
EXCEPTION_PROLOGUE
|
||||
|
|
|
|||
|
|
@ -142,16 +142,12 @@ int1_saved_reg:
|
|||
.zero 4
|
||||
|
||||
/* Each Interrupt level needs its own scratch */
|
||||
#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
|
||||
|
||||
ARCFP_DATA int2_saved_reg
|
||||
.type int2_saved_reg, @object
|
||||
.size int2_saved_reg, 4
|
||||
int2_saved_reg:
|
||||
.zero 4
|
||||
|
||||
#endif
|
||||
|
||||
; ---------------------------------------------
|
||||
.section .text, "ax",@progbits
|
||||
|
||||
|
|
@ -215,6 +211,31 @@ END(handle_interrupt_level2)
|
|||
|
||||
#endif
|
||||
|
||||
; ---------------------------------------------
|
||||
; User Mode Memory Bus Error Interrupt Handler
|
||||
; (Kernel mode memory errors handled via seperate exception vectors)
|
||||
; ---------------------------------------------
|
||||
ENTRY(mem_service)
|
||||
|
||||
INTERRUPT_PROLOGUE 2
|
||||
|
||||
mov r0, ilink2
|
||||
mov r1, sp
|
||||
|
||||
; User process needs to be killed with SIGBUS, but first need to get
|
||||
; out of the L2 interrupt context (drop to pure kernel mode) and jump
|
||||
; off to "C" code where SIGBUS in enqueued
|
||||
lr r3, [status32]
|
||||
bclr r3, r3, STATUS_A2_BIT
|
||||
or r3, r3, (STATUS_E1_MASK|STATUS_E2_MASK)
|
||||
sr r3, [status32_l2]
|
||||
mov ilink2, 1f
|
||||
rtie
|
||||
1:
|
||||
bl do_memory_error
|
||||
b ret_from_exception
|
||||
END(mem_service)
|
||||
|
||||
; ---------------------------------------------
|
||||
; Level 1 ISR
|
||||
; ---------------------------------------------
|
||||
|
|
|
|||
|
|
@ -92,23 +92,6 @@ ENTRY(instr_service)
|
|||
b ret_from_exception
|
||||
END(instr_service)
|
||||
|
||||
; ---------------------------------------------
|
||||
; Memory Error Exception Handler
|
||||
; ---------------------------------------------
|
||||
|
||||
ENTRY(mem_service)
|
||||
|
||||
EXCEPTION_PROLOGUE
|
||||
|
||||
lr r0, [efa]
|
||||
mov r1, sp
|
||||
|
||||
FAKE_RET_FROM_EXCPN
|
||||
|
||||
bl do_memory_error
|
||||
b ret_from_exception
|
||||
END(mem_service)
|
||||
|
||||
; ---------------------------------------------
|
||||
; Machine Check Exception Handler
|
||||
; ---------------------------------------------
|
||||
|
|
|
|||
|
|
@ -50,26 +50,26 @@ ENTRY(memcpy)
|
|||
|
||||
;;; if size <= 8
|
||||
cmp r2, 8
|
||||
bls.d @smallchunk
|
||||
bls.d @.Lsmallchunk
|
||||
mov.f lp_count, r2
|
||||
|
||||
and.f r4, r0, 0x03
|
||||
rsub lp_count, r4, 4
|
||||
lpnz @aligndestination
|
||||
lpnz @.Laligndestination
|
||||
;; LOOP BEGIN
|
||||
ldb.ab r5, [r1,1]
|
||||
sub r2, r2, 1
|
||||
stb.ab r5, [r3,1]
|
||||
aligndestination:
|
||||
.Laligndestination:
|
||||
|
||||
;;; Check the alignment of the source
|
||||
and.f r4, r1, 0x03
|
||||
bnz.d @sourceunaligned
|
||||
bnz.d @.Lsourceunaligned
|
||||
|
||||
;;; CASE 0: Both source and destination are 32bit aligned
|
||||
;;; Convert len to Dwords, unfold x4
|
||||
lsr.f lp_count, r2, ZOLSHFT
|
||||
lpnz @copy32_64bytes
|
||||
lpnz @.Lcopy32_64bytes
|
||||
;; LOOP START
|
||||
LOADX (r6, r1)
|
||||
PREFETCH_READ (r1)
|
||||
|
|
@ -81,25 +81,25 @@ aligndestination:
|
|||
STOREX (r8, r3)
|
||||
STOREX (r10, r3)
|
||||
STOREX (r4, r3)
|
||||
copy32_64bytes:
|
||||
.Lcopy32_64bytes:
|
||||
|
||||
and.f lp_count, r2, ZOLAND ;Last remaining 31 bytes
|
||||
smallchunk:
|
||||
lpnz @copyremainingbytes
|
||||
.Lsmallchunk:
|
||||
lpnz @.Lcopyremainingbytes
|
||||
;; LOOP START
|
||||
ldb.ab r5, [r1,1]
|
||||
stb.ab r5, [r3,1]
|
||||
copyremainingbytes:
|
||||
.Lcopyremainingbytes:
|
||||
|
||||
j [blink]
|
||||
;;; END CASE 0
|
||||
|
||||
sourceunaligned:
|
||||
.Lsourceunaligned:
|
||||
cmp r4, 2
|
||||
beq.d @unalignedOffby2
|
||||
beq.d @.LunalignedOffby2
|
||||
sub r2, r2, 1
|
||||
|
||||
bhi.d @unalignedOffby3
|
||||
bhi.d @.LunalignedOffby3
|
||||
ldb.ab r5, [r1, 1]
|
||||
|
||||
;;; CASE 1: The source is unaligned, off by 1
|
||||
|
|
@ -114,7 +114,7 @@ sourceunaligned:
|
|||
or r5, r5, r6
|
||||
|
||||
;; Both src and dst are aligned
|
||||
lpnz @copy8bytes_1
|
||||
lpnz @.Lcopy8bytes_1
|
||||
;; LOOP START
|
||||
ld.ab r6, [r1, 4]
|
||||
prefetch [r1, 28] ;Prefetch the next read location
|
||||
|
|
@ -131,7 +131,7 @@ sourceunaligned:
|
|||
|
||||
st.ab r7, [r3, 4]
|
||||
st.ab r9, [r3, 4]
|
||||
copy8bytes_1:
|
||||
.Lcopy8bytes_1:
|
||||
|
||||
;; Write back the remaining 16bits
|
||||
EXTRACT_1 (r6, r5, 16)
|
||||
|
|
@ -141,14 +141,14 @@ copy8bytes_1:
|
|||
stb.ab r5, [r3, 1]
|
||||
|
||||
and.f lp_count, r2, 0x07 ;Last 8bytes
|
||||
lpnz @copybytewise_1
|
||||
lpnz @.Lcopybytewise_1
|
||||
;; LOOP START
|
||||
ldb.ab r6, [r1,1]
|
||||
stb.ab r6, [r3,1]
|
||||
copybytewise_1:
|
||||
.Lcopybytewise_1:
|
||||
j [blink]
|
||||
|
||||
unalignedOffby2:
|
||||
.LunalignedOffby2:
|
||||
;;; CASE 2: The source is unaligned, off by 2
|
||||
ldh.ab r5, [r1, 2]
|
||||
sub r2, r2, 1
|
||||
|
|
@ -159,7 +159,7 @@ unalignedOffby2:
|
|||
#ifdef __BIG_ENDIAN__
|
||||
asl.nz r5, r5, 16
|
||||
#endif
|
||||
lpnz @copy8bytes_2
|
||||
lpnz @.Lcopy8bytes_2
|
||||
;; LOOP START
|
||||
ld.ab r6, [r1, 4]
|
||||
prefetch [r1, 28] ;Prefetch the next read location
|
||||
|
|
@ -176,7 +176,7 @@ unalignedOffby2:
|
|||
|
||||
st.ab r7, [r3, 4]
|
||||
st.ab r9, [r3, 4]
|
||||
copy8bytes_2:
|
||||
.Lcopy8bytes_2:
|
||||
|
||||
#ifdef __BIG_ENDIAN__
|
||||
lsr.nz r5, r5, 16
|
||||
|
|
@ -184,14 +184,14 @@ copy8bytes_2:
|
|||
sth.ab r5, [r3, 2]
|
||||
|
||||
and.f lp_count, r2, 0x07 ;Last 8bytes
|
||||
lpnz @copybytewise_2
|
||||
lpnz @.Lcopybytewise_2
|
||||
;; LOOP START
|
||||
ldb.ab r6, [r1,1]
|
||||
stb.ab r6, [r3,1]
|
||||
copybytewise_2:
|
||||
.Lcopybytewise_2:
|
||||
j [blink]
|
||||
|
||||
unalignedOffby3:
|
||||
.LunalignedOffby3:
|
||||
;;; CASE 3: The source is unaligned, off by 3
|
||||
;;; Hence, I need to read 1byte for achieve the 32bit alignment
|
||||
|
||||
|
|
@ -201,7 +201,7 @@ unalignedOffby3:
|
|||
#ifdef __BIG_ENDIAN__
|
||||
asl.ne r5, r5, 24
|
||||
#endif
|
||||
lpnz @copy8bytes_3
|
||||
lpnz @.Lcopy8bytes_3
|
||||
;; LOOP START
|
||||
ld.ab r6, [r1, 4]
|
||||
prefetch [r1, 28] ;Prefetch the next read location
|
||||
|
|
@ -218,7 +218,7 @@ unalignedOffby3:
|
|||
|
||||
st.ab r7, [r3, 4]
|
||||
st.ab r9, [r3, 4]
|
||||
copy8bytes_3:
|
||||
.Lcopy8bytes_3:
|
||||
|
||||
#ifdef __BIG_ENDIAN__
|
||||
lsr.nz r5, r5, 24
|
||||
|
|
@ -226,11 +226,11 @@ copy8bytes_3:
|
|||
stb.ab r5, [r3, 1]
|
||||
|
||||
and.f lp_count, r2, 0x07 ;Last 8bytes
|
||||
lpnz @copybytewise_3
|
||||
lpnz @.Lcopybytewise_3
|
||||
;; LOOP START
|
||||
ldb.ab r6, [r1,1]
|
||||
stb.ab r6, [r3,1]
|
||||
copybytewise_3:
|
||||
.Lcopybytewise_3:
|
||||
j [blink]
|
||||
|
||||
END(memcpy)
|
||||
|
|
|
|||
|
|
@ -88,7 +88,7 @@ ex_saved_reg1:
|
|||
#ifdef CONFIG_SMP
|
||||
sr r0, [ARC_REG_SCRATCH_DATA0] ; freeup r0 to code with
|
||||
GET_CPU_ID r0 ; get to per cpu scratch mem,
|
||||
lsl r0, r0, L1_CACHE_SHIFT ; cache line wide per cpu
|
||||
asl r0, r0, L1_CACHE_SHIFT ; cache line wide per cpu
|
||||
add r0, @ex_saved_reg1, r0
|
||||
#else
|
||||
st r0, [@ex_saved_reg1]
|
||||
|
|
@ -107,7 +107,7 @@ ex_saved_reg1:
|
|||
.macro TLBMISS_RESTORE_REGS
|
||||
#ifdef CONFIG_SMP
|
||||
GET_CPU_ID r0 ; get to per cpu scratch mem
|
||||
lsl r0, r0, L1_CACHE_SHIFT ; each is cache line wide
|
||||
asl r0, r0, L1_CACHE_SHIFT ; each is cache line wide
|
||||
add r0, @ex_saved_reg1, r0
|
||||
ld_s r3, [r0,12]
|
||||
ld_s r2, [r0, 8]
|
||||
|
|
@ -256,7 +256,7 @@ ex_saved_reg1:
|
|||
|
||||
.macro CONV_PTE_TO_TLB
|
||||
and r3, r0, PTE_BITS_RWX ; r w x
|
||||
lsl r2, r3, 3 ; Kr Kw Kx 0 0 0 (GLOBAL, kernel only)
|
||||
asl r2, r3, 3 ; Kr Kw Kx 0 0 0 (GLOBAL, kernel only)
|
||||
and.f 0, r0, _PAGE_GLOBAL
|
||||
or.z r2, r2, r3 ; Kr Kw Kx Ur Uw Ux (!GLOBAL, user page)
|
||||
|
||||
|
|
|
|||
|
|
@ -10,7 +10,6 @@
|
|||
|
||||
#include <linux/init.h>
|
||||
#include <asm/mach_desc.h>
|
||||
#include <asm/mcip.h>
|
||||
|
||||
/*----------------------- Machine Descriptions ------------------------------
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1061,7 +1061,7 @@ void bpf_jit_compile(struct bpf_prog *fp)
|
|||
}
|
||||
build_epilogue(&ctx);
|
||||
|
||||
flush_icache_range((u32)ctx.target, (u32)(ctx.target + ctx.idx));
|
||||
flush_icache_range((u32)header, (u32)(ctx.target + ctx.idx));
|
||||
|
||||
#if __LINUX_ARM_ARCH__ < 7
|
||||
if (ctx.imm_count)
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@ config ARM64
|
|||
select CPU_PM if (SUSPEND || CPU_IDLE)
|
||||
select DCACHE_WORD_ACCESS
|
||||
select EDAC_SUPPORT
|
||||
select FRAME_POINTER
|
||||
select GENERIC_ALLOCATOR
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select GENERIC_CLOCKEVENTS_BROADCAST
|
||||
|
|
|
|||
|
|
@ -2,10 +2,6 @@ menu "Kernel hacking"
|
|||
|
||||
source "lib/Kconfig.debug"
|
||||
|
||||
config FRAME_POINTER
|
||||
bool
|
||||
default y
|
||||
|
||||
config ARM64_PTDUMP
|
||||
bool "Export kernel pagetable layout to userspace via debugfs"
|
||||
depends on DEBUG_KERNEL
|
||||
|
|
|
|||
|
|
@ -224,3 +224,4 @@ CONFIG_CRYPTO_GHASH_ARM64_CE=y
|
|||
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
|
||||
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
|
||||
CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
|
||||
CONFIG_CRYPTO_CRC32_ARM64=y
|
||||
|
|
|
|||
|
|
@ -233,7 +233,7 @@ __CMPXCHG_CASE( , , mb_8, dmb ish, , l, "memory")
|
|||
#undef __CMPXCHG_CASE
|
||||
|
||||
#define __CMPXCHG_DBL(name, mb, rel, cl) \
|
||||
__LL_SC_INLINE int \
|
||||
__LL_SC_INLINE long \
|
||||
__LL_SC_PREFIX(__cmpxchg_double##name(unsigned long old1, \
|
||||
unsigned long old2, \
|
||||
unsigned long new1, \
|
||||
|
|
|
|||
|
|
@ -387,7 +387,7 @@ __CMPXCHG_CASE(x, , mb_8, al, "memory")
|
|||
#define __LL_SC_CMPXCHG_DBL(op) __LL_SC_CALL(__cmpxchg_double##op)
|
||||
|
||||
#define __CMPXCHG_DBL(name, mb, cl...) \
|
||||
static inline int __cmpxchg_double##name(unsigned long old1, \
|
||||
static inline long __cmpxchg_double##name(unsigned long old1, \
|
||||
unsigned long old2, \
|
||||
unsigned long new1, \
|
||||
unsigned long new2, \
|
||||
|
|
|
|||
|
|
@ -80,6 +80,7 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
|
|||
#define _PAGE_DEFAULT (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))
|
||||
|
||||
#define PAGE_KERNEL __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE)
|
||||
#define PAGE_KERNEL_RO __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_RDONLY)
|
||||
#define PAGE_KERNEL_EXEC __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE)
|
||||
#define PAGE_KERNEL_EXEC_CONT __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_CONT)
|
||||
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@
|
|||
|
||||
#ifndef __ASSEMBLY__
|
||||
#include <linux/psci.h>
|
||||
#include <asm/types.h>
|
||||
#include <linux/types.h>
|
||||
#include <asm/ptrace.h>
|
||||
|
||||
#define __KVM_HAVE_GUEST_DEBUG
|
||||
|
|
|
|||
|
|
@ -696,7 +696,7 @@ static void cap_set_hwcap(const struct arm64_cpu_capabilities *cap)
|
|||
}
|
||||
|
||||
/* Check if we have a particular HWCAP enabled */
|
||||
static bool cpus_have_hwcap(const struct arm64_cpu_capabilities *cap)
|
||||
static bool __maybe_unused cpus_have_hwcap(const struct arm64_cpu_capabilities *cap)
|
||||
{
|
||||
bool rc;
|
||||
|
||||
|
|
|
|||
|
|
@ -473,7 +473,7 @@ acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
|
|||
* cpu logical map array containing MPIDR values related to logical
|
||||
* cpus. Assumes that cpu_logical_map(0) has already been initialized.
|
||||
*/
|
||||
void __init of_parse_and_init_cpus(void)
|
||||
static void __init of_parse_and_init_cpus(void)
|
||||
{
|
||||
struct device_node *dn = NULL;
|
||||
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@ void notrace __cpu_suspend_save(struct cpu_suspend_ctx *ptr,
|
|||
* time the notifier runs debug exceptions might have been enabled already,
|
||||
* with HW breakpoints registers content still in an unknown state.
|
||||
*/
|
||||
void (*hw_breakpoint_restore)(void *);
|
||||
static void (*hw_breakpoint_restore)(void *);
|
||||
void __init cpu_suspend_set_dbg_restorer(void (*hw_bp_restore)(void *))
|
||||
{
|
||||
/* Prevent multiple restore hook initializations */
|
||||
|
|
|
|||
|
|
@ -15,6 +15,9 @@ ccflags-y := -shared -fno-common -fno-builtin
|
|||
ccflags-y += -nostdlib -Wl,-soname=linux-vdso.so.1 \
|
||||
$(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
|
||||
|
||||
# Disable gcov profiling for VDSO code
|
||||
GCOV_PROFILE := n
|
||||
|
||||
# Workaround for bare-metal (ELF) toolchains that neglect to pass -shared
|
||||
# down to collect2, resulting in silent corruption of the vDSO image.
|
||||
ccflags-y += -Wl,-shared
|
||||
|
|
|
|||
|
|
@ -146,7 +146,7 @@ static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
|
|||
if (((addr | next | phys) & ~CONT_MASK) == 0) {
|
||||
/* a block of CONT_PTES */
|
||||
__populate_init_pte(pte, addr, next, phys,
|
||||
prot | __pgprot(PTE_CONT));
|
||||
__pgprot(pgprot_val(prot) | PTE_CONT));
|
||||
} else {
|
||||
/*
|
||||
* If the range being split is already inside of a
|
||||
|
|
@ -165,7 +165,7 @@ static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
|
|||
} while (addr != end);
|
||||
}
|
||||
|
||||
void split_pud(pud_t *old_pud, pmd_t *pmd)
|
||||
static void split_pud(pud_t *old_pud, pmd_t *pmd)
|
||||
{
|
||||
unsigned long addr = pud_pfn(*old_pud) << PAGE_SHIFT;
|
||||
pgprot_t prot = __pgprot(pud_val(*old_pud) ^ addr);
|
||||
|
|
@ -447,7 +447,7 @@ static void __init map_mem(void)
|
|||
memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE);
|
||||
}
|
||||
|
||||
void __init fixup_executable(void)
|
||||
static void __init fixup_executable(void)
|
||||
{
|
||||
#ifdef CONFIG_DEBUG_RODATA
|
||||
/* now that we are actually fully mapped, make the start/end more fine grained */
|
||||
|
|
@ -691,7 +691,7 @@ void __set_fixmap(enum fixed_addresses idx,
|
|||
void *__init fixmap_remap_fdt(phys_addr_t dt_phys)
|
||||
{
|
||||
const u64 dt_virt_base = __fix_to_virt(FIX_FDT);
|
||||
pgprot_t prot = PAGE_KERNEL | PTE_RDONLY;
|
||||
pgprot_t prot = PAGE_KERNEL_RO;
|
||||
int size, offset;
|
||||
void *dt_virt;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* BPF JIT compiler for ARM64
|
||||
*
|
||||
* Copyright (C) 2014 Zi Shen Lim <zlim.lnx@gmail.com>
|
||||
* Copyright (C) 2014-2015 Zi Shen Lim <zlim.lnx@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
|
|
@ -35,6 +35,7 @@
|
|||
aarch64_insn_gen_comp_branch_imm(0, offset, Rt, A64_VARIANT(sf), \
|
||||
AARCH64_INSN_BRANCH_COMP_##type)
|
||||
#define A64_CBZ(sf, Rt, imm19) A64_COMP_BRANCH(sf, Rt, (imm19) << 2, ZERO)
|
||||
#define A64_CBNZ(sf, Rt, imm19) A64_COMP_BRANCH(sf, Rt, (imm19) << 2, NONZERO)
|
||||
|
||||
/* Conditional branch (immediate) */
|
||||
#define A64_COND_BRANCH(cond, offset) \
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* BPF JIT compiler for ARM64
|
||||
*
|
||||
* Copyright (C) 2014 Zi Shen Lim <zlim.lnx@gmail.com>
|
||||
* Copyright (C) 2014-2015 Zi Shen Lim <zlim.lnx@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
|
|
@ -50,7 +50,7 @@ static const int bpf2a64[] = {
|
|||
[BPF_REG_8] = A64_R(21),
|
||||
[BPF_REG_9] = A64_R(22),
|
||||
/* read-only frame pointer to access stack */
|
||||
[BPF_REG_FP] = A64_FP,
|
||||
[BPF_REG_FP] = A64_R(25),
|
||||
/* temporary register for internal BPF JIT */
|
||||
[TMP_REG_1] = A64_R(23),
|
||||
[TMP_REG_2] = A64_R(24),
|
||||
|
|
@ -155,18 +155,49 @@ static void build_prologue(struct jit_ctx *ctx)
|
|||
stack_size += 4; /* extra for skb_copy_bits buffer */
|
||||
stack_size = STACK_ALIGN(stack_size);
|
||||
|
||||
/*
|
||||
* BPF prog stack layout
|
||||
*
|
||||
* high
|
||||
* original A64_SP => 0:+-----+ BPF prologue
|
||||
* |FP/LR|
|
||||
* current A64_FP => -16:+-----+
|
||||
* | ... | callee saved registers
|
||||
* +-----+
|
||||
* | | x25/x26
|
||||
* BPF fp register => -80:+-----+
|
||||
* | |
|
||||
* | ... | BPF prog stack
|
||||
* | |
|
||||
* | |
|
||||
* current A64_SP => +-----+
|
||||
* | |
|
||||
* | ... | Function call stack
|
||||
* | |
|
||||
* +-----+
|
||||
* low
|
||||
*
|
||||
*/
|
||||
|
||||
/* Save FP and LR registers to stay align with ARM64 AAPCS */
|
||||
emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx);
|
||||
emit(A64_MOV(1, A64_FP, A64_SP), ctx);
|
||||
|
||||
/* Save callee-saved register */
|
||||
emit(A64_PUSH(r6, r7, A64_SP), ctx);
|
||||
emit(A64_PUSH(r8, r9, A64_SP), ctx);
|
||||
if (ctx->tmp_used)
|
||||
emit(A64_PUSH(tmp1, tmp2, A64_SP), ctx);
|
||||
|
||||
/* Set up BPF stack */
|
||||
emit(A64_SUB_I(1, A64_SP, A64_SP, stack_size), ctx);
|
||||
/* Save fp (x25) and x26. SP requires 16 bytes alignment */
|
||||
emit(A64_PUSH(fp, A64_R(26), A64_SP), ctx);
|
||||
|
||||
/* Set up frame pointer */
|
||||
/* Set up BPF prog stack base register (x25) */
|
||||
emit(A64_MOV(1, fp, A64_SP), ctx);
|
||||
|
||||
/* Set up function call stack */
|
||||
emit(A64_SUB_I(1, A64_SP, A64_SP, stack_size), ctx);
|
||||
|
||||
/* Clear registers A and X */
|
||||
emit_a64_mov_i64(ra, 0, ctx);
|
||||
emit_a64_mov_i64(rx, 0, ctx);
|
||||
|
|
@ -190,14 +221,17 @@ static void build_epilogue(struct jit_ctx *ctx)
|
|||
/* We're done with BPF stack */
|
||||
emit(A64_ADD_I(1, A64_SP, A64_SP, stack_size), ctx);
|
||||
|
||||
/* Restore fs (x25) and x26 */
|
||||
emit(A64_POP(fp, A64_R(26), A64_SP), ctx);
|
||||
|
||||
/* Restore callee-saved register */
|
||||
if (ctx->tmp_used)
|
||||
emit(A64_POP(tmp1, tmp2, A64_SP), ctx);
|
||||
emit(A64_POP(r8, r9, A64_SP), ctx);
|
||||
emit(A64_POP(r6, r7, A64_SP), ctx);
|
||||
|
||||
/* Restore frame pointer */
|
||||
emit(A64_MOV(1, fp, A64_SP), ctx);
|
||||
/* Restore FP/LR registers */
|
||||
emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
|
||||
|
||||
/* Set return value */
|
||||
emit(A64_MOV(1, A64_R(0), r0), ctx);
|
||||
|
|
@ -225,6 +259,17 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
|
|||
u8 jmp_cond;
|
||||
s32 jmp_offset;
|
||||
|
||||
#define check_imm(bits, imm) do { \
|
||||
if ((((imm) > 0) && ((imm) >> (bits))) || \
|
||||
(((imm) < 0) && (~(imm) >> (bits)))) { \
|
||||
pr_info("[%2d] imm=%d(0x%x) out of range\n", \
|
||||
i, imm, imm); \
|
||||
return -EINVAL; \
|
||||
} \
|
||||
} while (0)
|
||||
#define check_imm19(imm) check_imm(19, imm)
|
||||
#define check_imm26(imm) check_imm(26, imm)
|
||||
|
||||
switch (code) {
|
||||
/* dst = src */
|
||||
case BPF_ALU | BPF_MOV | BPF_X:
|
||||
|
|
@ -258,15 +303,33 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
|
|||
break;
|
||||
case BPF_ALU | BPF_DIV | BPF_X:
|
||||
case BPF_ALU64 | BPF_DIV | BPF_X:
|
||||
emit(A64_UDIV(is64, dst, dst, src), ctx);
|
||||
break;
|
||||
case BPF_ALU | BPF_MOD | BPF_X:
|
||||
case BPF_ALU64 | BPF_MOD | BPF_X:
|
||||
ctx->tmp_used = 1;
|
||||
emit(A64_UDIV(is64, tmp, dst, src), ctx);
|
||||
emit(A64_MUL(is64, tmp, tmp, src), ctx);
|
||||
emit(A64_SUB(is64, dst, dst, tmp), ctx);
|
||||
{
|
||||
const u8 r0 = bpf2a64[BPF_REG_0];
|
||||
|
||||
/* if (src == 0) return 0 */
|
||||
jmp_offset = 3; /* skip ahead to else path */
|
||||
check_imm19(jmp_offset);
|
||||
emit(A64_CBNZ(is64, src, jmp_offset), ctx);
|
||||
emit(A64_MOVZ(1, r0, 0, 0), ctx);
|
||||
jmp_offset = epilogue_offset(ctx);
|
||||
check_imm26(jmp_offset);
|
||||
emit(A64_B(jmp_offset), ctx);
|
||||
/* else */
|
||||
switch (BPF_OP(code)) {
|
||||
case BPF_DIV:
|
||||
emit(A64_UDIV(is64, dst, dst, src), ctx);
|
||||
break;
|
||||
case BPF_MOD:
|
||||
ctx->tmp_used = 1;
|
||||
emit(A64_UDIV(is64, tmp, dst, src), ctx);
|
||||
emit(A64_MUL(is64, tmp, tmp, src), ctx);
|
||||
emit(A64_SUB(is64, dst, dst, tmp), ctx);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
case BPF_ALU | BPF_LSH | BPF_X:
|
||||
case BPF_ALU64 | BPF_LSH | BPF_X:
|
||||
emit(A64_LSLV(is64, dst, dst, src), ctx);
|
||||
|
|
@ -393,17 +456,6 @@ emit_bswap_uxt:
|
|||
emit(A64_ASR(is64, dst, dst, imm), ctx);
|
||||
break;
|
||||
|
||||
#define check_imm(bits, imm) do { \
|
||||
if ((((imm) > 0) && ((imm) >> (bits))) || \
|
||||
(((imm) < 0) && (~(imm) >> (bits)))) { \
|
||||
pr_info("[%2d] imm=%d(0x%x) out of range\n", \
|
||||
i, imm, imm); \
|
||||
return -EINVAL; \
|
||||
} \
|
||||
} while (0)
|
||||
#define check_imm19(imm) check_imm(19, imm)
|
||||
#define check_imm26(imm) check_imm(26, imm)
|
||||
|
||||
/* JUMP off */
|
||||
case BPF_JMP | BPF_JA:
|
||||
jmp_offset = bpf2a64_offset(i + off, i, ctx);
|
||||
|
|
@ -740,7 +792,7 @@ void bpf_int_jit_compile(struct bpf_prog *prog)
|
|||
if (bpf_jit_enable > 1)
|
||||
bpf_jit_dump(prog->len, image_size, 2, ctx.image);
|
||||
|
||||
bpf_flush_icache(ctx.image, ctx.image + ctx.idx);
|
||||
bpf_flush_icache(header, ctx.image + ctx.idx);
|
||||
|
||||
set_memory_ro((unsigned long)header, header->pages);
|
||||
prog->bpf_func = (void *)ctx.image;
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@ config H8300
|
|||
select OF_EARLY_FLATTREE
|
||||
select HAVE_MEMBLOCK
|
||||
select HAVE_DMA_ATTRS
|
||||
select CLKSRC_OF
|
||||
|
||||
config RWSEM_GENERIC_SPINLOCK
|
||||
def_bool y
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ KBUILD_CFLAGS += -DUTS_SYSNAME=\"uClinux\"
|
|||
KBUILD_AFLAGS += $(aflags-y)
|
||||
LDFLAGS += $(ldflags-y)
|
||||
|
||||
ifeq ($(CROSS_COMPILE),)
|
||||
CROSS_COMPILE := h8300-unknown-linux-
|
||||
endif
|
||||
|
||||
core-y += arch/$(ARCH)/kernel/ arch/$(ARCH)/mm/
|
||||
ifneq '$(CONFIG_H8300_BUILTIN_DTB)' '""'
|
||||
|
|
|
|||
|
|
@ -14,11 +14,12 @@ OBJECTS = $(obj)/head.o $(obj)/misc.o
|
|||
# in order to suppress error message.
|
||||
#
|
||||
CONFIG_MEMORY_START ?= 0x00400000
|
||||
CONFIG_BOOT_LINK_OFFSET ?= 0x00140000
|
||||
CONFIG_BOOT_LINK_OFFSET ?= 0x00280000
|
||||
IMAGE_OFFSET := $(shell printf "0x%08x" $$(($(CONFIG_MEMORY_START)+$(CONFIG_BOOT_LINK_OFFSET))))
|
||||
|
||||
LIBGCC := $(shell $(CROSS-COMPILE)$(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
|
||||
LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -estartup $(obj)/vmlinux.lds
|
||||
LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -estartup -T $(obj)/vmlinux.lds \
|
||||
--defsym output=$(CONFIG_MEMORY_START)
|
||||
|
||||
$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE
|
||||
$(call if_changed,ld)
|
||||
|
|
|
|||
|
|
@ -9,8 +9,8 @@
|
|||
.section .text..startup,"ax"
|
||||
.global startup
|
||||
startup:
|
||||
mov.l #startup, sp
|
||||
mov.l er0, er4
|
||||
mov.l er0, sp
|
||||
mov.l #__sbss, er0
|
||||
mov.l #__ebss, er1
|
||||
sub.l er0, er1
|
||||
|
|
@ -24,7 +24,7 @@ startup:
|
|||
bne 1b
|
||||
jsr @decompress_kernel
|
||||
mov.l er4, er0
|
||||
jmp @0x400000
|
||||
jmp @output
|
||||
|
||||
.align 9
|
||||
fake_headers_as_bzImage:
|
||||
|
|
|
|||
|
|
@ -28,7 +28,7 @@ static unsigned long free_mem_end_ptr;
|
|||
|
||||
extern char input_data[];
|
||||
extern int input_len;
|
||||
static unsigned char *output;
|
||||
extern char output[];
|
||||
|
||||
#define HEAP_SIZE 0x10000
|
||||
|
||||
|
|
@ -56,15 +56,10 @@ void *memcpy(void *dest, const void *src, size_t n)
|
|||
|
||||
static void error(char *x)
|
||||
{
|
||||
|
||||
while (1)
|
||||
; /* Halt */
|
||||
}
|
||||
|
||||
#define STACK_SIZE (4096)
|
||||
long user_stack[STACK_SIZE];
|
||||
long *stack_start = &user_stack[STACK_SIZE];
|
||||
|
||||
void decompress_kernel(void)
|
||||
{
|
||||
free_mem_ptr = (unsigned long)&_end;
|
||||
|
|
|
|||
|
|
@ -27,6 +27,6 @@ SECTIONS
|
|||
*(.bss*)
|
||||
. = ALIGN(0x4) ;
|
||||
__ebss = . ;
|
||||
__end = . ;
|
||||
}
|
||||
_end = . ;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
|
||||
chosen {
|
||||
bootargs = "console=ttySC2,38400";
|
||||
stdout-path = <&sci2>;
|
||||
stdout-path = &sci2;
|
||||
};
|
||||
aliases {
|
||||
serial0 = &sci0;
|
||||
|
|
@ -25,13 +25,13 @@
|
|||
compatible = "renesas,h8s2678-pll-clock";
|
||||
clocks = <&xclk>;
|
||||
#clock-cells = <0>;
|
||||
reg = <0xfee03b 2>, <0xfee045 2>;
|
||||
reg = <0xffff3b 1>, <0xffff45 1>;
|
||||
};
|
||||
core_clk: core_clk {
|
||||
compatible = "renesas,h8300-div-clock";
|
||||
clocks = <&pllclk>;
|
||||
#clock-cells = <0>;
|
||||
reg = <0xfee03b 2>;
|
||||
reg = <0xffff3b 1>;
|
||||
renesas,width = <3>;
|
||||
};
|
||||
fclk: fclk {
|
||||
|
|
|
|||
|
|
@ -36,20 +36,20 @@ static inline void ctrl_outl(unsigned long b, unsigned long addr)
|
|||
*(volatile unsigned long *)addr = b;
|
||||
}
|
||||
|
||||
static inline void ctrl_bclr(int b, unsigned long addr)
|
||||
static inline void ctrl_bclr(int b, unsigned char *addr)
|
||||
{
|
||||
if (__builtin_constant_p(b))
|
||||
__asm__("bclr %1,%0" : : "WU"(addr), "i"(b));
|
||||
__asm__("bclr %1,%0" : "+WU"(*addr): "i"(b));
|
||||
else
|
||||
__asm__("bclr %w1,%0" : : "WU"(addr), "r"(b));
|
||||
__asm__("bclr %w1,%0" : "+WU"(*addr): "r"(b));
|
||||
}
|
||||
|
||||
static inline void ctrl_bset(int b, unsigned long addr)
|
||||
static inline void ctrl_bset(int b, unsigned char *addr)
|
||||
{
|
||||
if (__builtin_constant_p(b))
|
||||
__asm__("bset %1,%0" : : "WU"(addr), "i"(b));
|
||||
__asm__("bset %1,%0" : "+WU"(*addr): "i"(b));
|
||||
else
|
||||
__asm__("bset %w1,%0" : : "WU"(addr), "r"(b));
|
||||
__asm__("bset %w1,%0" : "+WU"(*addr): "r"(b));
|
||||
}
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
|
|
|||
|
|
@ -13,6 +13,12 @@
|
|||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
/*
|
||||
* Size of kernel stack for each process. This must be a power of 2...
|
||||
*/
|
||||
#define THREAD_SIZE_ORDER 1
|
||||
#define THREAD_SIZE 8192 /* 2 pages */
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/*
|
||||
|
|
@ -46,14 +52,6 @@ struct thread_info {
|
|||
#define init_thread_info (init_thread_union.thread_info)
|
||||
#define init_stack (init_thread_union.stack)
|
||||
|
||||
|
||||
/*
|
||||
* Size of kernel stack for each process. This must be a power of 2...
|
||||
*/
|
||||
#define THREAD_SIZE_ORDER 1
|
||||
#define THREAD_SIZE 8192 /* 2 pages */
|
||||
|
||||
|
||||
/* how to get the thread information struct from C */
|
||||
static inline struct thread_info *current_thread_info(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -29,6 +29,7 @@
|
|||
#include <linux/clk-provider.h>
|
||||
#include <linux/memblock.h>
|
||||
#include <linux/screen_info.h>
|
||||
#include <linux/clocksource.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/irq.h>
|
||||
|
|
@ -252,4 +253,5 @@ void __init calibrate_delay(void)
|
|||
void __init time_init(void)
|
||||
{
|
||||
of_clk_init(NULL);
|
||||
clocksource_probe();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
#include <asm-generic/vmlinux.lds.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/thread_info.h>
|
||||
|
||||
#define ROMTOP 0x000000
|
||||
#define RAMTOP 0x400000
|
||||
|
|
@ -42,11 +43,10 @@ SECTIONS
|
|||
. = RAMTOP;
|
||||
_ramstart = .;
|
||||
#define ADDR(x) ROMEND
|
||||
#else
|
||||
#endif
|
||||
_sdata = . ;
|
||||
__data_start = . ;
|
||||
RW_DATA_SECTION(0,0,0)
|
||||
RW_DATA_SECTION(0, PAGE_SIZE, THREAD_SIZE)
|
||||
#if defined(CONFIG_ROMKERNEL)
|
||||
#undef ADDR
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@ obj- := $(platform-)
|
|||
obj-y += kernel/
|
||||
obj-y += mm/
|
||||
obj-y += net/
|
||||
obj-y += vdso/
|
||||
|
||||
ifdef CONFIG_KVM
|
||||
obj-y += kvm/
|
||||
|
|
|
|||
|
|
@ -33,6 +33,7 @@ platforms += sibyte
|
|||
platforms += sni
|
||||
platforms += txx9
|
||||
platforms += vr41xx
|
||||
platforms += xilfpga
|
||||
|
||||
# include the platform specific files
|
||||
include $(patsubst %, $(srctree)/arch/mips/%/Platform, $(platforms))
|
||||
|
|
|
|||
|
|
@ -5,6 +5,7 @@ config MIPS
|
|||
select ARCH_MIGHT_HAVE_PC_PARPORT
|
||||
select ARCH_MIGHT_HAVE_PC_SERIO
|
||||
select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
|
||||
select ARCH_USE_BUILTIN_BSWAP
|
||||
select HAVE_CONTEXT_TRACKING
|
||||
select HAVE_GENERIC_DMA_COHERENT
|
||||
select HAVE_IDE
|
||||
|
|
@ -60,6 +61,8 @@ config MIPS
|
|||
select SYSCTL_EXCEPTION_TRACE
|
||||
select HAVE_VIRT_CPU_ACCOUNTING_GEN
|
||||
select HAVE_IRQ_TIME_ACCOUNTING
|
||||
select GENERIC_TIME_VSYSCALL
|
||||
select ARCH_CLOCKSOURCE_DATA
|
||||
|
||||
menu "Machine selection"
|
||||
|
||||
|
|
@ -401,6 +404,28 @@ config MACH_PISTACHIO
|
|||
help
|
||||
This enables support for the IMG Pistachio SoC platform.
|
||||
|
||||
config MACH_XILFPGA
|
||||
bool "MIPSfpga Xilinx based boards"
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select BOOT_ELF32
|
||||
select BOOT_RAW
|
||||
select BUILTIN_DTB
|
||||
select CEVT_R4K
|
||||
select COMMON_CLK
|
||||
select CSRC_R4K
|
||||
select IRQ_MIPS_CPU
|
||||
select LIBFDT
|
||||
select MIPS_CPU_SCACHE
|
||||
select SYS_HAS_EARLY_PRINTK
|
||||
select SYS_HAS_CPU_MIPS32_R2
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
select SYS_SUPPORTS_ZBOOT_UART16550
|
||||
select USE_OF
|
||||
select USE_GENERIC_EARLY_PRINTK_8250
|
||||
help
|
||||
This enables support for the IMG University Program MIPSfpga platform.
|
||||
|
||||
config MIPS_MALTA
|
||||
bool "MIPS Malta board"
|
||||
select ARCH_MAY_HAVE_PC_FDC
|
||||
|
|
@ -424,6 +449,7 @@ config MIPS_MALTA
|
|||
select MIPS_L1_CACHE_SHIFT_6
|
||||
select PCI_GT64XXX_PCI0
|
||||
select MIPS_MSC
|
||||
select SMP_UP if SMP
|
||||
select SWAP_IO_SPACE
|
||||
select SYS_HAS_CPU_MIPS32_R1
|
||||
select SYS_HAS_CPU_MIPS32_R2
|
||||
|
|
@ -449,6 +475,8 @@ config MIPS_MALTA
|
|||
select SYS_SUPPORTS_ZBOOT
|
||||
select USE_OF
|
||||
select ZONE_DMA32 if 64BIT
|
||||
select BUILTIN_DTB
|
||||
select LIBFDT
|
||||
help
|
||||
This enables support for the MIPS Technologies Malta evaluation
|
||||
board.
|
||||
|
|
@ -964,6 +992,7 @@ source "arch/mips/loongson32/Kconfig"
|
|||
source "arch/mips/loongson64/Kconfig"
|
||||
source "arch/mips/netlogic/Kconfig"
|
||||
source "arch/mips/paravirt/Kconfig"
|
||||
source "arch/mips/xilfpga/Kconfig"
|
||||
|
||||
endmenu
|
||||
|
||||
|
|
@ -1036,6 +1065,9 @@ config CSRC_R4K
|
|||
config CSRC_SB1250
|
||||
bool
|
||||
|
||||
config MIPS_CLOCK_VSYSCALL
|
||||
def_bool CSRC_R4K || CLKSRC_MIPS_GIC
|
||||
|
||||
config GPIO_TXX9
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
bool
|
||||
|
|
@ -2529,6 +2561,9 @@ choice
|
|||
help
|
||||
Allows the configuration of the timer frequency.
|
||||
|
||||
config HZ_24
|
||||
bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
|
||||
|
||||
config HZ_48
|
||||
bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
|
||||
|
||||
|
|
@ -2552,6 +2587,9 @@ choice
|
|||
|
||||
endchoice
|
||||
|
||||
config SYS_SUPPORTS_24HZ
|
||||
bool
|
||||
|
||||
config SYS_SUPPORTS_48HZ
|
||||
bool
|
||||
|
||||
|
|
@ -2575,13 +2613,18 @@ config SYS_SUPPORTS_1024HZ
|
|||
|
||||
config SYS_SUPPORTS_ARBIT_HZ
|
||||
bool
|
||||
default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
|
||||
!SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
|
||||
!SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
|
||||
default y if !SYS_SUPPORTS_24HZ && \
|
||||
!SYS_SUPPORTS_48HZ && \
|
||||
!SYS_SUPPORTS_100HZ && \
|
||||
!SYS_SUPPORTS_128HZ && \
|
||||
!SYS_SUPPORTS_250HZ && \
|
||||
!SYS_SUPPORTS_256HZ && \
|
||||
!SYS_SUPPORTS_1000HZ && \
|
||||
!SYS_SUPPORTS_1024HZ
|
||||
|
||||
config HZ
|
||||
int
|
||||
default 24 if HZ_24
|
||||
default 48 if HZ_48
|
||||
default 100 if HZ_100
|
||||
default 128 if HZ_128
|
||||
|
|
@ -2685,7 +2728,7 @@ config BUILTIN_DTB
|
|||
bool
|
||||
|
||||
choice
|
||||
prompt "Kernel appended dtb support" if OF
|
||||
prompt "Kernel appended dtb support" if USE_OF
|
||||
default MIPS_NO_APPENDED_DTB
|
||||
|
||||
config MIPS_NO_APPENDED_DTB
|
||||
|
|
@ -2693,6 +2736,20 @@ choice
|
|||
help
|
||||
Do not enable appended dtb support.
|
||||
|
||||
config MIPS_ELF_APPENDED_DTB
|
||||
bool "vmlinux"
|
||||
help
|
||||
With this option, the boot code will look for a device tree binary
|
||||
DTB) included in the vmlinux ELF section .appended_dtb. By default
|
||||
it is empty and the DTB can be appended using binutils command
|
||||
objcopy:
|
||||
|
||||
objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
|
||||
|
||||
This is meant as a backward compatiblity convenience for those
|
||||
systems with a bootloader that can't be upgraded to accommodate
|
||||
the documented boot protocol using a device tree.
|
||||
|
||||
config MIPS_RAW_APPENDED_DTB
|
||||
bool "vmlinux.bin"
|
||||
help
|
||||
|
|
@ -2729,6 +2786,25 @@ choice
|
|||
if you don't intend to always append a DTB.
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "Kernel command line type" if !CMDLINE_OVERRIDE
|
||||
default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
|
||||
!MIPS_MALTA && !MIPS_SEAD3 && \
|
||||
!CAVIUM_OCTEON_SOC
|
||||
default MIPS_CMDLINE_FROM_BOOTLOADER
|
||||
|
||||
config MIPS_CMDLINE_FROM_DTB
|
||||
depends on USE_OF
|
||||
bool "Dtb kernel arguments if available"
|
||||
|
||||
config MIPS_CMDLINE_DTB_EXTEND
|
||||
depends on USE_OF
|
||||
bool "Extend dtb kernel arguments with bootloader arguments"
|
||||
|
||||
config MIPS_CMDLINE_FROM_BOOTLOADER
|
||||
bool "Bootloader kernel arguments if available"
|
||||
endchoice
|
||||
|
||||
endmenu
|
||||
|
||||
config LOCKDEP_SUPPORT
|
||||
|
|
@ -2739,6 +2815,10 @@ config STACKTRACE_SUPPORT
|
|||
bool
|
||||
default y
|
||||
|
||||
config HAVE_LATENCYTOP_SUPPORT
|
||||
bool
|
||||
default y
|
||||
|
||||
config PGTABLE_LEVELS
|
||||
int
|
||||
default 3 if 64BIT && !PAGE_SIZE_64KB
|
||||
|
|
|
|||
|
|
@ -113,4 +113,76 @@ config SPINLOCK_TEST
|
|||
help
|
||||
Add several files to the debugfs to test spinlock speed.
|
||||
|
||||
if CPU_MIPSR6
|
||||
|
||||
choice
|
||||
prompt "Compact branch policy"
|
||||
default MIPS_COMPACT_BRANCHES_OPTIMAL
|
||||
|
||||
config MIPS_COMPACT_BRANCHES_NEVER
|
||||
bool "Never (force delay slot branches)"
|
||||
help
|
||||
Pass the -mcompact-branches=never flag to the compiler in order to
|
||||
force it to always emit branches with delay slots, and make no use
|
||||
of the compact branch instructions introduced by MIPSr6. This is
|
||||
useful if you suspect there may be an issue with compact branches in
|
||||
either the compiler or the CPU.
|
||||
|
||||
config MIPS_COMPACT_BRANCHES_OPTIMAL
|
||||
bool "Optimal (use where beneficial)"
|
||||
help
|
||||
Pass the -mcompact-branches=optimal flag to the compiler in order for
|
||||
it to make use of compact branch instructions where it deems them
|
||||
beneficial, and use branches with delay slots elsewhere. This is the
|
||||
default compiler behaviour, and should be used unless you have a
|
||||
reason to choose otherwise.
|
||||
|
||||
config MIPS_COMPACT_BRANCHES_ALWAYS
|
||||
bool "Always (force compact branches)"
|
||||
help
|
||||
Pass the -mcompact-branches=always flag to the compiler in order to
|
||||
force it to always emit compact branches, making no use of branch
|
||||
instructions with delay slots. This can result in more compact code
|
||||
which may be beneficial in some scenarios.
|
||||
|
||||
endchoice
|
||||
|
||||
endif # CPU_MIPSR6
|
||||
|
||||
config SCACHE_DEBUGFS
|
||||
bool "L2 cache debugfs entries"
|
||||
depends on DEBUG_FS
|
||||
help
|
||||
Enable this to allow parts of the L2 cache configuration, such as
|
||||
whether or not prefetching is enabled, to be exposed to userland
|
||||
via debugfs.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
menuconfig MIPS_CPS_NS16550
|
||||
bool "CPS SMP NS16550 UART output"
|
||||
depends on MIPS_CPS
|
||||
help
|
||||
Output debug information via an ns16550 compatible UART if exceptions
|
||||
occur early in the boot process of a secondary core.
|
||||
|
||||
if MIPS_CPS_NS16550
|
||||
|
||||
config MIPS_CPS_NS16550_BASE
|
||||
hex "UART Base Address"
|
||||
default 0x1b0003f8 if MIPS_MALTA
|
||||
help
|
||||
The base address of the ns16550 compatible UART on which to output
|
||||
debug information from the early stages of core startup.
|
||||
|
||||
config MIPS_CPS_NS16550_SHIFT
|
||||
int "UART Register Shift"
|
||||
default 0 if MIPS_MALTA
|
||||
help
|
||||
The number of bits to shift ns16550 register indices by in order to
|
||||
form their addresses. That is, log base 2 of the span between
|
||||
adjacent ns16550 registers in the system.
|
||||
|
||||
endif # MIPS_CPS_NS16550
|
||||
|
||||
endmenu
|
||||
|
|
|
|||
|
|
@ -204,6 +204,10 @@ toolchain-msa := $(call cc-option-yn,$(mips-cflags) -mhard-float -mfp64 -Wa$(
|
|||
cflags-$(toolchain-msa) += -DTOOLCHAIN_SUPPORTS_MSA
|
||||
endif
|
||||
|
||||
cflags-$(CONFIG_MIPS_COMPACT_BRANCHES_NEVER) += -mcompact-branches=never
|
||||
cflags-$(CONFIG_MIPS_COMPACT_BRANCHES_OPTIMAL) += -mcompact-branches=optimal
|
||||
cflags-$(CONFIG_MIPS_COMPACT_BRANCHES_ALWAYS) += -mcompact-branches=always
|
||||
|
||||
#
|
||||
# Firmware support
|
||||
#
|
||||
|
|
|
|||
|
|
@ -105,11 +105,28 @@ static int bcm47xx_get_invariants(struct ssb_bus *bus,
|
|||
struct ssb_init_invariants *iv)
|
||||
{
|
||||
char buf[20];
|
||||
int len, err;
|
||||
|
||||
/* Fill boardinfo structure */
|
||||
memset(&iv->boardinfo, 0 , sizeof(struct ssb_boardinfo));
|
||||
|
||||
bcm47xx_fill_ssb_boardinfo(&iv->boardinfo, NULL);
|
||||
len = bcm47xx_nvram_getenv("boardvendor", buf, sizeof(buf));
|
||||
if (len > 0) {
|
||||
err = kstrtou16(strim(buf), 0, &iv->boardinfo.vendor);
|
||||
if (err)
|
||||
pr_warn("Couldn't parse nvram board vendor entry with value \"%s\"\n",
|
||||
buf);
|
||||
}
|
||||
if (!iv->boardinfo.vendor)
|
||||
iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM;
|
||||
|
||||
len = bcm47xx_nvram_getenv("boardtype", buf, sizeof(buf));
|
||||
if (len > 0) {
|
||||
err = kstrtou16(strim(buf), 0, &iv->boardinfo.type);
|
||||
if (err)
|
||||
pr_warn("Couldn't parse nvram board type entry with value \"%s\"\n",
|
||||
buf);
|
||||
}
|
||||
|
||||
memset(&iv->sprom, 0, sizeof(struct ssb_sprom));
|
||||
bcm47xx_fill_sprom(&iv->sprom, NULL, false);
|
||||
|
|
|
|||
|
|
@ -60,9 +60,9 @@ static int get_nvram_var(const char *prefix, const char *postfix,
|
|||
}
|
||||
|
||||
#define NVRAM_READ_VAL(type) \
|
||||
static void nvram_read_ ## type (const char *prefix, \
|
||||
const char *postfix, const char *name, \
|
||||
type *val, type allset, bool fallback) \
|
||||
static void nvram_read_ ## type(const char *prefix, \
|
||||
const char *postfix, const char *name, \
|
||||
type *val, type allset, bool fallback) \
|
||||
{ \
|
||||
char buf[100]; \
|
||||
int err; \
|
||||
|
|
@ -422,7 +422,10 @@ static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom,
|
|||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
|
||||
struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
|
||||
struct ssb_sprom_core_pwr_info *pwr_info;
|
||||
|
||||
pwr_info = &sprom->core_pwr_info[i];
|
||||
|
||||
snprintf(postfix, sizeof(postfix), "%i", i);
|
||||
nvram_read_u8(prefix, postfix, "maxp2ga",
|
||||
&pwr_info->maxpwr_2g, 0, fallback);
|
||||
|
|
@ -470,7 +473,10 @@ static void bcm47xx_fill_sprom_path_r45(struct ssb_sprom *sprom,
|
|||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
|
||||
struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
|
||||
struct ssb_sprom_core_pwr_info *pwr_info;
|
||||
|
||||
pwr_info = &sprom->core_pwr_info[i];
|
||||
|
||||
snprintf(postfix, sizeof(postfix), "%i", i);
|
||||
nvram_read_u16(prefix, postfix, "pa2gw3a",
|
||||
&pwr_info->pa_2g[3], 0, fallback);
|
||||
|
|
@ -535,10 +541,11 @@ static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom,
|
|||
nvram_read_macaddr(prefix, "il0macaddr", sprom->il0mac, fallback);
|
||||
|
||||
/* The address prefix 00:90:4C is used by Broadcom in their initial
|
||||
configuration. When a mac address with the prefix 00:90:4C is used
|
||||
all devices from the same series are sharing the same mac address.
|
||||
To prevent mac address collisions we replace them with a mac address
|
||||
based on the base address. */
|
||||
* configuration. When a mac address with the prefix 00:90:4C is used
|
||||
* all devices from the same series are sharing the same mac address.
|
||||
* To prevent mac address collisions we replace them with a mac address
|
||||
* based on the base address.
|
||||
*/
|
||||
if (!bcm47xx_is_valid_mac(sprom->il0mac)) {
|
||||
u8 mac[6];
|
||||
|
||||
|
|
@ -592,32 +599,23 @@ void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix,
|
|||
bcm47xx_sprom_fill_auto(sprom, prefix, fallback);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_BCM47XX_SSB
|
||||
void bcm47xx_fill_ssb_boardinfo(struct ssb_boardinfo *boardinfo,
|
||||
const char *prefix)
|
||||
{
|
||||
nvram_read_u16(prefix, NULL, "boardvendor", &boardinfo->vendor, 0,
|
||||
true);
|
||||
if (!boardinfo->vendor)
|
||||
boardinfo->vendor = SSB_BOARDVENDOR_BCM;
|
||||
|
||||
nvram_read_u16(prefix, NULL, "boardtype", &boardinfo->type, 0, true);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BCM47XX_SSB)
|
||||
static int bcm47xx_get_sprom_ssb(struct ssb_bus *bus, struct ssb_sprom *out)
|
||||
{
|
||||
char prefix[10];
|
||||
|
||||
if (bus->bustype == SSB_BUSTYPE_PCI) {
|
||||
switch (bus->bustype) {
|
||||
case SSB_BUSTYPE_SSB:
|
||||
bcm47xx_fill_sprom(out, NULL, false);
|
||||
return 0;
|
||||
case SSB_BUSTYPE_PCI:
|
||||
memset(out, 0, sizeof(struct ssb_sprom));
|
||||
snprintf(prefix, sizeof(prefix), "pci/%u/%u/",
|
||||
bus->host_pci->bus->number + 1,
|
||||
PCI_SLOT(bus->host_pci->devfn));
|
||||
bcm47xx_fill_sprom(out, prefix, false);
|
||||
return 0;
|
||||
} else {
|
||||
default:
|
||||
pr_warn("Unable to fill SPROM for given bustype.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -7,6 +7,8 @@
|
|||
* Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/string.h>
|
||||
|
|
@ -31,7 +33,6 @@
|
|||
|
||||
#include <uapi/linux/bcm933xx_hcs.h>
|
||||
|
||||
#define PFX "board_bcm963xx: "
|
||||
|
||||
#define HCS_OFFSET_128K 0x20000
|
||||
|
||||
|
|
@ -740,7 +741,7 @@ int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
|
|||
memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
|
||||
return 0;
|
||||
} else {
|
||||
printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
|
||||
pr_err("unable to fill SPROM for given bustype\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
|
@ -784,7 +785,7 @@ void __init board_prom_init(void)
|
|||
cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
|
||||
else
|
||||
strcpy(cfe_version, "unknown");
|
||||
printk(KERN_INFO PFX "CFE version: %s\n", cfe_version);
|
||||
pr_info("CFE version: %s\n", cfe_version);
|
||||
|
||||
bcm63xx_nvram_init(boot_addr + BCM963XX_NVRAM_OFFSET);
|
||||
|
||||
|
|
@ -808,8 +809,7 @@ void __init board_prom_init(void)
|
|||
char name[17];
|
||||
memcpy(name, board_name, 16);
|
||||
name[16] = 0;
|
||||
printk(KERN_ERR PFX "unknown bcm963xx board: %s\n",
|
||||
name);
|
||||
pr_err("unknown bcm963xx board: %s\n", name);
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -854,7 +854,7 @@ void __init board_setup(void)
|
|||
{
|
||||
if (!board.name[0])
|
||||
panic("unable to detect bcm963xx board");
|
||||
printk(KERN_INFO PFX "board name: %s\n", board.name);
|
||||
pr_info("board name: %s\n", board.name);
|
||||
|
||||
/* make sure we're running on expected cpu */
|
||||
if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
|
||||
|
|
@ -910,7 +910,7 @@ int __init board_register_devices(void)
|
|||
memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
|
||||
if (ssb_arch_register_fallback_sprom(
|
||||
&bcm63xx_get_fallback_sprom) < 0)
|
||||
pr_err(PFX "failed to register fallback SPROM\n");
|
||||
pr_err("failed to register fallback SPROM\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -376,10 +376,10 @@ void __init bcm63xx_cpu_init(void)
|
|||
bcm63xx_cpu_freq = detect_cpu_clock();
|
||||
bcm63xx_memory_size = detect_memory_size();
|
||||
|
||||
printk(KERN_INFO "Detected Broadcom 0x%04x CPU revision %02x\n",
|
||||
bcm63xx_cpu_id, bcm63xx_cpu_rev);
|
||||
printk(KERN_INFO "CPU frequency is %u MHz\n",
|
||||
bcm63xx_cpu_freq / 1000000);
|
||||
printk(KERN_INFO "%uMB of RAM installed\n",
|
||||
bcm63xx_memory_size >> 20);
|
||||
pr_info("Detected Broadcom 0x%04x CPU revision %02x\n",
|
||||
bcm63xx_cpu_id, bcm63xx_cpu_rev);
|
||||
pr_info("CPU frequency is %u MHz\n",
|
||||
bcm63xx_cpu_freq / 1000000);
|
||||
pr_info("%uMB of RAM installed\n",
|
||||
bcm63xx_memory_size >> 20);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -139,6 +139,6 @@ int __init bcm63xx_pcmcia_register(void)
|
|||
return platform_device_register(&bcm63xx_pcmcia_device);
|
||||
|
||||
out_err:
|
||||
printk(KERN_ERR "unable to set pcmcia chip select\n");
|
||||
pr_err("unable to set pcmcia chip select\n");
|
||||
return ret;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -311,7 +311,7 @@ static int bcm63xx_external_irq_set_type(struct irq_data *d,
|
|||
break;
|
||||
|
||||
default:
|
||||
printk(KERN_ERR "bogus flow type combination given !\n");
|
||||
pr_err("bogus flow type combination given !\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
|
||||
void bcm63xx_machine_halt(void)
|
||||
{
|
||||
printk(KERN_INFO "System halted\n");
|
||||
pr_info("System halted\n");
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
|
|
@ -34,7 +34,7 @@ static void bcm6348_a1_reboot(void)
|
|||
u32 reg;
|
||||
|
||||
/* soft reset all blocks */
|
||||
printk(KERN_INFO "soft-resetting all blocks ...\n");
|
||||
pr_info("soft-resetting all blocks ...\n");
|
||||
reg = bcm_perf_readl(PERF_SOFTRESET_REG);
|
||||
reg &= ~SOFTRESET_6348_ALL;
|
||||
bcm_perf_writel(reg, PERF_SOFTRESET_REG);
|
||||
|
|
@ -46,7 +46,7 @@ static void bcm6348_a1_reboot(void)
|
|||
mdelay(10);
|
||||
|
||||
/* Jump to the power on address. */
|
||||
printk(KERN_INFO "jumping to reset vector.\n");
|
||||
pr_info("jumping to reset vector.\n");
|
||||
/* set high vectors (base at 0xbfc00000 */
|
||||
set_c0_status(ST0_BEV | ST0_ERL);
|
||||
/* run uncached in kseg0 */
|
||||
|
|
@ -110,7 +110,7 @@ void bcm63xx_machine_reboot(void)
|
|||
if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() == 0xa1))
|
||||
bcm6348_a1_reboot();
|
||||
|
||||
printk(KERN_INFO "triggering watchdog soft-reset...\n");
|
||||
pr_info("triggering watchdog soft-reset...\n");
|
||||
if (BCMCPU_IS_6328()) {
|
||||
bcm_wdt_writel(1, WDT_SOFTRESET_REG);
|
||||
} else {
|
||||
|
|
|
|||
|
|
@ -195,7 +195,7 @@ int bcm63xx_timer_init(void)
|
|||
irq = bcm63xx_get_irq_number(IRQ_TIMER);
|
||||
ret = request_irq(irq, timer_interrupt, 0, "bcm63xx_timer", NULL);
|
||||
if (ret) {
|
||||
printk(KERN_ERR "bcm63xx_timer: failed to register irq\n");
|
||||
pr_err("%s: failed to register irq\n", __func__);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -157,7 +157,6 @@ void __init plat_mem_setup(void)
|
|||
panic("no dtb found");
|
||||
|
||||
__dt_setup_arch(dtb);
|
||||
strlcpy(arcs_cmdline, boot_command_line, COMMAND_LINE_SIZE);
|
||||
|
||||
for (q = bmips_quirk_list; q->quirk_fn; q++) {
|
||||
if (of_flat_dt_is_compatible(of_get_flat_dt_root(),
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@ dts-dirs += mti
|
|||
dts-dirs += netlogic
|
||||
dts-dirs += qca
|
||||
dts-dirs += ralink
|
||||
dts-dirs += xilfpga
|
||||
|
||||
obj-y := $(addsuffix /, $(dts-dirs))
|
||||
|
||||
|
|
|
|||
|
|
@ -87,14 +87,32 @@
|
|||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x406780 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x44>;
|
||||
brcm,int-map-mask = <0x44>, <0xf000000>;
|
||||
brcm,int-fwd-mask = <0x70000>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <59>;
|
||||
interrupts = <59>, <57>;
|
||||
interrupt-names = "upg_main", "upg_bsc";
|
||||
};
|
||||
|
||||
upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
|
||||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x408b80 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
|
||||
brcm,int-fwd-mask = <0>;
|
||||
brcm,irq-can-wake;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <60>, <58>, <62>;
|
||||
interrupt-names = "upg_main_aon", "upg_bsc_aon",
|
||||
"upg_spi";
|
||||
};
|
||||
|
||||
sun_top_ctrl: syscon@404000 {
|
||||
|
|
@ -144,6 +162,56 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
bsca: i2c@406200 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406200 0x58>;
|
||||
interrupts = <24>;
|
||||
interrupt-names = "upg_bsca";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscb: i2c@406280 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406280 0x58>;
|
||||
interrupts = <25>;
|
||||
interrupt-names = "upg_bscb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscc: i2c@406300 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406300 0x58>;
|
||||
interrupts = <26>;
|
||||
interrupt-names = "upg_bscc";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscd: i2c@406380 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406380 0x58>;
|
||||
interrupts = <27>;
|
||||
interrupt-names = "upg_bscd";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsce: i2c@408980 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_aon_irq0_intc>;
|
||||
reg = <0x408980 0x58>;
|
||||
interrupts = <27>;
|
||||
interrupt-names = "upg_bsce";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet0: ethernet@430000 {
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&phy1>;
|
||||
|
|
@ -246,5 +314,47 @@
|
|||
interrupts = <76>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata: sata@181000 {
|
||||
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
|
||||
reg-names = "ahci", "top-ctrl";
|
||||
reg = <0x181000 0xa9c>, <0x180020 0x1c>;
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <40>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
brcm,broken-ncq;
|
||||
brcm,broken-phy;
|
||||
status = "disabled";
|
||||
|
||||
sata0: sata-port@0 {
|
||||
reg = <0>;
|
||||
phys = <&sata_phy0>;
|
||||
};
|
||||
|
||||
sata1: sata-port@1 {
|
||||
reg = <1>;
|
||||
phys = <&sata_phy1>;
|
||||
};
|
||||
};
|
||||
|
||||
sata_phy: sata-phy@1800000 {
|
||||
compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
|
||||
reg = <0x180100 0x0eff>;
|
||||
reg-names = "phy";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
sata_phy0: sata-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
sata_phy1: sata-phy@1 {
|
||||
reg = <1>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -81,14 +81,32 @@
|
|||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x406600 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x44>;
|
||||
brcm,int-map-mask = <0x44>, <0x7000000>;
|
||||
brcm,int-fwd-mask = <0x70000>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <56>;
|
||||
interrupts = <56>, <54>;
|
||||
interrupt-names = "upg_main", "upg_bsc";
|
||||
};
|
||||
|
||||
upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
|
||||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x408b80 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
|
||||
brcm,int-fwd-mask = <0>;
|
||||
brcm,irq-can-wake;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <57>, <55>, <59>;
|
||||
interrupt-names = "upg_main_aon", "upg_bsc_aon",
|
||||
"upg_spi";
|
||||
};
|
||||
|
||||
sun_top_ctrl: syscon@404000 {
|
||||
|
|
@ -138,6 +156,46 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
bsca: i2c@406200 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406200 0x58>;
|
||||
interrupts = <24>;
|
||||
interrupt-names = "upg_bsca";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscb: i2c@406280 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406280 0x58>;
|
||||
interrupts = <25>;
|
||||
interrupt-names = "upg_bscb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscc: i2c@406300 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406300 0x58>;
|
||||
interrupts = <26>;
|
||||
interrupt-names = "upg_bscc";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscd: i2c@408980 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_aon_irq0_intc>;
|
||||
reg = <0x408980 0x58>;
|
||||
interrupts = <27>;
|
||||
interrupt-names = "upg_bscd";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet0: ethernet@430000 {
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&phy1>;
|
||||
|
|
|
|||
|
|
@ -81,14 +81,32 @@
|
|||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x406600 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x44>;
|
||||
brcm,int-map-mask = <0x44>, <0x7000000>;
|
||||
brcm,int-fwd-mask = <0x70000>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <56>;
|
||||
interrupts = <56>, <54>;
|
||||
interrupt-names = "upg_main", "upg_bsc";
|
||||
};
|
||||
|
||||
upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
|
||||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x408b80 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
|
||||
brcm,int-fwd-mask = <0>;
|
||||
brcm,irq-can-wake;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <57>, <55>, <59>;
|
||||
interrupt-names = "upg_main_aon", "upg_bsc_aon",
|
||||
"upg_spi";
|
||||
};
|
||||
|
||||
sun_top_ctrl: syscon@404000 {
|
||||
|
|
@ -138,6 +156,46 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
bsca: i2c@406200 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406200 0x58>;
|
||||
interrupts = <24>;
|
||||
interrupt-names = "upg_bsca";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscb: i2c@406280 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406280 0x58>;
|
||||
interrupts = <25>;
|
||||
interrupt-names = "upg_bscb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscc: i2c@406300 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406300 0x58>;
|
||||
interrupts = <26>;
|
||||
interrupt-names = "upg_bscc";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscd: i2c@408980 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_aon_irq0_intc>;
|
||||
reg = <0x408980 0x58>;
|
||||
interrupts = <27>;
|
||||
interrupt-names = "upg_bscd";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet0: ethernet@430000 {
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&phy1>;
|
||||
|
|
|
|||
|
|
@ -87,14 +87,32 @@
|
|||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x406600 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x44>;
|
||||
brcm,int-map-mask = <0x44>, <0x7000000>;
|
||||
brcm,int-fwd-mask = <0x70000>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <56>;
|
||||
interrupts = <56>, <54>;
|
||||
interrupt-names = "upg_main", "upg_bsc";
|
||||
};
|
||||
|
||||
upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
|
||||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x408b80 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
|
||||
brcm,int-fwd-mask = <0>;
|
||||
brcm,irq-can-wake;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <57>, <55>, <59>;
|
||||
interrupt-names = "upg_main_aon", "upg_bsc_aon",
|
||||
"upg_spi";
|
||||
};
|
||||
|
||||
sun_top_ctrl: syscon@404000 {
|
||||
|
|
@ -144,6 +162,36 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
bsca: i2c@406200 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406200 0x58>;
|
||||
interrupts = <24>;
|
||||
interrupt-names = "upg_bsca";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscb: i2c@406280 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406280 0x58>;
|
||||
interrupts = <25>;
|
||||
interrupt-names = "upg_bscb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscd: i2c@408980 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_aon_irq0_intc>;
|
||||
reg = <0x408980 0x58>;
|
||||
interrupts = <27>;
|
||||
interrupt-names = "upg_bscd";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet0: ethernet@430000 {
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&phy1>;
|
||||
|
|
@ -189,5 +237,47 @@
|
|||
interrupts = <66>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata: sata@181000 {
|
||||
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
|
||||
reg-names = "ahci", "top-ctrl";
|
||||
reg = <0x181000 0xa9c>, <0x180020 0x1c>;
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <86>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
brcm,broken-ncq;
|
||||
brcm,broken-phy;
|
||||
status = "disabled";
|
||||
|
||||
sata0: sata-port@0 {
|
||||
reg = <0>;
|
||||
phys = <&sata_phy0>;
|
||||
};
|
||||
|
||||
sata1: sata-port@1 {
|
||||
reg = <1>;
|
||||
phys = <&sata_phy1>;
|
||||
};
|
||||
};
|
||||
|
||||
sata_phy: sata-phy@1800000 {
|
||||
compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
|
||||
reg = <0x180100 0x0eff>;
|
||||
reg-names = "phy";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
sata_phy0: sata-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
sata_phy1: sata-phy@1 {
|
||||
reg = <1>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -221,5 +221,47 @@
|
|||
interrupts = <73>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata: sata@181000 {
|
||||
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
|
||||
reg-names = "ahci", "top-ctrl";
|
||||
reg = <0x181000 0xa9c>, <0x180020 0x1c>;
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <40>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
brcm,broken-ncq;
|
||||
brcm,broken-phy;
|
||||
status = "disabled";
|
||||
|
||||
sata0: sata-port@0 {
|
||||
reg = <0>;
|
||||
phys = <&sata_phy0>;
|
||||
};
|
||||
|
||||
sata1: sata-port@1 {
|
||||
reg = <1>;
|
||||
phys = <&sata_phy1>;
|
||||
};
|
||||
};
|
||||
|
||||
sata_phy: sata-phy@1800000 {
|
||||
compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
|
||||
reg = <0x180100 0x0eff>;
|
||||
reg-names = "phy";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
sata_phy0: sata-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
sata_phy1: sata-phy@1 {
|
||||
reg = <1>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -29,6 +29,26 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&bsca {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bsce {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&enet0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -64,3 +84,11 @@
|
|||
&ohci3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -29,6 +29,22 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&bsca {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&enet0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -29,6 +29,22 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&bsca {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&enet0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -29,6 +29,18 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&bsca {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&enet0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -40,3 +52,11 @@
|
|||
&ohci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,5 +1,9 @@
|
|||
/dts-v1/;
|
||||
|
||||
/memreserve/ 0x00000000 0x00001000; /* YAMON exception vectors */
|
||||
/memreserve/ 0x00001000 0x000ef000; /* YAMON */
|
||||
/memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,9 @@
|
|||
dtb-$(CONFIG_XILFPGA_NEXYS4DDR) += nexys4ddr.dtb
|
||||
|
||||
obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
|
||||
|
||||
# Force kbuild to make empty built-in.o if necessary
|
||||
obj- += dummy.o
|
||||
|
||||
always := $(dtb-y)
|
||||
clean-files := *.dtb *.dtb.S
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "img,xilfpga";
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "mips,m14Kc";
|
||||
clocks = <&ext>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ext: ext {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "microAptiv.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "digilent,nexys4ddr";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x08000000>;
|
||||
};
|
||||
|
||||
cpuintc: interrupt-controller@0 {
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
compatible = "mti,cpu-interrupt-controller";
|
||||
};
|
||||
|
||||
axi_gpio: gpio@10600000 {
|
||||
#gpio-cells = <1>;
|
||||
compatible = "xlnx,xps-gpio-1.00.a";
|
||||
gpio-controller;
|
||||
reg = <0x10600000 0x10000>;
|
||||
xlnx,all-inputs = <0x0>;
|
||||
xlnx,dout-default = <0x0>;
|
||||
xlnx,gpio-width = <0x16>;
|
||||
xlnx,interrupt-present = <0x0>;
|
||||
xlnx,is-dual = <0x0>;
|
||||
xlnx,tri-default = <0xffffffff>;
|
||||
} ;
|
||||
|
||||
axi_uart16550: serial@10400000 {
|
||||
compatible = "ns16550a";
|
||||
reg = <0x10400000 0x10000>;
|
||||
|
||||
reg-shift = <2>;
|
||||
reg-offset = <0x1000>;
|
||||
|
||||
clocks = <&ext>;
|
||||
};
|
||||
};
|
||||
|
||||
&ext {
|
||||
clock-frequency = <50000000>;
|
||||
};
|
||||
|
|
@ -1081,6 +1081,7 @@ void __init prom_free_prom_memory(void)
|
|||
|
||||
int octeon_prune_device_tree(void);
|
||||
|
||||
extern const char __appended_dtb;
|
||||
extern const char __dtb_octeon_3xxx_begin;
|
||||
extern const char __dtb_octeon_68xx_begin;
|
||||
void __init device_tree_init(void)
|
||||
|
|
@ -1088,11 +1089,19 @@ void __init device_tree_init(void)
|
|||
const void *fdt;
|
||||
bool do_prune;
|
||||
|
||||
#ifdef CONFIG_MIPS_ELF_APPENDED_DTB
|
||||
if (!fdt_check_header(&__appended_dtb)) {
|
||||
fdt = &__appended_dtb;
|
||||
do_prune = false;
|
||||
pr_info("Using appended Device Tree.\n");
|
||||
} else
|
||||
#endif
|
||||
if (octeon_bootinfo->minor_version >= 3 && octeon_bootinfo->fdt_addr) {
|
||||
fdt = phys_to_virt(octeon_bootinfo->fdt_addr);
|
||||
if (fdt_check_header(fdt))
|
||||
panic("Corrupt Device Tree passed to kernel.");
|
||||
do_prune = false;
|
||||
pr_info("Using passed Device Tree.\n");
|
||||
} else if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
|
||||
fdt = &__dtb_octeon_68xx_begin;
|
||||
do_prune = true;
|
||||
|
|
@ -1106,8 +1115,6 @@ void __init device_tree_init(void)
|
|||
if (do_prune) {
|
||||
octeon_prune_device_tree();
|
||||
pr_info("Using internal Device Tree.\n");
|
||||
} else {
|
||||
pr_info("Using passed Device Tree.\n");
|
||||
}
|
||||
unflatten_and_copy_device_tree();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -122,20 +122,20 @@ CONFIG_EEPROM_MAX6875=y
|
|||
CONFIG_IDE=y
|
||||
CONFIG_BLK_DEV_IDECD=y
|
||||
CONFIG_BLK_DEV_IDETAPE=y
|
||||
CONFIG_IDE_GENERIC=y
|
||||
CONFIG_BLK_DEV_GENERIC=y
|
||||
CONFIG_BLK_DEV_CMD64X=y
|
||||
CONFIG_BLK_DEV_IT8213=m
|
||||
CONFIG_BLK_DEV_TC86C001=m
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_CHR_DEV_ST=m
|
||||
CONFIG_BLK_DEV_SR=m
|
||||
CONFIG_CHR_DEV_ST=y
|
||||
CONFIG_BLK_DEV_SR=y
|
||||
CONFIG_BLK_DEV_SR_VENDOR=y
|
||||
CONFIG_CHR_DEV_SG=m
|
||||
CONFIG_CHR_DEV_SCH=m
|
||||
CONFIG_ATA=y
|
||||
CONFIG_SATA_SIL24=y
|
||||
CONFIG_PATA_CMD64X=y
|
||||
CONFIG_PATA_IT8213=m
|
||||
CONFIG_PATA_SIL680=y
|
||||
CONFIG_ATA_GENERIC=y
|
||||
CONFIG_PATA_LEGACY=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_MII=y
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ CONFIG_MIPS_O32_FP64_SUPPORT=y
|
|||
# CONFIG_SWAP is not set
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
# CONFIG_RD_GZIP is not set
|
||||
CONFIG_RD_GZIP=y
|
||||
CONFIG_EXPERT=y
|
||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
|
|
@ -33,6 +33,7 @@ CONFIG_DEVTMPFS=y
|
|||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_BRCMSTB_GISB_ARB=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CFI=y
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ CONFIG_MIPS_O32_FP64_SUPPORT=y
|
|||
# CONFIG_SWAP is not set
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
# CONFIG_RD_GZIP is not set
|
||||
CONFIG_RD_GZIP=y
|
||||
CONFIG_EXPERT=y
|
||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
|
|
@ -34,6 +34,7 @@ CONFIG_DEVTMPFS=y
|
|||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_BRCMSTB_GISB_ARB=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CFI=y
|
||||
|
|
|
|||
|
|
@ -31,9 +31,9 @@ CONFIG_NETWORK_SECMARK=y
|
|||
CONFIG_IP_SCTP=m
|
||||
CONFIG_FW_LOADER=m
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
# CONFIG_MISC_DEVICES is not set
|
||||
CONFIG_IDE=y
|
||||
CONFIG_IDE_GENERIC=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_ATA=y
|
||||
CONFIG_PATA_LEGACY=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_PHYLIB=m
|
||||
CONFIG_MARVELL_PHY=m
|
||||
|
|
|
|||
|
|
@ -14,9 +14,9 @@ CONFIG_MODVERSIONS=y
|
|||
CONFIG_MODULE_SRCVERSION_ALL=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
# CONFIG_MISC_DEVICES is not set
|
||||
CONFIG_IDE=y
|
||||
CONFIG_IDE_GENERIC=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_ATA=y
|
||||
CONFIG_PATA_LEGACY=y
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@ CONFIG_MIPS32_N32=y
|
|||
CONFIG_PM=y
|
||||
# CONFIG_SUSPEND is not set
|
||||
CONFIG_HIBERNATION=y
|
||||
CONFIG_PM_STD_PARTITION="/dev/hda3"
|
||||
CONFIG_PM_STD_PARTITION="/dev/sda3"
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
|
|
@ -114,20 +114,16 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m
|
|||
CONFIG_BLK_DEV_RAM=m
|
||||
CONFIG_CDROM_PKTCDVD=m
|
||||
CONFIG_ATA_OVER_ETH=m
|
||||
# CONFIG_MISC_DEVICES is not set
|
||||
CONFIG_IDE=y
|
||||
CONFIG_BLK_DEV_IDECD=y
|
||||
CONFIG_IDE_TASK_IOCTL=y
|
||||
CONFIG_IDE_GENERIC=y
|
||||
CONFIG_BLK_DEV_GENERIC=y
|
||||
CONFIG_BLK_DEV_VIA82CXXX=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_DEV_SR=y
|
||||
CONFIG_BLK_DEV_SR_VENDOR=y
|
||||
CONFIG_CHR_DEV_SG=y
|
||||
CONFIG_SCSI_CONSTANTS=y
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
CONFIG_ATA=y
|
||||
CONFIG_PATA_VIA=y
|
||||
CONFIG_ATA_GENERIC=y
|
||||
CONFIG_PATA_LEGACY=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_MACVLAN=m
|
||||
CONFIG_VETH=m
|
||||
|
|
|
|||
|
|
@ -35,11 +35,11 @@ CONFIG_MTD_CHAR=y
|
|||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
# CONFIG_MISC_DEVICES is not set
|
||||
CONFIG_IDE=y
|
||||
CONFIG_IDE_GENERIC=y
|
||||
CONFIG_BLK_DEV_GENERIC=y
|
||||
CONFIG_BLK_DEV_CMD64X=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_ATA=y
|
||||
CONFIG_PATA_CMD64X=y
|
||||
CONFIG_ATA_GENERIC=y
|
||||
CONFIG_PATA_LEGACY=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_NET_PCI=y
|
||||
|
|
|
|||
|
|
@ -108,16 +108,11 @@ CONFIG_BLK_DEV_LOOP=y
|
|||
CONFIG_BLK_DEV_CRYPTOLOOP=m
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_SIZE=8192
|
||||
# CONFIG_MISC_DEVICES is not set
|
||||
CONFIG_IDE=y
|
||||
CONFIG_IDE_TASK_IOCTL=y
|
||||
# CONFIG_IDEPCI_PCIBUS_ORDER is not set
|
||||
CONFIG_BLK_DEV_AMD74XX=y
|
||||
CONFIG_SCSI=m
|
||||
CONFIG_BLK_DEV_SD=m
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_CHR_DEV_SG=m
|
||||
CONFIG_SCSI_MULTI_LUN=y
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
CONFIG_ATA=y
|
||||
CONFIG_PATA_AMD=y
|
||||
CONFIG_MD=y
|
||||
CONFIG_BLK_DEV_MD=m
|
||||
CONFIG_MD_LINEAR=m
|
||||
|
|
|
|||
|
|
@ -241,14 +241,11 @@ CONFIG_BLK_DEV_NBD=m
|
|||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_CDROM_PKTCDVD=m
|
||||
CONFIG_ATA_OVER_ETH=m
|
||||
CONFIG_IDE=y
|
||||
CONFIG_BLK_DEV_IDECD=y
|
||||
CONFIG_IDE_GENERIC=y
|
||||
CONFIG_RAID_ATTRS=m
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_CHR_DEV_ST=m
|
||||
CONFIG_CHR_DEV_OSST=m
|
||||
CONFIG_BLK_DEV_SR=m
|
||||
CONFIG_BLK_DEV_SR=y
|
||||
CONFIG_BLK_DEV_SR_VENDOR=y
|
||||
CONFIG_CHR_DEV_SG=m
|
||||
CONFIG_SCSI_CONSTANTS=y
|
||||
|
|
@ -265,6 +262,7 @@ CONFIG_AIC7XXX_RESET_DELAY_MS=15000
|
|||
# CONFIG_AIC7XXX_DEBUG_ENABLE is not set
|
||||
CONFIG_ATA=y
|
||||
CONFIG_ATA_PIIX=y
|
||||
CONFIG_PATA_LEGACY=y
|
||||
CONFIG_MD=y
|
||||
CONFIG_BLK_DEV_MD=m
|
||||
CONFIG_MD_LINEAR=m
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue