Staging: rtl8187se: r8185b_init.c: Fixed spacing
Removed unnecessary tabs, spaces, and blank lines. Signed-off-by: Andrew Miller <amiller@amilx.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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0034102808
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9af7e27dd7
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@ -55,7 +55,7 @@ static u8 MAC_REG_TABLE[][2] = {
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{0x61, 0x97}, {0x62, 0xF0}, {0x63, 0x09}, {0x80, 0x0F}, {0x81, 0xFF},
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{0x61, 0x97}, {0x62, 0xF0}, {0x63, 0x09}, {0x80, 0x0F}, {0x81, 0xFF},
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{0x82, 0xFF}, {0x83, 0x03},
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{0x82, 0xFF}, {0x83, 0x03},
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{0xC4, 0x22}, {0xC5, 0x22}, {0xC6, 0x22}, {0xC7, 0x22}, {0xC8, 0x22}, /* lzm add 080826 */
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{0xC4, 0x22}, {0xC5, 0x22}, {0xC6, 0x22}, {0xC7, 0x22}, {0xC8, 0x22}, /* lzm add 080826 */
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{0xC9, 0x22}, {0xCA, 0x22}, {0xCB, 0x22}, {0xCC, 0x22}, {0xCD, 0x22},/* lzm add 080826 */
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{0xC9, 0x22}, {0xCA, 0x22}, {0xCB, 0x22}, {0xCC, 0x22}, {0xCD, 0x22}, /* lzm add 080826 */
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{0xe2, 0x00},
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{0xe2, 0x00},
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@ -98,7 +98,6 @@ static u8 OFDM_CONFIG[] = {
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/* OFDM reg0x06[7:0]=0xFF: Enable power saving mode in RX */
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/* OFDM reg0x06[7:0]=0xFF: Enable power saving mode in RX */
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/* OFDM reg0x3C[4]=1'b1: Enable RX power saving mode */
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/* OFDM reg0x3C[4]=1'b1: Enable RX power saving mode */
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/* ofdm 0x3a = 0x7b ,(original : 0xfb) For ECS shielding room TP test */
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/* ofdm 0x3a = 0x7b ,(original : 0xfb) For ECS shielding room TP test */
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/* 0x00 */
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/* 0x00 */
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0x10, 0x0F, 0x0A, 0x0C, 0x14, 0xFA, 0xFF, 0x50,
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0x10, 0x0F, 0x0A, 0x0C, 0x14, 0xFA, 0xFF, 0x50,
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0x00, 0x50, 0x00, 0x00, 0x00, 0x5C, 0x00, 0x00,
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0x00, 0x50, 0x00, 0x00, 0x00, 0x5C, 0x00, 0x00,
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@ -113,7 +112,7 @@ static u8 OFDM_CONFIG[] = {
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0xD8, 0x3C, 0x7B, 0x10, 0x10
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0xD8, 0x3C, 0x7B, 0x10, 0x10
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};
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};
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/* ---------------------------------------------------------------
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/*---------------------------------------------------------------
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* Hardware IO
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* Hardware IO
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* the code is ported from Windows source code
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* the code is ported from Windows source code
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----------------------------------------------------------------*/
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----------------------------------------------------------------*/
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@ -152,8 +151,8 @@ PlatformIOWrite4Byte(
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)
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)
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{
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{
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/* {by amy 080312 */
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/* {by amy 080312 */
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if (offset == PhyAddr) {
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if (offset == PhyAddr) {
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/* For Base Band configuration. */
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/* For Base Band configuration. */
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unsigned char cmdByte;
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unsigned char cmdByte;
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unsigned long dataBytes;
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unsigned long dataBytes;
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unsigned char idx;
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unsigned char idx;
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@ -170,7 +169,7 @@ if (offset == PhyAddr) {
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acquiring the spinlock in such context.
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acquiring the spinlock in such context.
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2. PlatformIOWrite4Byte() MUST NOT be recursive.
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2. PlatformIOWrite4Byte() MUST NOT be recursive.
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*/
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*/
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/* NdisAcquireSpinLock( &(pDevice->IoSpinLock) ); */
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/* NdisAcquireSpinLock( &(pDevice->IoSpinLock) ); */
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for (idx = 0; idx < 30; idx++) {
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for (idx = 0; idx < 30; idx++) {
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/* Make sure command bit is clear before access it. */
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/* Make sure command bit is clear before access it. */
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@ -186,7 +185,7 @@ if (offset == PhyAddr) {
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write_nic_byte(dev, offset, cmdByte);
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write_nic_byte(dev, offset, cmdByte);
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/* NdisReleaseSpinLock( &(pDevice->IoSpinLock) ); */
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/* NdisReleaseSpinLock( &(pDevice->IoSpinLock) ); */
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}
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}
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/* by amy 080312} */
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/* by amy 080312} */
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else {
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else {
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@ -551,13 +550,9 @@ ZEBRA_Config_85BASIC_HardCode(
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/* Page0 : reg0-reg15 */
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/* Page0 : reg0-reg15 */
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RF_WriteReg(dev, 0x00, 0x009f); mdelay(1);/* 1 */
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RF_WriteReg(dev, 0x00, 0x009f); mdelay(1);/* 1 */
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RF_WriteReg(dev, 0x01, 0x06e0); mdelay(1);
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RF_WriteReg(dev, 0x01, 0x06e0); mdelay(1);
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RF_WriteReg(dev, 0x02, 0x004d); mdelay(1);/* 2 */
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RF_WriteReg(dev, 0x02, 0x004d); mdelay(1);/* 2 */
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RF_WriteReg(dev, 0x03, 0x07f1); mdelay(1);/* 3 */
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RF_WriteReg(dev, 0x03, 0x07f1); mdelay(1);/* 3 */
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RF_WriteReg(dev, 0x04, 0x0975); mdelay(1);
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RF_WriteReg(dev, 0x04, 0x0975); mdelay(1);
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RF_WriteReg(dev, 0x05, 0x0c72); mdelay(1);
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RF_WriteReg(dev, 0x05, 0x0c72); mdelay(1);
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RF_WriteReg(dev, 0x06, 0x0ae6); mdelay(1);
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RF_WriteReg(dev, 0x06, 0x0ae6); mdelay(1);
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@ -571,17 +566,12 @@ ZEBRA_Config_85BASIC_HardCode(
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RF_WriteReg(dev, 0x0e, 0x0020); mdelay(1);
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RF_WriteReg(dev, 0x0e, 0x0020); mdelay(1);
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RF_WriteReg(dev, 0x0f, 0x0990); mdelay(1);
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RF_WriteReg(dev, 0x0f, 0x0990); mdelay(1);
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/* Page1 : reg16-reg30 */
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/* Page1 : reg16-reg30 */
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RF_WriteReg(dev, 0x00, 0x013f); mdelay(1);
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RF_WriteReg(dev, 0x00, 0x013f); mdelay(1);
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RF_WriteReg(dev, 0x03, 0x0806); mdelay(1);
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RF_WriteReg(dev, 0x03, 0x0806); mdelay(1);
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RF_WriteReg(dev, 0x04, 0x03a7); mdelay(1);
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RF_WriteReg(dev, 0x04, 0x03a7); mdelay(1);
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RF_WriteReg(dev, 0x05, 0x059b); mdelay(1);
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RF_WriteReg(dev, 0x05, 0x059b); mdelay(1);
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RF_WriteReg(dev, 0x06, 0x0081); mdelay(1);
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RF_WriteReg(dev, 0x06, 0x0081); mdelay(1);
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RF_WriteReg(dev, 0x07, 0x01A0); mdelay(1);
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RF_WriteReg(dev, 0x07, 0x01A0); mdelay(1);
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/* Don't write RF23/RF24 to make a difference between 87S C cut and D cut. asked by SD3 stevenl. */
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/* Don't write RF23/RF24 to make a difference between 87S C cut and D cut. asked by SD3 stevenl. */
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RF_WriteReg(dev, 0x0a, 0x0001); mdelay(1);
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RF_WriteReg(dev, 0x0a, 0x0001); mdelay(1);
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@ -598,11 +588,10 @@ ZEBRA_Config_85BASIC_HardCode(
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}
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}
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RF_WriteReg(dev, 0x0f, 0x0acc); mdelay(1);
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RF_WriteReg(dev, 0x0f, 0x0acc); mdelay(1);
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RF_WriteReg(dev, 0x00, 0x01d7); mdelay(1); /* 6 */
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RF_WriteReg(dev, 0x00, 0x01d7); mdelay(1); /* 6 */
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RF_WriteReg(dev, 0x03, 0x0e00); mdelay(1);
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RF_WriteReg(dev, 0x03, 0x0e00); mdelay(1);
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RF_WriteReg(dev, 0x04, 0x0e50); mdelay(1);
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RF_WriteReg(dev, 0x04, 0x0e50); mdelay(1);
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for (i = 0; i <= 36; i++) {
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for (i = 0; i <= 36; i++) {
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RF_WriteReg(dev, 0x01, i); mdelay(1);
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RF_WriteReg(dev, 0x01, i); mdelay(1);
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RF_WriteReg(dev, 0x02, ZEBRA_RF_RX_GAIN_TABLE[i]); mdelay(1);
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RF_WriteReg(dev, 0x02, ZEBRA_RF_RX_GAIN_TABLE[i]); mdelay(1);
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@ -610,7 +599,6 @@ ZEBRA_Config_85BASIC_HardCode(
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RF_WriteReg(dev, 0x05, 0x0203); mdelay(1); /* 203, 343 */
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RF_WriteReg(dev, 0x05, 0x0203); mdelay(1); /* 203, 343 */
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RF_WriteReg(dev, 0x06, 0x0200); mdelay(1); /* 400 */
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RF_WriteReg(dev, 0x06, 0x0200); mdelay(1); /* 400 */
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RF_WriteReg(dev, 0x00, 0x0137); mdelay(1); /* switch to reg16-reg30, and HSSI disable 137 */
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RF_WriteReg(dev, 0x00, 0x0137); mdelay(1); /* switch to reg16-reg30, and HSSI disable 137 */
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mdelay(10); /* Deay 10 ms. */ /* 0xfd */
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mdelay(10); /* Deay 10 ms. */ /* 0xfd */
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@ -669,7 +657,6 @@ ZEBRA_Config_85BASIC_HardCode(
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RF_WriteReg(dev, 0x00, 0x0197); mdelay(1); /* Rx mode*/ /*+edward */
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RF_WriteReg(dev, 0x00, 0x0197); mdelay(1); /* Rx mode*/ /*+edward */
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RF_WriteReg(dev, 0x05, 0x05ab); mdelay(1); /* Rx mode*/ /*+edward */
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RF_WriteReg(dev, 0x05, 0x05ab); mdelay(1); /* Rx mode*/ /*+edward */
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RF_WriteReg(dev, 0x00, 0x009f); mdelay(1); /* Rx mode*/ /*+edward */
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RF_WriteReg(dev, 0x00, 0x009f); mdelay(1); /* Rx mode*/ /*+edward */
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RF_WriteReg(dev, 0x01, 0x0000); mdelay(1); /* Rx mode*/ /*+edward */
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RF_WriteReg(dev, 0x01, 0x0000); mdelay(1); /* Rx mode*/ /*+edward */
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RF_WriteReg(dev, 0x02, 0x0000); mdelay(1); /* Rx mode*/ /*+edward */
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RF_WriteReg(dev, 0x02, 0x0000); mdelay(1); /* Rx mode*/ /*+edward */
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/* power save parameters. */
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/* power save parameters. */
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@ -952,7 +939,6 @@ MacConfig_85BASIC_HardCode(
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============================================================================
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============================================================================
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*/
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*/
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int nLinesRead = 0;
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int nLinesRead = 0;
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u32 u4bRegOffset, u4bRegValue, u4bPageIndex = 0;
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u32 u4bRegOffset, u4bRegValue, u4bPageIndex = 0;
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int i;
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int i;
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@ -964,7 +950,6 @@ MacConfig_85BASIC_HardCode(
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if (u4bRegOffset == 0x5e)
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if (u4bRegOffset == 0x5e)
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u4bPageIndex = u4bRegValue;
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u4bPageIndex = u4bRegValue;
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else
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else
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u4bRegOffset |= (u4bPageIndex << 8);
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u4bRegOffset |= (u4bPageIndex << 8);
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@ -1013,7 +998,7 @@ MacConfig_85BASIC(
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write_nic_word(dev, 0x378, 0x0560);
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write_nic_word(dev, 0x378, 0x0560);
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write_nic_word(dev, 0x37A, 0x0560);
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write_nic_word(dev, 0x37A, 0x0560);
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write_nic_word(dev, 0x37C, 0x00EC);
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write_nic_word(dev, 0x37C, 0x00EC);
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write_nic_word(dev, 0x37E, 0x00EC); /*+edward */
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write_nic_word(dev, 0x37E, 0x00EC); /* +edward */
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write_nic_byte(dev, 0x24E, 0x01);
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write_nic_byte(dev, 0x24E, 0x01);
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}
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}
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@ -1296,18 +1281,15 @@ MlmeDisassociateRequest(
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SendDisassociation(priv->ieee80211, asSta, asRsn);
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SendDisassociation(priv->ieee80211, asSta, asRsn);
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if (memcmp(priv->ieee80211->current_network.bssid, asSta, 6) == 0) {
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if (memcmp(priv->ieee80211->current_network.bssid, asSta, 6) == 0) {
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/*ShuChen TODO: change media status. */
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/* ShuChen TODO: change media status. */
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/*ShuChen TODO: What to do when disassociate. */
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/* ShuChen TODO: What to do when disassociate. */
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DrvIFIndicateDisassociation(dev, unspec_reason);
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DrvIFIndicateDisassociation(dev, unspec_reason);
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for (i = 0; i < 6; i++)
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for (i = 0; i < 6; i++)
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priv->ieee80211->current_network.bssid[i] = 0x22;
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priv->ieee80211->current_network.bssid[i] = 0x22;
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ieee80211_disassociate(priv->ieee80211);
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ieee80211_disassociate(priv->ieee80211);
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}
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}
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}
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}
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void
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void
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because we do NOT need to set ssid to dummy ones.
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because we do NOT need to set ssid to dummy ones.
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*/
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*/
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MgntDisconnect(dev, disas_lv_ss);
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MgntDisconnect(dev, disas_lv_ss);
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/* Clear content of bssDesc[] and bssDesc4Query[] to avoid reporting old bss to UI. */
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/* Clear content of bssDesc[] and bssDesc4Query[] to avoid reporting old bss to UI. */
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}
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}
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@ -1715,7 +1696,7 @@ void rtl8185b_adapter_start(struct net_device *dev)
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rtl8185b_irq_enable(dev);
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rtl8185b_irq_enable(dev);
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netif_start_queue(dev);
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netif_start_queue(dev);
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}
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}
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void rtl8185b_rx_enable(struct net_device *dev)
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void rtl8185b_rx_enable(struct net_device *dev)
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{
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{
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