[MIPS] Cobalt: Fix IRQ comment; the Cobalt kernel uses CP0 counter now.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -35,7 +35,7 @@
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* 4 - ethernet
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* 5 - 16550 UART
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* 6 - cascade i8259
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* 7 - CP0 counter (unused)
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* 7 - CP0 counter
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*/
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#define MIPS_CPU_IRQ_BASE 16
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@ -48,7 +48,6 @@
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#define SCSI_IRQ (MIPS_CPU_IRQ_BASE + 5)
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#define I8259_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 6)
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#define GT641XX_IRQ_BASE 24
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#include <asm/irq_gt641xx.h>
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