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drm/i915/icl: Don't allocate fixed bypass path blocks for ICL 

GEN9 onwards bypass path allocation of 4 blocks was needed, as per
hardware design. ICL doesn't require bypass path allocation of 4 DDB
blocks, handling the same in this patch.

v2 (from Paulo):
  - No need for a comment that says what the code already says.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180130134918.32283-2-paulo.r.zanoni@intel.com
This commit is contained in:
Mahesh Kumar 2018-01-30 11:49:10 -02:00 committed by Paulo Zanoni
parent 5b364bec5c
commit 9a9e3dfd6f
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/drm/i915/intel_pm.c
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@ -3778,7 +3778,8 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
ddb_size = INTEL_INFO(dev_priv)->ddb_size; ddb_size = INTEL_INFO(dev_priv)->ddb_size;
WARN_ON(ddb_size == 0); WARN_ON(ddb_size == 0);
ddb_size -= 4; /* 4 blocks for bypass path allocation */ if (INTEL_GEN(dev_priv) < 11)
ddb_size -= 4; /* 4 blocks for bypass path allocation */
/* /*
* If the state doesn't change the active CRTC's, then there's * If the state doesn't change the active CRTC's, then there's