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async_tx: remove HIGHMEM64G restriction 

This restriction prevented ASYNC_TX_DMA from being enabled on platform
configurations where DMA address conversion could not be performed in
place on the stack.  Since commit 04ce9ab3 ("async_xor: permit callers
to pass in a 'dma/page scribble' region") the async_tx api now either
uses a caller provided 'scribble' buffer, or performs the conversion in
place when sizeof(dma_addr_t) <= sizeof(struct page *).

Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
Dan Williams 2009-09-08 15:06:10 -07:00
parent d8902adcc1
commit 9a8de639f3
1 changed files with 1 additions and 1 deletions
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2
drivers/dma/Kconfig
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@ -128,7 +128,7 @@ config NET_DMA
config ASYNC_TX_DMA config ASYNC_TX_DMA
bool "Async_tx: Offload support for the async_tx api" bool "Async_tx: Offload support for the async_tx api"
depends on DMA_ENGINE && !HIGHMEM64G depends on DMA_ENGINE
help help
This allows the async_tx api to take advantage of offload engines for This allows the async_tx api to take advantage of offload engines for
memcpy, memset, xor, and raid6 p+q operations. If your platform has memcpy, memset, xor, and raid6 p+q operations. If your platform has