drm/amd/display: Reset plane when tiling flags change

[Why]
Enabling or disable DCC or switching between tiled and linear formats
can require bandwidth updates.

They're currently skipping all DC validation by being treated as purely
surface updates.

[How]
Treat tiling_flag changes (which encode DCC state) as a condition for
resetting the plane.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Nicholas Kazlauskas 2020-07-28 09:59:53 -04:00 committed by Alex Deucher
parent 707477b086
commit 9a81cc6079
1 changed files with 16 additions and 3 deletions

View File

@ -8258,6 +8258,8 @@ static bool should_reset_plane(struct drm_atomic_state *state,
* TODO: Come up with a more elegant solution for this. * TODO: Come up with a more elegant solution for this.
*/ */
for_each_oldnew_plane_in_state(state, other, old_other_state, new_other_state, i) { for_each_oldnew_plane_in_state(state, other, old_other_state, new_other_state, i) {
struct dm_plane_state *old_dm_plane_state, *new_dm_plane_state;
if (other->type == DRM_PLANE_TYPE_CURSOR) if (other->type == DRM_PLANE_TYPE_CURSOR)
continue; continue;
@ -8268,9 +8270,20 @@ static bool should_reset_plane(struct drm_atomic_state *state,
if (old_other_state->crtc != new_other_state->crtc) if (old_other_state->crtc != new_other_state->crtc)
return true; return true;
/* TODO: Remove this once we can handle fast format changes. */ /* Framebuffer checks fall at the end. */
if (old_other_state->fb && new_other_state->fb && if (!old_other_state->fb || !new_other_state->fb)
old_other_state->fb->format != new_other_state->fb->format) continue;
/* Pixel format changes can require bandwidth updates. */
if (old_other_state->fb->format != new_other_state->fb->format)
return true;
old_dm_plane_state = to_dm_plane_state(old_other_state);
new_dm_plane_state = to_dm_plane_state(new_other_state);
/* Tiling and DCC changes also require bandwidth updates. */
if (old_dm_plane_state->tiling_flags !=
new_dm_plane_state->tiling_flags)
return true; return true;
} }