crypto: qat - change ae_num to ae_id
Change the logic how acceleration engines are indexed to make it easier to read. Aslo some return code values updates to better reflect what failed. Signed-off-by: Pingchao Yang <pingchao.yang@intel.com> Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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9a147cb323
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@ -424,7 +424,7 @@ static void qat_hal_reset_timestamp(struct icp_qat_fw_loader_handle *handle)
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SET_GLB_CSR(handle, MISC_CONTROL, misc_ctl &
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(~MC_TIMESTAMP_ENABLE));
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for (ae = 0; ae <= handle->hal_handle->ae_max_num; ae++) {
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for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
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if (!(handle->hal_handle->ae_mask & (1 << ae)))
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continue;
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qat_hal_wr_ae_csr(handle, ae, TIMESTAMP_LOW, 0);
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@ -492,7 +492,7 @@ int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle)
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goto out_err;
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/* Set undefined power-up/reset states to reasonable default values */
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for (ae = 0; ae <= handle->hal_handle->ae_max_num; ae++) {
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for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
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if (!(handle->hal_handle->ae_mask & (1 << ae)))
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continue;
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qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES,
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@ -608,7 +608,7 @@ static int qat_hal_clear_gpr(struct icp_qat_fw_loader_handle *handle)
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unsigned int savctx = 0;
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int ret = 0;
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for (ae = 0; ae <= handle->hal_handle->ae_max_num; ae++) {
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for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
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if (!(handle->hal_handle->ae_mask & (1 << ae)))
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continue;
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for (reg = 0; reg < ICP_QAT_UCLO_MAX_GPR_REG; reg++) {
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@ -637,7 +637,7 @@ static int qat_hal_clear_gpr(struct icp_qat_fw_loader_handle *handle)
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qat_hal_wr_ae_csr(handle, ae, CTX_SIG_EVENTS_ACTIVE, 0);
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qat_hal_enable_ctx(handle, ae, ctx_mask);
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}
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for (ae = 0; ae <= handle->hal_handle->ae_max_num; ae++) {
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for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
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if (!(handle->hal_handle->ae_mask & (1 << ae)))
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continue;
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/* wait for AE to finish */
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@ -674,17 +674,16 @@ static int qat_hal_clear_gpr(struct icp_qat_fw_loader_handle *handle)
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#define ICP_DH895XCC_PMISC_BAR 1
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int qat_hal_init(struct adf_accel_dev *accel_dev)
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{
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unsigned char ae = 0;
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unsigned int csr_val = 0;
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unsigned int max_en_ae_num = 0;
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struct icp_qat_fw_loader_handle *handle = NULL;
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unsigned char ae;
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unsigned int max_en_ae_id = 0;
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struct icp_qat_fw_loader_handle *handle;
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struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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struct adf_bar *bar = &pci_info->pci_bars[ADF_DH895XCC_PMISC_BAR];
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handle = kzalloc(sizeof(*handle), GFP_KERNEL);
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if (!handle)
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goto out_handle;
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return -ENOMEM;
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handle->hal_cap_g_ctl_csr_addr_v = bar->virt_addr +
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ICP_DH895XCC_CAP_OFFSET;
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@ -713,9 +712,9 @@ int qat_hal_init(struct adf_accel_dev *accel_dev)
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handle->hal_handle->max_ustore;
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handle->hal_handle->aes[ae].live_ctx_mask =
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ICP_QAT_UCLO_AE_ALL_CTX;
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max_en_ae_num = ae;
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max_en_ae_id = ae;
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}
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handle->hal_handle->ae_max_num = max_en_ae_num;
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handle->hal_handle->ae_max_num = max_en_ae_id + 1;
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/* take all AEs out of reset */
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if (qat_hal_clr_reset(handle)) {
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pr_err("QAT: qat_hal_clr_reset error\n");
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@ -724,7 +723,9 @@ int qat_hal_init(struct adf_accel_dev *accel_dev)
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if (qat_hal_clear_gpr(handle))
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goto out_err;
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/* Set SIGNATURE_ENABLE[0] to 0x1 in order to enable ALU_OUT csr */
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for (ae = 0; ae <= handle->hal_handle->ae_max_num; ae++) {
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for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
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unsigned int csr_val = 0;
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if (!(hw_data->ae_mask & (1 << ae)))
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continue;
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qat_hal_rd_ae_csr(handle, ae, SIGNATURE_ENABLE, &csr_val);
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@ -738,7 +739,6 @@ out_err:
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kfree(handle->hal_handle);
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out_hal_handle:
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kfree(handle);
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out_handle:
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return -EFAULT;
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}
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@ -214,11 +214,10 @@ qat_uclo_cleanup_batch_init_list(struct icp_qat_fw_loader_handle *handle,
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static int qat_uclo_parse_num(char *str, unsigned int *num)
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{
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char buf[16];
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char buf[16] = {0};
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unsigned long ae = 0;
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int i;
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memset(buf, '\0', 16);
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strncpy(buf, str, 15);
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for (i = 0; i < 16; i++) {
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if (!isdigit(buf[i])) {
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@ -418,13 +417,13 @@ static int qat_uclo_init_ustore(struct icp_qat_fw_loader_handle *handle,
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fill_data = kcalloc(ICP_QAT_UCLO_MAX_USTORE, sizeof(uint64_t),
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GFP_KERNEL);
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if (!fill_data)
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return -EFAULT;
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return -ENOMEM;
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for (i = 0; i < ICP_QAT_UCLO_MAX_USTORE; i++)
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memcpy(&fill_data[i], &uof_image->fill_pattern,
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sizeof(uint64_t));
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page = image->page;
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for (ae = 0; ae <= handle->hal_handle->ae_max_num; ae++) {
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for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
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if (!test_bit(ae, (unsigned long *)&uof_image->ae_assigned))
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continue;
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ustore_size = obj_handle->ae_data[ae].eff_ustore_size;
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@ -442,11 +441,9 @@ static int qat_uclo_init_ustore(struct icp_qat_fw_loader_handle *handle,
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static int qat_uclo_init_memory(struct icp_qat_fw_loader_handle *handle)
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{
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unsigned int i;
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int status = 0;
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int i, ae;
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struct icp_qat_uclo_objhandle *obj_handle = handle->obj_handle;
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struct icp_qat_uof_initmem *initmem = obj_handle->init_mem_tab.init_mem;
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int ae;
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for (i = 0; i < obj_handle->init_mem_tab.entry_num; i++) {
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if (initmem->num_in_bytes) {
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@ -473,7 +470,7 @@ static int qat_uclo_init_memory(struct icp_qat_fw_loader_handle *handle)
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&obj_handle->
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umem_init_tab[ae]);
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}
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return status;
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return 0;
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}
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static void *qat_uclo_find_chunk(struct icp_qat_uof_objhdr *obj_hdr,
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@ -526,7 +523,7 @@ qat_uclo_map_chunk(char *buf, struct icp_qat_uof_filehdr *file_hdr,
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{
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struct icp_qat_uof_filechunkhdr *file_chunk;
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struct icp_qat_uclo_objhdr *obj_hdr;
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void *chunk;
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char *chunk;
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int i;
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file_chunk = (struct icp_qat_uof_filechunkhdr *)
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@ -536,7 +533,7 @@ qat_uclo_map_chunk(char *buf, struct icp_qat_uof_filehdr *file_hdr,
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ICP_QAT_UOF_OBJID_LEN)) {
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chunk = buf + file_chunk->offset;
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if (file_chunk->checksum != qat_uclo_calc_str_checksum(
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(char *)chunk, file_chunk->size))
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chunk, file_chunk->size))
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break;
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obj_hdr = kzalloc(sizeof(*obj_hdr), GFP_KERNEL);
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if (!obj_hdr)
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@ -595,7 +592,7 @@ qat_uclo_check_image_compat(struct icp_qat_uof_encap_obj *encap_uof_obj,
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return 0;
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}
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static void qat_uclo_map_image_pages(struct icp_qat_uof_encap_obj
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static void qat_uclo_map_image_page(struct icp_qat_uof_encap_obj
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*encap_uof_obj,
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struct icp_qat_uof_image *img,
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struct icp_qat_uclo_encap_page *page)
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@ -631,7 +628,7 @@ static int qat_uclo_map_uimage(struct icp_qat_uclo_objhandle *obj_handle,
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struct icp_qat_uclo_encapme *ae_uimage,
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int max_image)
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{
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int a = 0, i;
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int i, j;
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struct icp_qat_uof_chunkhdr *chunk_hdr = NULL;
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struct icp_qat_uof_image *image;
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struct icp_qat_uof_objtable *ae_regtab;
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struct icp_qat_uof_encap_obj *encap_uof_obj =
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&obj_handle->encap_uof_obj;
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for (a = 0; a < max_image; a++) {
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for (j = 0; j < max_image; j++) {
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chunk_hdr = qat_uclo_find_chunk(encap_uof_obj->obj_hdr,
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ICP_QAT_UOF_IMAG, chunk_hdr);
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if (!chunk_hdr)
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@ -650,37 +647,37 @@ static int qat_uclo_map_uimage(struct icp_qat_uclo_objhandle *obj_handle,
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ae_regtab = (struct icp_qat_uof_objtable *)
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(image->reg_tab_offset +
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obj_handle->obj_hdr->file_buff);
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ae_uimage[a].ae_reg_num = ae_regtab->entry_num;
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ae_uimage[a].ae_reg = (struct icp_qat_uof_ae_reg *)
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ae_uimage[j].ae_reg_num = ae_regtab->entry_num;
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ae_uimage[j].ae_reg = (struct icp_qat_uof_ae_reg *)
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(((char *)ae_regtab) +
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sizeof(struct icp_qat_uof_objtable));
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init_reg_sym_tab = (struct icp_qat_uof_objtable *)
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(image->init_reg_sym_tab +
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obj_handle->obj_hdr->file_buff);
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ae_uimage[a].init_regsym_num = init_reg_sym_tab->entry_num;
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ae_uimage[a].init_regsym = (struct icp_qat_uof_init_regsym *)
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ae_uimage[j].init_regsym_num = init_reg_sym_tab->entry_num;
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ae_uimage[j].init_regsym = (struct icp_qat_uof_init_regsym *)
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(((char *)init_reg_sym_tab) +
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sizeof(struct icp_qat_uof_objtable));
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sbreak_tab = (struct icp_qat_uof_objtable *)
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(image->sbreak_tab + obj_handle->obj_hdr->file_buff);
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ae_uimage[a].sbreak_num = sbreak_tab->entry_num;
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ae_uimage[a].sbreak = (struct icp_qat_uof_sbreak *)
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ae_uimage[j].sbreak_num = sbreak_tab->entry_num;
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ae_uimage[j].sbreak = (struct icp_qat_uof_sbreak *)
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(((char *)sbreak_tab) +
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sizeof(struct icp_qat_uof_objtable));
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ae_uimage[a].img_ptr = image;
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ae_uimage[j].img_ptr = image;
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if (qat_uclo_check_image_compat(encap_uof_obj, image))
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goto out_err;
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ae_uimage[a].page =
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ae_uimage[j].page =
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kzalloc(sizeof(struct icp_qat_uclo_encap_page),
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GFP_KERNEL);
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if (!ae_uimage[a].page)
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if (!ae_uimage[j].page)
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goto out_err;
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qat_uclo_map_image_pages(encap_uof_obj, image,
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ae_uimage[a].page);
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qat_uclo_map_image_page(encap_uof_obj, image,
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ae_uimage[j].page);
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}
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return a;
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return j;
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out_err:
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for (i = 0; i < a; i++)
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for (i = 0; i < j; i++)
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kfree(ae_uimage[i].page);
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return 0;
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}
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@ -875,7 +872,7 @@ static int qat_uclo_init_globals(struct icp_qat_fw_loader_handle *handle)
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return -EINVAL;
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}
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}
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for (ae = 0; ae <= handle->hal_handle->ae_max_num; ae++) {
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for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
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for (s = 0; s < obj_handle->ae_data[ae].slice_num; s++) {
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if (!obj_handle->ae_data[ae].ae_slices[s].encap_image)
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continue;
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@ -896,7 +893,7 @@ static int qat_uclo_set_ae_mode(struct icp_qat_fw_loader_handle *handle)
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struct icp_qat_uclo_aedata *ae_data;
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struct icp_qat_uclo_objhandle *obj_handle = handle->obj_handle;
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for (ae = 0; ae <= handle->hal_handle->ae_max_num; ae++) {
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for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
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if (!test_bit(ae,
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(unsigned long *)&handle->hal_handle->ae_mask))
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continue;
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@ -1041,7 +1038,7 @@ out_objbuf_err:
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void qat_uclo_del_uof_obj(struct icp_qat_fw_loader_handle *handle)
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{
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struct icp_qat_uclo_objhandle *obj_handle = handle->obj_handle;
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int a;
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unsigned int a;
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if (!obj_handle)
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return;
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@ -1050,7 +1047,7 @@ void qat_uclo_del_uof_obj(struct icp_qat_fw_loader_handle *handle)
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for (a = 0; a < obj_handle->uimage_num; a++)
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kfree(obj_handle->ae_uimage[a].page);
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for (a = 0; a <= (int)handle->hal_handle->ae_max_num; a++)
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for (a = 0; a < handle->hal_handle->ae_max_num; a++)
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qat_uclo_free_ae_data(&obj_handle->ae_data[a]);
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kfree(obj_handle->obj_hdr);
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@ -1127,8 +1124,8 @@ static void qat_uclo_wr_uimage_raw_page(struct icp_qat_fw_loader_handle *handle,
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}
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}
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static void qat_uclo_wr_uimage_pages(struct icp_qat_fw_loader_handle *handle,
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struct icp_qat_uof_image *image)
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static void qat_uclo_wr_uimage_page(struct icp_qat_fw_loader_handle *handle,
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struct icp_qat_uof_image *image)
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{
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struct icp_qat_uclo_objhandle *obj_handle = handle->obj_handle;
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unsigned int ctx_mask, s;
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@ -1142,7 +1139,7 @@ static void qat_uclo_wr_uimage_pages(struct icp_qat_fw_loader_handle *handle,
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ctx_mask = 0x55;
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/* load the default page and set assigned CTX PC
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* to the entrypoint address */
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for (ae = 0; ae <= handle->hal_handle->ae_max_num; ae++) {
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for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
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if (!test_bit(ae, (unsigned long *)&image->ae_assigned))
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continue;
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/* find the slice to which this image is assigned */
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@ -1181,8 +1178,8 @@ int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle)
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return -EINVAL;
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if (qat_uclo_init_ustore(handle, &obj_handle->ae_uimage[i]))
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return -EINVAL;
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qat_uclo_wr_uimage_pages(handle,
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obj_handle->ae_uimage[i].img_ptr);
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qat_uclo_wr_uimage_page(handle,
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obj_handle->ae_uimage[i].img_ptr);
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}
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return 0;
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}
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