ARM64: dts: meson-gxbb: Move common nodes to meson-gx
Move common nodes between GXBB and GXL in to the common GX dtsi. Leave the clock attributes in the GXBB dtsi for now. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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70db166a2b
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998a9c8aa8
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@ -129,6 +129,30 @@
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#clock-cells = <0>;
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};
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firmware {
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sm: secure-monitor {
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compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
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};
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};
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efuse: efuse {
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compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
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#address-cells = <1>;
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#size-cells = <1>;
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sn: sn@14 {
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reg = <0x14 0x10>;
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};
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eth_mac: eth_mac@34 {
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reg = <0x34 0x10>;
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};
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bid: bid@46 {
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reg = <0x46 0x30>;
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};
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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@ -142,6 +166,12 @@
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
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reset: reset-controller@4404 {
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compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset";
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reg = <0x0 0x04404 0x0 0x20>;
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#reset-cells = <1>;
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};
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uart_A: serial@84c0 {
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compatible = "amlogic,meson-uart";
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reg = <0x0 0x84c0 0x0 0x14>;
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@ -149,6 +179,76 @@
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clocks = <&xtal>;
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status = "disabled";
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};
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uart_B: serial@84dc {
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compatible = "amlogic,meson-uart";
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reg = <0x0 0x84dc 0x0 0x14>;
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interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>;
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status = "disabled";
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};
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i2c_A: i2c@8500 {
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compatible = "amlogic,meson-gxbb-i2c";
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reg = <0x0 0x08500 0x0 0x20>;
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interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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pwm_ab: pwm@8550 {
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compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x08550 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm_cd: pwm@8650 {
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compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x08650 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm_ef: pwm@86c0 {
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compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x086c0 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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uart_C: serial@8700 {
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compatible = "amlogic,meson-uart";
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reg = <0x0 0x8700 0x0 0x14>;
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interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>;
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status = "disabled";
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};
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i2c_B: i2c@87c0 {
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compatible = "amlogic,meson-gxbb-i2c";
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reg = <0x0 0x087c0 0x0 0x20>;
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interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c_C: i2c@87e0 {
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compatible = "amlogic,meson-gxbb-i2c";
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reg = <0x0 0x087e0 0x0 0x20>;
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interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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watchdog@98d0 {
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compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt";
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reg = <0x0 0x098d0 0x0 0x10>;
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clocks = <&xtal>;
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};
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};
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gic: interrupt-controller@c4301000 {
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@ -178,6 +278,13 @@
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clocks = <&xtal>;
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status = "disabled";
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};
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ir: ir@580 {
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compatible = "amlogic,meson-gxbb-ir";
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reg = <0x0 0x00580 0x0 0x40>;
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interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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};
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periphs: periphs@c8834000 {
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@ -186,6 +293,11 @@
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
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rng {
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compatible = "amlogic,meson-rng";
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reg = <0x0 0x0 0x0 0x4>;
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};
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};
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@ -195,6 +307,25 @@
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
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mailbox: mailbox@404 {
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compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
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reg = <0 0x404 0 0x4c>;
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interrupts = <0 208 IRQ_TYPE_EDGE_RISING>,
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<0 209 IRQ_TYPE_EDGE_RISING>,
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<0 210 IRQ_TYPE_EDGE_RISING>;
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#mbox-cells = <1>;
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};
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};
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ethmac: ethernet@c9410000 {
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compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac";
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reg = <0x0 0xc9410000 0x0 0x10000
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0x0 0xc8834540 0x0 0x4>;
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interrupts = <0 8 1>;
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interrupt-names = "macirq";
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phy-mode = "rgmii";
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status = "disabled";
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};
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apb: apb@d0000000 {
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@ -50,30 +50,6 @@
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/ {
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compatible = "amlogic,meson-gxbb";
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firmware {
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sm: secure-monitor {
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compatible = "amlogic,meson-gxbb-sm";
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};
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};
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efuse: efuse {
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compatible = "amlogic,meson-gxbb-efuse";
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#address-cells = <1>;
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#size-cells = <1>;
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sn: sn@14 {
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reg = <0x14 0x10>;
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};
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eth_mac: eth_mac@34 {
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reg = <0x34 0x10>;
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};
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bid: bid@46 {
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reg = <0x46 0x30>;
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};
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};
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scpi {
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compatible = "amlogic,meson-gxbb-scpi";
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mboxes = <&mailbox 1 &mailbox 2>;
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@ -158,20 +134,6 @@
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dr_mode = "host";
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status = "disabled";
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};
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ethmac: ethernet@c9410000 {
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compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
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reg = <0x0 0xc9410000 0x0 0x10000
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0x0 0xc8834540 0x0 0x4>;
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interrupts = <0 8 1>;
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interrupt-names = "macirq";
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clocks = <&clkc CLKID_ETH>,
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<&clkc CLKID_FCLK_DIV2>,
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<&clkc CLKID_MPLL2>;
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clock-names = "stmmaceth", "clkin0", "clkin1";
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phy-mode = "rgmii";
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status = "disabled";
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};
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};
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};
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@ -192,55 +154,6 @@
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};
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&cbus {
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reset: reset-controller@4404 {
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compatible = "amlogic,meson-gxbb-reset";
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reg = <0x0 0x04404 0x0 0x20>;
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#reset-cells = <1>;
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};
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uart_B: serial@84dc {
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compatible = "amlogic,meson-uart";
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reg = <0x0 0x84dc 0x0 0x14>;
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interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>;
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status = "disabled";
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};
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pwm_ab: pwm@8550 {
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compatible = "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x08550 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm_cd: pwm@8650 {
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compatible = "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x08650 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm_ef: pwm@86c0 {
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compatible = "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x086c0 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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uart_C: serial@8700 {
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compatible = "amlogic,meson-uart";
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reg = <0x0 0x8700 0x0 0x14>;
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interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>;
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status = "disabled";
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};
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watchdog@98d0 {
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compatible = "amlogic,meson-gxbb-wdt";
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reg = <0x0 0x098d0 0x0 0x10>;
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clocks = <&xtal>;
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};
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spifc: spi@8c80 {
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compatible = "amlogic,meson-gxbb-spifc";
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reg = <0x0 0x08c80 0x0 0x80>;
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@ -249,36 +162,13 @@
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clocks = <&clkc CLKID_SPI>;
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status = "disabled";
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};
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};
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i2c_A: i2c@8500 {
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compatible = "amlogic,meson-gxbb-i2c";
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reg = <0x0 0x08500 0x0 0x20>;
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interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc CLKID_I2C>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c_B: i2c@87c0 {
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compatible = "amlogic,meson-gxbb-i2c";
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reg = <0x0 0x087c0 0x0 0x20>;
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interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc CLKID_I2C>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c_C: i2c@87e0 {
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compatible = "amlogic,meson-gxbb-i2c";
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reg = <0x0 0x087e0 0x0 0x20>;
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interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc CLKID_I2C>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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ðmac {
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clocks = <&clkc CLKID_ETH>,
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<&clkc CLKID_FCLK_DIV2>,
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<&clkc CLKID_MPLL2>;
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clock-names = "stmmaceth", "clkin0", "clkin1";
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};
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&aobus {
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@ -355,13 +245,6 @@
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#reset-cells = <1>;
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};
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ir: ir@580 {
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compatible = "amlogic,meson-gxbb-ir";
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reg = <0x0 0x00580 0x0 0x40>;
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interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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pwm_ab_AO: pwm@550 {
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compatible = "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x0550 0x0 0x10>;
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@ -381,11 +264,6 @@
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};
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&periphs {
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rng {
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compatible = "amlogic,meson-rng";
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reg = <0x0 0x0 0x0 0x4>;
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};
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pinctrl_periphs: pinctrl@4b0 {
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compatible = "amlogic,meson-gxbb-periphs-pinctrl";
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#address-cells = <2>;
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@ -593,15 +471,18 @@
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#clock-cells = <1>;
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reg = <0x0 0x0 0x0 0x3db>;
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};
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};
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mailbox: mailbox@404 {
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compatible = "amlogic,meson-gxbb-mhu";
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reg = <0 0x404 0 0x4c>;
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interrupts = <0 208 IRQ_TYPE_EDGE_RISING>,
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<0 209 IRQ_TYPE_EDGE_RISING>,
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<0 210 IRQ_TYPE_EDGE_RISING>;
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#mbox-cells = <1>;
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};
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&i2c_A {
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clocks = <&clkc CLKID_I2C>;
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};
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&i2c_B {
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clocks = <&clkc CLKID_I2C>;
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};
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&i2c_C {
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clocks = <&clkc CLKID_I2C>;
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};
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&sd_emmc_a {
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