ARMv7 Vexpress update for v5.4
Single cleanup patch handling type checks using cppcheck tool (bitwise shift by more than 31 on a 32 bit type) -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAl1T44QACgkQAEG6vDF+ 4picTRAAnSvwq6SMWQtwEonJ+tHhiwHgfdyU6lbWg2nqmugU4QezrKhWI8047vD2 IY8bS0m4PRxWLa5lSAIOpKv2zpl/+TTkApun66RpdVhKzS6JnmuVQyoe+lhZUKbF MPeKAk82HTresu/jQN4D9OuPFSC6/NbOEMi3NwPIT2ncV+UVzrxZ3LR9lBrJRviV hjOv7gN48tThBepUoJjhLdjfddAdrqOYhfXPE95OhNBzQ9mg+3Gk9kH4JBfFm0Q4 SdL3fBznhJtw2KyvqM480nxO2BPvWo425EGX1T8R2CuoApoPk9D3jgk6anlJIhP8 1A5rDQWsuQAmGHmf2dbyWBFk4Mylf1Vo+IWrClPrNwzCfPoKK1IDEQQ6vIheP2pt RrrGgGTj13aU8xbH3VYTF58u71YytwexUFU5RfnNcj1v3MWdrnxPekrCuazxE6dC CJ+NANZr8GYvA1eKwu5pfRWrkYkcFqHYiHIQtWb6pvP/WetYNUjmM+L7epWesrk3 eyJqUKXmQoA1Vdd9L9QYUaicRUCMrDwuUBcQSF7DzZal8KaUBgOlwQVO1Pihbt0+ IdE8vTZLeIryY8Q88z/b42nH9IAjFj9+FCoCfkHrfAnH1c3Lv9vUd4pTDbf9RV5n NdPSlYQYK+9xu0yVnF62eN3h4iJWUG2lRczmPdpEEfth22TRZFo= =JqeJ -----END PGP SIGNATURE----- Merge tag 'vexpress-update-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/soc ARMv7 Vexpress update for v5.4 Single cleanup patch handling type checks using cppcheck tool (bitwise shift by more than 31 on a 32 bit type) * tag 'vexpress-update-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: ARM: vexpress: Cleanup cppcheck shifting warning Link: https://lore.kernel.org/r/20190814172441.26143-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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98d868415f
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@ -69,7 +69,7 @@
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#define A7_PERFVAL_BASE 0xC30
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/* Config interface control bits */
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#define SYSCFG_START (1 << 31)
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#define SYSCFG_START BIT(31)
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#define SYSCFG_SCC (6 << 20)
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#define SYSCFG_STAT (14 << 20)
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@ -162,7 +162,7 @@ void ve_spc_cpu_wakeup_irq(u32 cluster, u32 cpu, bool set)
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if (cluster >= MAX_CLUSTERS)
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return;
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mask = 1 << cpu;
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mask = BIT(cpu);
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if (!cluster_is_a15(cluster))
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mask <<= 4;
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