ARM: ux500: Replace ST-E's home-brew DMA direction definition with the generic one
STEDMA40_*_TO_* direction definitions are identical in all but name to the pre-defined generic DMA_*_TO_* ones. Let's make things easy by not duplicating such things. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
8a3b6e143c
commit
98b68ab5ce
|
@ -21,13 +21,13 @@
|
|||
|
||||
static struct stedma40_chan_cfg msp0_dma_rx = {
|
||||
.high_priority = true,
|
||||
.dir = STEDMA40_PERIPH_TO_MEM,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV31_MSP0_SLIM0_CH0,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg msp0_dma_tx = {
|
||||
.high_priority = true,
|
||||
.dir = STEDMA40_MEM_TO_PERIPH,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV31_MSP0_SLIM0_CH0,
|
||||
};
|
||||
|
||||
|
@ -39,13 +39,13 @@ struct msp_i2s_platform_data msp0_platform_data = {
|
|||
|
||||
static struct stedma40_chan_cfg msp1_dma_rx = {
|
||||
.high_priority = true,
|
||||
.dir = STEDMA40_PERIPH_TO_MEM,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV30_MSP3,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg msp1_dma_tx = {
|
||||
.high_priority = true,
|
||||
.dir = STEDMA40_MEM_TO_PERIPH,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV30_MSP1,
|
||||
};
|
||||
|
||||
|
@ -57,13 +57,13 @@ struct msp_i2s_platform_data msp1_platform_data = {
|
|||
|
||||
static struct stedma40_chan_cfg msp2_dma_rx = {
|
||||
.high_priority = true,
|
||||
.dir = STEDMA40_PERIPH_TO_MEM,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV14_MSP2,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg msp2_dma_tx = {
|
||||
.high_priority = true,
|
||||
.dir = STEDMA40_MEM_TO_PERIPH,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV14_MSP2,
|
||||
.use_fixed_channel = true,
|
||||
.phy_channel = 1,
|
||||
|
|
|
@ -34,13 +34,13 @@
|
|||
#ifdef CONFIG_STE_DMA40
|
||||
struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_PERIPH_TO_MEM,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV29_SD_MM0,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_MEM_TO_PERIPH,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV29_SD_MM0,
|
||||
};
|
||||
#endif
|
||||
|
@ -81,13 +81,13 @@ void mop500_sdi_tc35892_init(struct device *parent)
|
|||
#ifdef CONFIG_STE_DMA40
|
||||
static struct stedma40_chan_cfg sdi1_dma_cfg_rx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_PERIPH_TO_MEM,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV32_SD_MM1,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg sdi1_dma_cfg_tx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_MEM_TO_PERIPH,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV32_SD_MM1,
|
||||
};
|
||||
#endif
|
||||
|
@ -112,13 +112,13 @@ struct mmci_platform_data mop500_sdi1_data = {
|
|||
#ifdef CONFIG_STE_DMA40
|
||||
struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_PERIPH_TO_MEM,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV28_SD_MM2,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_MEM_TO_PERIPH,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV28_SD_MM2,
|
||||
};
|
||||
#endif
|
||||
|
@ -144,13 +144,13 @@ struct mmci_platform_data mop500_sdi2_data = {
|
|||
#ifdef CONFIG_STE_DMA40
|
||||
struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_PERIPH_TO_MEM,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV42_SD_MM4,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_MEM_TO_PERIPH,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV42_SD_MM4,
|
||||
};
|
||||
#endif
|
||||
|
|
|
@ -424,19 +424,19 @@ void mop500_snowball_ethernet_clock_enable(void)
|
|||
|
||||
static struct cryp_platform_data u8500_cryp1_platform_data = {
|
||||
.mem_to_engine = {
|
||||
.dir = STEDMA40_MEM_TO_PERIPH,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV48_CAC1,
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
},
|
||||
.engine_to_mem = {
|
||||
.dir = STEDMA40_PERIPH_TO_MEM,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV48_CAC1,
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
}
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg u8500_hash_dma_cfg_tx = {
|
||||
.dir = STEDMA40_MEM_TO_PERIPH,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV50_HAC1_TX,
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
};
|
||||
|
@ -455,13 +455,13 @@ static struct platform_device *mop500_platform_devs[] __initdata = {
|
|||
#ifdef CONFIG_STE_DMA40
|
||||
static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_PERIPH_TO_MEM,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV8_SSP0,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_MEM_TO_PERIPH,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV8_SSP0,
|
||||
};
|
||||
#endif
|
||||
|
@ -490,37 +490,37 @@ static void __init mop500_spi_init(struct device *parent)
|
|||
#ifdef CONFIG_STE_DMA40
|
||||
static struct stedma40_chan_cfg uart0_dma_cfg_rx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_PERIPH_TO_MEM,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV13_UART0,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg uart0_dma_cfg_tx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_MEM_TO_PERIPH,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV13_UART0,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg uart1_dma_cfg_rx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_PERIPH_TO_MEM,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV12_UART1,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg uart1_dma_cfg_tx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_MEM_TO_PERIPH,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV12_UART1,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg uart2_dma_cfg_rx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_PERIPH_TO_MEM,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV11_UART2,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = STEDMA40_MEM_TO_PERIPH,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV11_UART2,
|
||||
};
|
||||
#endif
|
||||
|
|
|
@ -14,12 +14,12 @@
|
|||
|
||||
#define MUSB_DMA40_RX_CH { \
|
||||
.mode = STEDMA40_MODE_LOGICAL, \
|
||||
.dir = STEDMA40_PERIPH_TO_MEM, \
|
||||
.dir = DMA_DEV_TO_MEM, \
|
||||
}
|
||||
|
||||
#define MUSB_DMA40_TX_CH { \
|
||||
.mode = STEDMA40_MODE_LOGICAL, \
|
||||
.dir = STEDMA40_MEM_TO_PERIPH, \
|
||||
.dir = DMA_MEM_TO_DEV, \
|
||||
}
|
||||
|
||||
static struct stedma40_chan_cfg musb_dma_rx_ch[UX500_MUSB_DMA_NUM_RX_TX_CHANNELS]
|
||||
|
|
Loading…
Reference in New Issue