KVM: arm64: Move ELR_EL1 to the system register array
As ELR-EL1 is a VNCR-capable register with ARMv8.4-NV, let's move it to the sys_regs array and repaint the accessors. While we're at it, let's kill the now useless accessors used only on the fault injection path. Reviewed-by: James Morse <james.morse@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
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@ -127,27 +127,6 @@ static __always_inline unsigned long *vcpu_pc(const struct kvm_vcpu *vcpu)
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return (unsigned long *)&vcpu_gp_regs(vcpu)->pc;
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}
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static inline unsigned long *__vcpu_elr_el1(const struct kvm_vcpu *vcpu)
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{
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return (unsigned long *)&vcpu->arch.ctxt.elr_el1;
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}
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static inline unsigned long vcpu_read_elr_el1(const struct kvm_vcpu *vcpu)
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{
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if (vcpu->arch.sysregs_loaded_on_cpu)
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return read_sysreg_el1(SYS_ELR);
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else
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return *__vcpu_elr_el1(vcpu);
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}
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static inline void vcpu_write_elr_el1(const struct kvm_vcpu *vcpu, unsigned long v)
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{
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if (vcpu->arch.sysregs_loaded_on_cpu)
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write_sysreg_el1(v, SYS_ELR);
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else
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*__vcpu_elr_el1(vcpu) = v;
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}
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static __always_inline unsigned long *vcpu_cpsr(const struct kvm_vcpu *vcpu)
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{
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return (unsigned long *)&vcpu_gp_regs(vcpu)->pstate;
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@ -185,6 +185,8 @@ enum vcpu_sysreg {
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APGAKEYLO_EL1,
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APGAKEYHI_EL1,
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ELR_EL1,
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/* 32bit specific registers. Keep them at the end of the range */
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DACR32_EL2, /* Domain Access Control Register */
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IFSR32_EL2, /* Instruction Fault Status Register */
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@ -239,7 +241,6 @@ struct kvm_cpu_context {
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struct user_pt_regs regs; /* sp = sp_el0 */
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u64 sp_el1;
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u64 elr_el1;
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u64 spsr[KVM_NR_SPSR];
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@ -132,7 +132,7 @@ static void *core_reg_addr(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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return &vcpu->arch.ctxt.sp_el1;
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case KVM_REG_ARM_CORE_REG(elr_el1):
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return &vcpu->arch.ctxt.elr_el1;
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return __ctxt_sys_reg(&vcpu->arch.ctxt, ELR_EL1);
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case KVM_REG_ARM_CORE_REG(spsr[0]) ...
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KVM_REG_ARM_CORE_REG(spsr[KVM_NR_SPSR - 1]):
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@ -47,7 +47,7 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt)
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ctxt_sys_reg(ctxt, TPIDR_EL1) = read_sysreg(tpidr_el1);
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ctxt->sp_el1 = read_sysreg(sp_el1);
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ctxt->elr_el1 = read_sysreg_el1(SYS_ELR);
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ctxt_sys_reg(ctxt, ELR_EL1) = read_sysreg_el1(SYS_ELR);
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ctxt->spsr[KVM_SPSR_EL1] = read_sysreg_el1(SYS_SPSR);
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}
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@ -126,7 +126,7 @@ static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt)
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}
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write_sysreg(ctxt->sp_el1, sp_el1);
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write_sysreg_el1(ctxt->elr_el1, SYS_ELR);
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write_sysreg_el1(ctxt_sys_reg(ctxt, ELR_EL1), SYS_ELR);
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write_sysreg_el1(ctxt->spsr[KVM_SPSR_EL1], SYS_SPSR);
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}
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@ -64,7 +64,7 @@ static void enter_exception64(struct kvm_vcpu *vcpu, unsigned long target_mode,
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case PSR_MODE_EL1h:
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vbar = vcpu_read_sys_reg(vcpu, VBAR_EL1);
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sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1);
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vcpu_write_elr_el1(vcpu, *vcpu_pc(vcpu));
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vcpu_write_sys_reg(vcpu, *vcpu_pc(vcpu), ELR_EL1);
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break;
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default:
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/* Don't do that */
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@ -94,6 +94,7 @@ static bool __vcpu_read_sys_reg_from_cpu(int reg, u64 *val)
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case TPIDR_EL1: *val = read_sysreg_s(SYS_TPIDR_EL1); break;
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case AMAIR_EL1: *val = read_sysreg_s(SYS_AMAIR_EL12); break;
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case CNTKCTL_EL1: *val = read_sysreg_s(SYS_CNTKCTL_EL12); break;
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case ELR_EL1: *val = read_sysreg_s(SYS_ELR_EL12); break;
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case PAR_EL1: *val = read_sysreg_s(SYS_PAR_EL1); break;
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case DACR32_EL2: *val = read_sysreg_s(SYS_DACR32_EL2); break;
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case IFSR32_EL2: *val = read_sysreg_s(SYS_IFSR32_EL2); break;
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@ -133,6 +134,7 @@ static bool __vcpu_write_sys_reg_to_cpu(u64 val, int reg)
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case TPIDR_EL1: write_sysreg_s(val, SYS_TPIDR_EL1); break;
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case AMAIR_EL1: write_sysreg_s(val, SYS_AMAIR_EL12); break;
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case CNTKCTL_EL1: write_sysreg_s(val, SYS_CNTKCTL_EL12); break;
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case ELR_EL1: write_sysreg_s(val, SYS_ELR_EL12); break;
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case PAR_EL1: write_sysreg_s(val, SYS_PAR_EL1); break;
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case DACR32_EL2: write_sysreg_s(val, SYS_DACR32_EL2); break;
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case IFSR32_EL2: write_sysreg_s(val, SYS_IFSR32_EL2); break;
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