can: sja1000: add read/write routines for 8, 16 and 32-bit register access
add routines for 8, 16 and 32-bit access like in drivers/i2c/busses/i2c-pca-platform.c Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Acked-by: Wolfgang Grandegger <wg@grandegger.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -37,16 +37,36 @@ MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
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MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the platform bus");
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MODULE_LICENSE("GPL v2");
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static u8 sp_read_reg(const struct sja1000_priv *priv, int reg)
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static u8 sp_read_reg8(const struct sja1000_priv *priv, int reg)
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{
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return ioread8(priv->reg_base + reg);
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}
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static void sp_write_reg(const struct sja1000_priv *priv, int reg, u8 val)
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static void sp_write_reg8(const struct sja1000_priv *priv, int reg, u8 val)
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{
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iowrite8(val, priv->reg_base + reg);
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}
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static u8 sp_read_reg16(const struct sja1000_priv *priv, int reg)
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{
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return ioread8(priv->reg_base + reg * 2);
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}
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static void sp_write_reg16(const struct sja1000_priv *priv, int reg, u8 val)
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{
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iowrite8(val, priv->reg_base + reg * 2);
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}
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static u8 sp_read_reg32(const struct sja1000_priv *priv, int reg)
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{
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return ioread8(priv->reg_base + reg * 4);
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}
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static void sp_write_reg32(const struct sja1000_priv *priv, int reg, u8 val)
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{
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iowrite8(val, priv->reg_base + reg * 4);
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}
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static int sp_probe(struct platform_device *pdev)
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{
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int err;
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@ -92,12 +112,26 @@ static int sp_probe(struct platform_device *pdev)
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dev->irq = res_irq->start;
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priv->irq_flags = res_irq->flags & (IRQF_TRIGGER_MASK | IRQF_SHARED);
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priv->reg_base = addr;
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priv->read_reg = sp_read_reg;
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priv->write_reg = sp_write_reg;
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priv->can.clock.freq = pdata->clock;
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priv->ocr = pdata->ocr;
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priv->cdr = pdata->cdr;
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switch (res_mem->flags & IORESOURCE_MEM_TYPE_MASK) {
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case IORESOURCE_MEM_32BIT:
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priv->read_reg = sp_read_reg32;
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priv->write_reg = sp_write_reg32;
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break;
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case IORESOURCE_MEM_16BIT:
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priv->read_reg = sp_read_reg16;
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priv->write_reg = sp_write_reg16;
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break;
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case IORESOURCE_MEM_8BIT:
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default:
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priv->read_reg = sp_read_reg8;
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priv->write_reg = sp_write_reg8;
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break;
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}
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dev_set_drvdata(&pdev->dev, dev);
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SET_NETDEV_DEV(dev, &pdev->dev);
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