bitops: rename for_each_bit() to for_each_set_bit()
Rename for_each_bit to for_each_set_bit in the kernel source tree. To permit for_each_clear_bit(), should that ever be added. The patch includes a macro to map the old for_each_bit() onto the new for_each_set_bit(). This is a (very) temporary thing to ease the migration. [akpm@linux-foundation.org: add temporary for_each_bit()] Suggested-by: Alexey Dobriyan <adobriyan@gmail.com> Suggested-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Russell King <rmk@arm.linux.org.uk> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Artem Bityutskiy <dedekind@infradead.org> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
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e3cb91ce1a
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984b3f5746
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@ -676,7 +676,7 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
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if (c->weight != w)
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if (c->weight != w)
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continue;
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continue;
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for_each_bit(j, c->idxmsk, X86_PMC_IDX_MAX) {
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for_each_set_bit(j, c->idxmsk, X86_PMC_IDX_MAX) {
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if (!test_bit(j, used_mask))
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if (!test_bit(j, used_mask))
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break;
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break;
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}
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}
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@ -757,7 +757,7 @@ again:
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inc_irq_stat(apic_perf_irqs);
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inc_irq_stat(apic_perf_irqs);
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ack = status;
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ack = status;
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for_each_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
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for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
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struct perf_event *event = cpuc->events[bit];
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struct perf_event *event = cpuc->events[bit];
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clear_bit(bit, (unsigned long *) &status);
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clear_bit(bit, (unsigned long *) &status);
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@ -71,7 +71,7 @@ static irqreturn_t ioat_dma_do_interrupt(int irq, void *data)
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}
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}
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attnstatus = readl(instance->reg_base + IOAT_ATTNSTATUS_OFFSET);
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attnstatus = readl(instance->reg_base + IOAT_ATTNSTATUS_OFFSET);
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for_each_bit(bit, &attnstatus, BITS_PER_LONG) {
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for_each_set_bit(bit, &attnstatus, BITS_PER_LONG) {
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chan = ioat_chan_by_index(instance, bit);
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chan = ioat_chan_by_index(instance, bit);
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tasklet_schedule(&chan->cleanup_task);
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tasklet_schedule(&chan->cleanup_task);
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}
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}
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@ -219,7 +219,7 @@ static void pl061_irq_handler(unsigned irq, struct irq_desc *desc)
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if (pending == 0)
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if (pending == 0)
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continue;
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continue;
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for_each_bit(offset, &pending, PL061_GPIO_NR)
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for_each_set_bit(offset, &pending, PL061_GPIO_NR)
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generic_handle_irq(pl061_to_irq(&chip->gc, offset));
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generic_handle_irq(pl061_to_irq(&chip->gc, offset));
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}
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}
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desc->chip->unmask(irq);
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desc->chip->unmask(irq);
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@ -175,7 +175,7 @@ static void timbgpio_irq(unsigned int irq, struct irq_desc *desc)
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ipr = ioread32(tgpio->membase + TGPIO_IPR);
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ipr = ioread32(tgpio->membase + TGPIO_IPR);
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iowrite32(ipr, tgpio->membase + TGPIO_ICR);
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iowrite32(ipr, tgpio->membase + TGPIO_ICR);
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for_each_bit(offset, &ipr, tgpio->gpio.ngpio)
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for_each_set_bit(offset, &ipr, tgpio->gpio.ngpio)
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generic_handle_irq(timbgpio_to_irq(&tgpio->gpio, offset));
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generic_handle_irq(timbgpio_to_irq(&tgpio->gpio, offset));
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}
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}
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@ -497,13 +497,13 @@ static int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev)
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int i;
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int i;
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if (abort_source & DW_IC_TX_ABRT_NOACK) {
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if (abort_source & DW_IC_TX_ABRT_NOACK) {
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for_each_bit(i, &abort_source, ARRAY_SIZE(abort_sources))
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for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources))
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dev_dbg(dev->dev,
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dev_dbg(dev->dev,
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"%s: %s\n", __func__, abort_sources[i]);
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"%s: %s\n", __func__, abort_sources[i]);
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return -EREMOTEIO;
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return -EREMOTEIO;
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}
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}
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for_each_bit(i, &abort_source, ARRAY_SIZE(abort_sources))
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for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources))
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dev_err(dev->dev, "%s: %s\n", __func__, abort_sources[i]);
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dev_err(dev->dev, "%s: %s\n", __func__, abort_sources[i]);
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if (abort_source & DW_IC_TX_ARB_LOST)
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if (abort_source & DW_IC_TX_ARB_LOST)
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@ -108,7 +108,7 @@ static void egpio_handler(unsigned int irq, struct irq_desc *desc)
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ack_irqs(ei);
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ack_irqs(ei);
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/* Process all set pins. */
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/* Process all set pins. */
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readval &= ei->irqs_enabled;
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readval &= ei->irqs_enabled;
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for_each_bit(irqpin, &readval, ei->nirqs) {
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for_each_set_bit(irqpin, &readval, ei->nirqs) {
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/* Run irq handler */
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/* Run irq handler */
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pr_debug("got IRQ %d\n", irqpin);
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pr_debug("got IRQ %d\n", irqpin);
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irq = ei->irq_start + irqpin;
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irq = ei->irq_start + irqpin;
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@ -475,7 +475,7 @@ xpnet_dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
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if (skb->data[0] == 0xff) {
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if (skb->data[0] == 0xff) {
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/* we are being asked to broadcast to all partitions */
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/* we are being asked to broadcast to all partitions */
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for_each_bit(dest_partid, xpnet_broadcast_partitions,
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for_each_set_bit(dest_partid, xpnet_broadcast_partitions,
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xp_max_npartitions) {
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xp_max_npartitions) {
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xpnet_send(skb, queued_msg, start_addr, end_addr,
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xpnet_send(skb, queued_msg, start_addr, end_addr,
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@ -998,7 +998,7 @@ static int gfar_probe(struct of_device *ofdev,
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}
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}
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/* Need to reverse the bit maps as bit_map's MSB is q0
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/* Need to reverse the bit maps as bit_map's MSB is q0
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* but, for_each_bit parses from right to left, which
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* but, for_each_set_bit parses from right to left, which
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* basically reverses the queue numbers */
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* basically reverses the queue numbers */
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for (i = 0; i< priv->num_grps; i++) {
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for (i = 0; i< priv->num_grps; i++) {
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priv->gfargrp[i].tx_bit_map = reverse_bitmap(
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priv->gfargrp[i].tx_bit_map = reverse_bitmap(
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@ -1011,7 +1011,7 @@ static int gfar_probe(struct of_device *ofdev,
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* also assign queues to groups */
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* also assign queues to groups */
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for (grp_idx = 0; grp_idx < priv->num_grps; grp_idx++) {
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for (grp_idx = 0; grp_idx < priv->num_grps; grp_idx++) {
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priv->gfargrp[grp_idx].num_rx_queues = 0x0;
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priv->gfargrp[grp_idx].num_rx_queues = 0x0;
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for_each_bit(i, &priv->gfargrp[grp_idx].rx_bit_map,
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for_each_set_bit(i, &priv->gfargrp[grp_idx].rx_bit_map,
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priv->num_rx_queues) {
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priv->num_rx_queues) {
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priv->gfargrp[grp_idx].num_rx_queues++;
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priv->gfargrp[grp_idx].num_rx_queues++;
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priv->rx_queue[i]->grp = &priv->gfargrp[grp_idx];
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priv->rx_queue[i]->grp = &priv->gfargrp[grp_idx];
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@ -1019,7 +1019,7 @@ static int gfar_probe(struct of_device *ofdev,
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rqueue = rqueue | ((RQUEUE_EN0 | RQUEUE_EX0) >> i);
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rqueue = rqueue | ((RQUEUE_EN0 | RQUEUE_EX0) >> i);
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}
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}
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priv->gfargrp[grp_idx].num_tx_queues = 0x0;
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priv->gfargrp[grp_idx].num_tx_queues = 0x0;
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for_each_bit (i, &priv->gfargrp[grp_idx].tx_bit_map,
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for_each_set_bit(i, &priv->gfargrp[grp_idx].tx_bit_map,
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priv->num_tx_queues) {
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priv->num_tx_queues) {
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priv->gfargrp[grp_idx].num_tx_queues++;
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priv->gfargrp[grp_idx].num_tx_queues++;
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priv->tx_queue[i]->grp = &priv->gfargrp[grp_idx];
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priv->tx_queue[i]->grp = &priv->gfargrp[grp_idx];
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@ -1709,7 +1709,7 @@ void gfar_configure_coalescing(struct gfar_private *priv,
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if (priv->mode == MQ_MG_MODE) {
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if (priv->mode == MQ_MG_MODE) {
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baddr = ®s->txic0;
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baddr = ®s->txic0;
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for_each_bit (i, &tx_mask, priv->num_tx_queues) {
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for_each_set_bit(i, &tx_mask, priv->num_tx_queues) {
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if (likely(priv->tx_queue[i]->txcoalescing)) {
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if (likely(priv->tx_queue[i]->txcoalescing)) {
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gfar_write(baddr + i, 0);
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gfar_write(baddr + i, 0);
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gfar_write(baddr + i, priv->tx_queue[i]->txic);
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gfar_write(baddr + i, priv->tx_queue[i]->txic);
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@ -1717,7 +1717,7 @@ void gfar_configure_coalescing(struct gfar_private *priv,
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}
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}
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baddr = ®s->rxic0;
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baddr = ®s->rxic0;
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for_each_bit (i, &rx_mask, priv->num_rx_queues) {
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for_each_set_bit(i, &rx_mask, priv->num_rx_queues) {
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if (likely(priv->rx_queue[i]->rxcoalescing)) {
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if (likely(priv->rx_queue[i]->rxcoalescing)) {
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gfar_write(baddr + i, 0);
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gfar_write(baddr + i, 0);
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gfar_write(baddr + i, priv->rx_queue[i]->rxic);
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gfar_write(baddr + i, priv->rx_queue[i]->rxic);
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@ -2607,7 +2607,7 @@ static int gfar_poll(struct napi_struct *napi, int budget)
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budget_per_queue = left_over_budget/num_queues;
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budget_per_queue = left_over_budget/num_queues;
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left_over_budget = 0;
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left_over_budget = 0;
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for_each_bit(i, &gfargrp->rx_bit_map, priv->num_rx_queues) {
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for_each_set_bit(i, &gfargrp->rx_bit_map, priv->num_rx_queues) {
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if (test_bit(i, &serviced_queues))
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if (test_bit(i, &serviced_queues))
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continue;
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continue;
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rx_queue = priv->rx_queue[i];
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rx_queue = priv->rx_queue[i];
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@ -1050,7 +1050,7 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
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*/
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*/
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for (v_idx = 0; v_idx < q_vectors; v_idx++) {
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for (v_idx = 0; v_idx < q_vectors; v_idx++) {
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q_vector = adapter->q_vector[v_idx];
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q_vector = adapter->q_vector[v_idx];
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/* XXX for_each_bit(...) */
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/* XXX for_each_set_bit(...) */
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r_idx = find_first_bit(q_vector->rxr_idx,
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r_idx = find_first_bit(q_vector->rxr_idx,
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adapter->num_rx_queues);
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adapter->num_rx_queues);
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@ -751,7 +751,7 @@ static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
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*/
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*/
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for (v_idx = 0; v_idx < q_vectors; v_idx++) {
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for (v_idx = 0; v_idx < q_vectors; v_idx++) {
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q_vector = adapter->q_vector[v_idx];
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q_vector = adapter->q_vector[v_idx];
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/* XXX for_each_bit(...) */
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/* XXX for_each_set_bit(...) */
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r_idx = find_first_bit(q_vector->rxr_idx,
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r_idx = find_first_bit(q_vector->rxr_idx,
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adapter->num_rx_queues);
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adapter->num_rx_queues);
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@ -394,7 +394,7 @@ static void ar9170_tx_fake_ampdu_status(struct ar9170 *ar)
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ieee80211_tx_status_irqsafe(ar->hw, skb);
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ieee80211_tx_status_irqsafe(ar->hw, skb);
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}
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}
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for_each_bit(i, &queue_bitmap, BITS_PER_BYTE) {
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for_each_set_bit(i, &queue_bitmap, BITS_PER_BYTE) {
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#ifdef AR9170_QUEUE_STOP_DEBUG
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#ifdef AR9170_QUEUE_STOP_DEBUG
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printk(KERN_DEBUG "%s: wake queue %d\n",
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printk(KERN_DEBUG "%s: wake queue %d\n",
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wiphy_name(ar->hw->wiphy), i);
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wiphy_name(ar->hw->wiphy), i);
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@ -89,7 +89,7 @@ static int iwm_debugfs_dbg_modules_write(void *data, u64 val)
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for (i = 0; i < __IWM_DM_NR; i++)
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for (i = 0; i < __IWM_DM_NR; i++)
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iwm->dbg.dbg_module[i] = 0;
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iwm->dbg.dbg_module[i] = 0;
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for_each_bit(bit, &iwm->dbg.dbg_modules, __IWM_DM_NR)
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for_each_set_bit(bit, &iwm->dbg.dbg_modules, __IWM_DM_NR)
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iwm->dbg.dbg_module[bit] = iwm->dbg.dbg_level;
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iwm->dbg.dbg_module[bit] = iwm->dbg.dbg_level;
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return 0;
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return 0;
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@ -1116,7 +1116,7 @@ static int iwm_ntf_stop_resume_tx(struct iwm_priv *iwm, u8 *buf,
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return -EINVAL;
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return -EINVAL;
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}
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}
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for_each_bit(bit, (unsigned long *)&tid_msk, IWM_UMAC_TID_NR) {
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for_each_set_bit(bit, (unsigned long *)&tid_msk, IWM_UMAC_TID_NR) {
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tid_info = &sta_info->tid_info[bit];
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tid_info = &sta_info->tid_info[bit];
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mutex_lock(&tid_info->mutex);
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mutex_lock(&tid_info->mutex);
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@ -457,7 +457,7 @@ static int ocfs2_recover_local_quota_file(struct inode *lqinode,
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break;
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break;
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}
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}
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dchunk = (struct ocfs2_local_disk_chunk *)hbh->b_data;
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dchunk = (struct ocfs2_local_disk_chunk *)hbh->b_data;
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for_each_bit(bit, rchunk->rc_bitmap, ol_chunk_entries(sb)) {
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for_each_set_bit(bit, rchunk->rc_bitmap, ol_chunk_entries(sb)) {
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qbh = NULL;
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qbh = NULL;
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status = ocfs2_read_quota_block(lqinode,
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status = ocfs2_read_quota_block(lqinode,
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ol_dqblk_block(sb, chunk, bit),
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ol_dqblk_block(sb, chunk, bit),
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@ -16,11 +16,13 @@
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*/
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*/
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#include <asm/bitops.h>
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#include <asm/bitops.h>
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#define for_each_bit(bit, addr, size) \
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#define for_each_set_bit(bit, addr, size) \
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for ((bit) = find_first_bit((addr), (size)); \
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for ((bit) = find_first_bit((addr), (size)); \
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(bit) < (size); \
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(bit) < (size); \
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(bit) = find_next_bit((addr), (size), (bit) + 1))
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(bit) = find_next_bit((addr), (size), (bit) + 1))
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/* Temporary */
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#define for_each_bit(bit, addr, size) for_each_set_bit(bit, addr, size)
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static __inline__ int get_bitmask_order(unsigned int count)
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static __inline__ int get_bitmask_order(unsigned int count)
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{
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{
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@ -47,7 +47,7 @@ static int convert_prio(int prio)
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}
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}
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#define for_each_cpupri_active(array, idx) \
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#define for_each_cpupri_active(array, idx) \
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for_each_bit(idx, array, CPUPRI_NR_PRIORITIES)
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for_each_set_bit(idx, array, CPUPRI_NR_PRIORITIES)
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/**
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/**
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* cpupri_find - find the best (lowest-pri) CPU in the system
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* cpupri_find - find the best (lowest-pri) CPU in the system
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@ -137,7 +137,7 @@ static void uda1380_flush_work(struct work_struct *work)
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{
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{
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int bit, reg;
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int bit, reg;
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for_each_bit(bit, &uda1380_cache_dirty, UDA1380_CACHEREGNUM - 0x10) {
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for_each_set_bit(bit, &uda1380_cache_dirty, UDA1380_CACHEREGNUM - 0x10) {
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reg = 0x10 + bit;
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reg = 0x10 + bit;
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pr_debug("uda1380: flush reg %x val %x:\n", reg,
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pr_debug("uda1380: flush reg %x val %x:\n", reg,
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uda1380_read_reg_cache(uda1380_codec, reg));
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uda1380_read_reg_cache(uda1380_codec, reg));
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