ARM: SoC fixes for 6.3, part 1
A few bugfixes already came up during the merge window. Samsung, ASpeed, Spear have minor DT changes, in case of Samsung this fixes a regression compared to earlier versions. Bartosz takes over as the primary maintainer for the TI DaVinci platform, and we get a few last minute defconfig changes. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmP835wACgkQmmx57+YA GNmqpRAAuXA8Vi+fRbMXxGqM33Ypt2ahog4JU44tiAqe7e3wzOfc+rV9BPkLWZdX enOepeK99w4suEjidodU181TRPSa3mpW/h08QZXccW1ZYSppzsnUKvLV+Q2JH4hl 7b64/+LUlPSPv4wiKKtrm8WDDflChRzifAvYdHdGnRw+LVlK6GIrXfUhjOOR1k2W HoYwEsK0j3w8/tWo44vJi2wmIdgfh/Jbs3dh5s/TAT4KkB+Mwivo+t7p+0S0nKLO UR9rtJvhaKru+5my1oHCbV0o+KNQiHdC4Ue90FDY1uIoiCtJpzWsFhsZDeNSry/X Al8y5YTp1k6VUHsgG3O3BoOY8zjr+2DzKq5pxbq35fKdKSX1DSW72dA1UryySQmV 33iFsJtAyhkth291Tsem0B3n39nQaQ0E/t7MID4jZRwCucJ0vhLwSIj+DmPY/C84 vdilmwqcW+p5/dPaO+S1u40PuAzqwRp/GcREny/53TJd8beXKlYccz9B0BnuEQ76 1ap/n8/TDO8L4bODb/1Wdah64yAlYyPC3PcxhWxsziFFB/fvlKWaygzfQ2yWGijF n2fnDjufF7SCScYjgE+0gThKYfZdEBkNKeQ+dYKiGlwgnzxSPcaYjo0FvY2tKE09 y/aOxeFkBMfb10nk74u2+AjBNadUKP36jGsQWLJ9HZRhGecgWf8= =ECLF -----END PGP SIGNATURE----- Merge tag 'arm-fixes-6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Arnd Bergmann: "A few bugfixes already came up during the merge window. Samsung, ASpeed, Spear have minor DT changes, in case of Samsung this fixes a regression compared to earlier versions. Bartosz takes over as the primary maintainer for the TI DaVinci platform, and we get a few last minute defconfig changes" * tag 'arm-fixes-6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: dts: spear320-hmi: correct STMPE GPIO compatible ARM: dts: aspeed: p10bmc: Update battery node name arm64: defconfig: Add IOSCHED_BFQ to the default configs arm64: defconfig: Fix unintentional disablement of PCI on i.MX ARM: dts: exynos: correct TMU phandle in Odroid XU3 family ARM: dts: exynos: correct TMU phandle in Odroid HC1 ARM: dts: exynos: correct TMU phandle in Odroid XU ARM: dts: exynos: correct TMU phandle in Exynos5250 ARM: dts: exynos: correct TMU phandle in Exynos4210 ARM: dts: exynos: correct TMU phandle in Exynos4 MAINTAINERS: make me the maintainer of DaVinci platforms
This commit is contained in:
commit
982818426a
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@ -20880,11 +20880,10 @@ F: drivers/clk/ti/
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F: include/linux/clk/ti.h
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TI DAVINCI MACHINE SUPPORT
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M: Sekhar Nori <nsekhar@ti.com>
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R: Bartosz Golaszewski <brgl@bgdev.pl>
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M: Bartosz Golaszewski <brgl@bgdev.pl>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Supported
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci.git
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S: Maintained
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git
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F: Documentation/devicetree/bindings/i2c/i2c-davinci.txt
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F: arch/arm/boot/dts/da850*
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F: arch/arm/mach-davinci/
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@ -124,7 +124,7 @@
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};
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};
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iio-hwmon-battery {
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iio-hwmon {
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compatible = "iio-hwmon";
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io-channels = <&adc1 7>;
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};
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@ -244,7 +244,7 @@
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};
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};
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iio-hwmon-battery {
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iio-hwmon {
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compatible = "iio-hwmon";
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io-channels = <&adc1 7>;
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};
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@ -220,7 +220,7 @@
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};
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};
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iio-hwmon-battery {
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iio-hwmon {
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compatible = "iio-hwmon";
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io-channels = <&adc1 7>;
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};
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@ -10,7 +10,7 @@
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/ {
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thermal-zones {
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cpu_thermal: cpu-thermal {
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thermal-sensors = <&tmu 0>;
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thermal-sensors = <&tmu>;
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polling-delay-passive = <0>;
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polling-delay = <0>;
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trips {
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@ -393,7 +393,6 @@
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&cpu_thermal {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-sensors = <&tmu 0>;
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};
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&gic {
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@ -1107,7 +1107,7 @@
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&cpu_thermal {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-sensors = <&tmu 0>;
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thermal-sensors = <&tmu>;
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cooling-maps {
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map0 {
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@ -120,7 +120,6 @@
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};
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&cpu0_thermal {
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thermal-sensors = <&tmu_cpu0 0>;
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polling-delay-passive = <0>;
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polling-delay = <0>;
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@ -31,7 +31,7 @@
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thermal-zones {
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cpu0_thermal: cpu0-thermal {
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thermal-sensors = <&tmu_cpu0 0>;
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thermal-sensors = <&tmu_cpu0>;
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trips {
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cpu0_alert0: cpu-alert-0 {
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temperature = <70000>; /* millicelsius */
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@ -86,7 +86,7 @@
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};
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};
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cpu1_thermal: cpu1-thermal {
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thermal-sensors = <&tmu_cpu1 0>;
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thermal-sensors = <&tmu_cpu1>;
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trips {
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cpu1_alert0: cpu-alert-0 {
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temperature = <70000>;
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@ -130,7 +130,7 @@
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};
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};
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cpu2_thermal: cpu2-thermal {
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thermal-sensors = <&tmu_cpu2 0>;
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thermal-sensors = <&tmu_cpu2>;
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trips {
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cpu2_alert0: cpu-alert-0 {
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temperature = <70000>;
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@ -174,7 +174,7 @@
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};
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};
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cpu3_thermal: cpu3-thermal {
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thermal-sensors = <&tmu_cpu3 0>;
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thermal-sensors = <&tmu_cpu3>;
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trips {
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cpu3_alert0: cpu-alert-0 {
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temperature = <70000>;
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@ -218,7 +218,7 @@
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};
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};
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gpu_thermal: gpu-thermal {
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thermal-sensors = <&tmu_gpu 0>;
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thermal-sensors = <&tmu_gpu>;
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trips {
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gpu_alert0: gpu-alert-0 {
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temperature = <70000>;
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@ -50,7 +50,7 @@
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thermal-zones {
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cpu0_thermal: cpu0-thermal {
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thermal-sensors = <&tmu_cpu0 0>;
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thermal-sensors = <&tmu_cpu0>;
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polling-delay-passive = <250>;
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polling-delay = <0>;
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trips {
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@ -139,7 +139,7 @@
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};
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};
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cpu1_thermal: cpu1-thermal {
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thermal-sensors = <&tmu_cpu1 0>;
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thermal-sensors = <&tmu_cpu1>;
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polling-delay-passive = <250>;
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polling-delay = <0>;
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trips {
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@ -212,7 +212,7 @@
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};
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};
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cpu2_thermal: cpu2-thermal {
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thermal-sensors = <&tmu_cpu2 0>;
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thermal-sensors = <&tmu_cpu2>;
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polling-delay-passive = <250>;
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polling-delay = <0>;
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trips {
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@ -285,7 +285,7 @@
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};
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};
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cpu3_thermal: cpu3-thermal {
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thermal-sensors = <&tmu_cpu3 0>;
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thermal-sensors = <&tmu_cpu3>;
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polling-delay-passive = <250>;
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polling-delay = <0>;
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trips {
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};
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};
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gpu_thermal: gpu-thermal {
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thermal-sensors = <&tmu_gpu 0>;
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thermal-sensors = <&tmu_gpu>;
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polling-delay-passive = <250>;
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polling-delay = <0>;
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trips {
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@ -241,7 +241,7 @@
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irq-trigger = <0x1>;
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stmpegpio: stmpe-gpio {
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compatible = "stmpe,gpio";
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compatible = "st,stmpe-gpio";
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reg = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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@ -115,6 +115,7 @@ CONFIG_KVM=y
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CONFIG_JUMP_LABEL=y
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CONFIG_MODULES=y
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CONFIG_MODULE_UNLOAD=y
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CONFIG_IOSCHED_BFQ=y
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# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
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# CONFIG_COMPAT_BRK is not set
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CONFIG_MEMORY_HOTPLUG=y
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@ -219,7 +220,7 @@ CONFIG_PCI_HOST_THUNDER_ECAM=y
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CONFIG_PCIE_ROCKCHIP_HOST=m
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CONFIG_PCIE_MEDIATEK_GEN3=m
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CONFIG_PCIE_BRCMSTB=m
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CONFIG_PCI_IMX6=y
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CONFIG_PCI_IMX6_HOST=y
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CONFIG_PCI_LAYERSCAPE=y
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CONFIG_PCI_HISI=y
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CONFIG_PCIE_QCOM=y
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