drm/amdgpu/sriov/vcn: add new vcn ip revision check case for SIENNA_CICHLID
[WHY] for sriov odd# vf will modify vcn0 engine ip revision(due to multimedia bandwidth feature), which will be mismatched with original vcn0 revision [HOW] add new version check for vcn0 disabled revision(3, 0, 192), typically modified under sriov mode Signed-off-by: Jane Jian <Jane.Jian@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -918,6 +918,7 @@ static int amdgpu_discovery_set_mm_ip_blocks(struct amdgpu_device *adev)
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case IP_VERSION(3, 0, 64):
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case IP_VERSION(3, 1, 1):
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case IP_VERSION(3, 0, 2):
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case IP_VERSION(3, 0, 192):
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amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block);
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if (!amdgpu_sriov_vf(adev))
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amdgpu_device_ip_block_add(adev, &jpeg_v3_0_ip_block);
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@ -135,6 +135,7 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
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break;
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case IP_VERSION(3, 0, 0):
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case IP_VERSION(3, 0, 64):
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case IP_VERSION(3, 0, 192):
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if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 3, 0))
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fw_name = FIRMWARE_SIENNA_CICHLID;
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else
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@ -183,6 +183,7 @@ static int nv_query_video_codecs(struct amdgpu_device *adev, bool encode,
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switch (adev->ip_versions[UVD_HWIP][0]) {
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case IP_VERSION(3, 0, 0):
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case IP_VERSION(3, 0, 64):
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case IP_VERSION(3, 0, 192):
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if (amdgpu_sriov_vf(adev)) {
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if (encode)
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*codecs = &sriov_sc_video_codecs_encode;
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