drm/amd/amdgpu: Support VM environments in amdgpu_ttm_access_memory()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1201,14 +1201,14 @@ static int amdgpu_ttm_access_memory(struct ttm_buffer_object *bo,
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}
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}
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spin_lock_irqsave(&adev->mmio_idx_lock, flags);
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spin_lock_irqsave(&adev->mmio_idx_lock, flags);
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WREG32(mmMM_INDEX, ((uint32_t)aligned_pos) | 0x80000000);
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WREG32_NO_KIQ(mmMM_INDEX, ((uint32_t)aligned_pos) | 0x80000000);
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WREG32(mmMM_INDEX_HI, aligned_pos >> 31);
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WREG32_NO_KIQ(mmMM_INDEX_HI, aligned_pos >> 31);
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if (!write || mask != 0xffffffff)
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if (!write || mask != 0xffffffff)
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value = RREG32(mmMM_DATA);
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value = RREG32_NO_KIQ(mmMM_DATA);
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if (write) {
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if (write) {
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value &= ~mask;
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value &= ~mask;
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value |= (*(uint32_t *)buf << shift) & mask;
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value |= (*(uint32_t *)buf << shift) & mask;
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WREG32(mmMM_DATA, value);
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WREG32_NO_KIQ(mmMM_DATA, value);
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}
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}
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spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
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spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
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if (!write) {
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if (!write) {
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