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MIPS: OCTEON: Add OCTEON_IRQ_* definitions for cn68XX chips. 

There are 64 workqueue, 32 watchdog, and 4 mbox.

Signed-off-by: David Daney <david.daney@cavium.com>
This commit is contained in:
David Daney 2012-04-03 15:22:05 -07:00
parent c5aa59e88f
commit 9787c56ee3
1 changed files with 4 additions and 3 deletions
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7
arch/mips/include/asm/mach-cavium-octeon/irq.h
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@ -21,10 +21,11 @@ enum octeon_irq {
OCTEON_IRQ_TIMER, OCTEON_IRQ_TIMER,
/* sources in CIU_INTX_EN0 */ /* sources in CIU_INTX_EN0 */
OCTEON_IRQ_WORKQ0, OCTEON_IRQ_WORKQ0,
OCTEON_IRQ_WDOG0 = OCTEON_IRQ_WORKQ0 + 16, OCTEON_IRQ_WDOG0 = OCTEON_IRQ_WORKQ0 + 64,
OCTEON_IRQ_WDOG15 = OCTEON_IRQ_WDOG0 + 15, OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 32,
OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 16,
OCTEON_IRQ_MBOX1, OCTEON_IRQ_MBOX1,
OCTEON_IRQ_MBOX2,
OCTEON_IRQ_MBOX3,
OCTEON_IRQ_PCI_INT0, OCTEON_IRQ_PCI_INT0,
OCTEON_IRQ_PCI_INT1, OCTEON_IRQ_PCI_INT1,
OCTEON_IRQ_PCI_INT2, OCTEON_IRQ_PCI_INT2,