ASoC: sirf-usp: Fixed a bug for playback and capture work at the same time
1. The startup function invoked when the playback and capture. If start playback when capturing, the registers are re-initinitialised. That cause the playback fail. So move the startup code into runtime resume. 2. Modified: If non RUNTIME_PM support, the probe need enable clock and initinitialise registers. 3. Refine code. Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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@ -103,11 +103,8 @@ static int sirf_usp_pcm_set_dai_fmt(struct snd_soc_dai *dai,
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return 0;
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}
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static int sirf_usp_i2s_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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static void sirf_usp_i2s_init(struct sirf_usp *usp)
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{
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struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai);
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/* Configure RISC mode */
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regmap_update_bits(usp->regmap, USP_RISC_DSP_MODE,
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USP_RISC_DSP_SEL, ~USP_RISC_DSP_SEL);
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@ -119,19 +116,16 @@ static int sirf_usp_i2s_startup(struct snd_pcm_substream *substream,
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regmap_write(usp->regmap, USP_TX_DMA_IO_LEN, 0);
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regmap_write(usp->regmap, USP_RX_DMA_IO_LEN, 0);
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regmap_write(usp->regmap, USP_RX_FRAME_CTRL, USP_SINGLE_SYNC_MODE);
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regmap_write(usp->regmap, USP_TX_FRAME_CTRL, USP_TXC_SLAVE_CLK_SAMPLE);
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/* Configure Mode2 register */
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regmap_write(usp->regmap, USP_MODE2, (1 << USP_RXD_DELAY_LEN_OFFSET) |
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(0 << USP_TXD_DELAY_LEN_OFFSET));
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(0 << USP_TXD_DELAY_LEN_OFFSET) |
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USP_TFS_CLK_SLAVE_MODE | USP_RFS_CLK_SLAVE_MODE);
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/* Configure Mode1 register */
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regmap_write(usp->regmap, USP_MODE1,
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USP_SYNC_MODE | USP_EN | USP_TXD_ACT_EDGE_FALLING |
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USP_RFS_ACT_LEVEL_LOGIC1 | USP_TFS_ACT_LEVEL_LOGIC1 |
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USP_TX_UFLOW_REPEAT_ZERO);
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USP_TX_UFLOW_REPEAT_ZERO | USP_CLOCK_MODE_SLAVE);
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/* Configure RX DMA IO Control register */
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regmap_write(usp->regmap, USP_RX_DMA_IO_CTRL, 0);
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@ -155,8 +149,6 @@ static int sirf_usp_i2s_startup(struct snd_pcm_substream *substream,
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/* Congiure TX FIFO Level Check register */
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regmap_write(usp->regmap, USP_TX_FIFO_LEVEL_CHK,
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TX_FIFO_SC(0x1B) | TX_FIFO_LC(0x0E) | TX_FIFO_HC(0x04));
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return 0;
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}
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static int sirf_usp_pcm_hw_params(struct snd_pcm_substream *substream,
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@ -204,23 +196,19 @@ static int sirf_usp_pcm_hw_params(struct snd_pcm_substream *substream,
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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regmap_update_bits(usp->regmap, USP_TX_FRAME_CTRL,
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USP_TXC_DATA_LEN_MASK | USP_TXC_FRAME_LEN_MASK
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| USP_TXC_SHIFTER_LEN_MASK,
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| USP_TXC_SHIFTER_LEN_MASK | USP_TXC_SLAVE_CLK_SAMPLE,
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((data_len - 1) << USP_TXC_DATA_LEN_OFFSET)
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| ((frame_len - 1) << USP_TXC_FRAME_LEN_OFFSET)
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| ((shifter_len - 1) << USP_TXC_SHIFTER_LEN_OFFSET));
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| ((shifter_len - 1) << USP_TXC_SHIFTER_LEN_OFFSET)
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| USP_TXC_SLAVE_CLK_SAMPLE);
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else
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regmap_update_bits(usp->regmap, USP_RX_FRAME_CTRL,
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USP_RXC_DATA_LEN_MASK | USP_RXC_FRAME_LEN_MASK
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| USP_RXC_SHIFTER_LEN_MASK,
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| USP_RXC_SHIFTER_LEN_MASK | USP_SINGLE_SYNC_MODE,
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((data_len - 1) << USP_RXC_DATA_LEN_OFFSET)
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| ((frame_len - 1) << USP_RXC_FRAME_LEN_OFFSET)
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| ((shifter_len - 1) << USP_RXC_SHIFTER_LEN_OFFSET));
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regmap_update_bits(usp->regmap, USP_MODE1,
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USP_CLOCK_MODE_SLAVE, USP_CLOCK_MODE_SLAVE);
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regmap_update_bits(usp->regmap, USP_MODE2,
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USP_TFS_CLK_SLAVE_MODE | USP_RFS_CLK_SLAVE_MODE,
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USP_TFS_CLK_SLAVE_MODE | USP_RFS_CLK_SLAVE_MODE);
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| ((shifter_len - 1) << USP_RXC_SHIFTER_LEN_OFFSET)
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| USP_SINGLE_SYNC_MODE);
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return 0;
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}
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@ -253,7 +241,6 @@ static int sirf_usp_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
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}
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static const struct snd_soc_dai_ops sirf_usp_pcm_dai_ops = {
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.startup = sirf_usp_i2s_startup,
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.trigger = sirf_usp_pcm_trigger,
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.set_fmt = sirf_usp_pcm_set_dai_fmt,
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.hw_params = sirf_usp_pcm_hw_params,
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@ -282,7 +269,6 @@ static struct snd_soc_dai_driver sirf_usp_pcm_dai = {
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.ops = &sirf_usp_pcm_dai_ops,
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};
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#ifdef CONFIG_PM
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static int sirf_usp_pcm_runtime_suspend(struct device *dev)
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{
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struct sirf_usp *usp = dev_get_drvdata(dev);
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@ -293,9 +279,15 @@ static int sirf_usp_pcm_runtime_suspend(struct device *dev)
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static int sirf_usp_pcm_runtime_resume(struct device *dev)
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{
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struct sirf_usp *usp = dev_get_drvdata(dev);
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return clk_prepare_enable(usp->clk);
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int ret;
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ret = clk_prepare_enable(usp->clk);
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if (ret) {
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dev_err(dev, "clk_enable failed: %d\n", ret);
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return ret;
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}
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sirf_usp_i2s_init(usp);
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return 0;
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}
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#endif
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#ifdef CONFIG_PM_SLEEP
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static int sirf_usp_pcm_suspend(struct device *dev)
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@ -369,6 +361,11 @@ static int sirf_usp_pcm_probe(struct platform_device *pdev)
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}
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pm_runtime_enable(&pdev->dev);
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if (!pm_runtime_enabled(&pdev->dev)) {
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ret = sirf_usp_pcm_runtime_resume(&pdev->dev);
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if (ret)
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return ret;
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}
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ret = devm_snd_soc_register_component(&pdev->dev, &sirf_usp_component,
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&sirf_usp_pcm_dai, 1);
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@ -381,7 +378,10 @@ static int sirf_usp_pcm_probe(struct platform_device *pdev)
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static int sirf_usp_pcm_remove(struct platform_device *pdev)
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{
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pm_runtime_disable(&pdev->dev);
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if (!pm_runtime_enabled(&pdev->dev))
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sirf_usp_pcm_runtime_suspend(&pdev->dev);
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else
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pm_runtime_disable(&pdev->dev);
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return 0;
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}
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